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gem5
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bb6fea91da
gem5
/
src
/
arch
/
arm
/
isa
History
Gabe Black
bb6fea91da
ARM: Implement the SRS instruction.
2010-06-02 12:58:11 -05:00
..
decoder
ARM: Decode the RFE instruction.
2010-06-02 12:58:10 -05:00
formats
ARM: Decode TBB and TBH.
2010-06-02 12:58:11 -05:00
insts
ARM: Implement the SRS instruction.
2010-06-02 12:58:11 -05:00
templates
ARM: Add a base class for SRS.
2010-06-02 12:58:11 -05:00
bitfields.isa
ARM: Rearrange the load/store double/exclusive, table branch thumb decoding.
2010-06-02 12:58:07 -05:00
copyright.txt
ARM: Remove IsControl from operands that don't imply control transfers.
2010-06-02 12:57:59 -05:00
includes.isa
ARM: Define versions of MSR and MRS outside the decoder.
2010-06-02 12:58:05 -05:00
main.isa
ARM: Define the load instructions from outside the decoder.
2010-06-02 12:58:01 -05:00
operands.isa
ARM: Allow flattening into any mode.
2010-06-02 12:58:11 -05:00