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ARM: Decode the CPS instruction.

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This commit is contained in:
Gabe Black 2010-06-02 12:58:11 -05:00
parent 7861b084f6
commit ba33db8fd6
3 changed files with 14 additions and 3 deletions
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5
src/arch/arm/isa/formats/branch.isa
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@ -161,7 +161,10 @@ def format Thumb32BranchesAndMiscCtrl() {{
const uint32_t op1 = bits(machInst, 10, 8);
const uint32_t op2 = bits(machInst, 7, 0);
if (op1 != 0) {
return new WarnUnimplemented("cps", machInst);
const bool enable = bits(machInst, 10, 9) == 0x2;
const uint32_t mods = bits(machInst, 8, 0) |
((enable ? 1 : 0) << 9);
return new Cps(machInst, mods);
} else if ((op2 & 0xf0) == 0xf0) {
return new WarnUnimplemented("dbg", machInst);
} else {

5
src/arch/arm/isa/formats/data.isa
View file

@ -1026,7 +1026,10 @@ def format Thumb16Misc() {{
if (opBits == 2) {
return new Setend(machInst, bits(machInst, 3));
} else if (opBits == 3) {
return new WarnUnimplemented("cps", machInst);
const bool enable = (bits(machInst, 4) == 0);
const uint32_t mods = (bits(machInst, 2, 0) << 5) |
((enable ? 1 : 0) << 9);
return new Cps(machInst, mods);
}
}
case 0x9:

7
src/arch/arm/isa/formats/uncond.isa
View file

@ -46,7 +46,12 @@ def format ArmUnconditional() {{
if (bits((uint32_t)rn, 0) == 1 && op2 == 0) {
return new Setend(machInst, bits(machInst, 9));
} else if (bits((uint32_t)rn, 0) == 0 && bits(op2, 1) == 0) {
return new WarnUnimplemented("cps", machInst);
const bool enable = bits(machInst, 19, 18) == 0x2;
const uint32_t mods = bits(machInst, 4, 0) |
(bits(machInst, 8, 6) << 5) |
(bits(machInst, 17) << 8) |
((enable ? 1 : 0) << 9);
return new Cps(machInst, mods);
}
} else if (bits(op1, 6, 5) == 0x1) {
return new WarnUnimplemented(