Commit graph

17 commits

Author SHA1 Message Date
Steve Reinhardt 5b08e211ab stats: update for O3 changes
Mostly small differences in total ticks, but O3 stall causes
shifted significantly.

30.eon does speed up by ~6% on Alpha and ARM, and 50.vortex
by 4.5% on ARM.  At the other extreme, X86 70.twolf is 0.8%
slower.
2014-06-22 14:33:09 -07:00
Ali Saidi cfb805cc71 stats: update stats for ARMv8 changes 2014-01-24 15:29:34 -06:00
Ali Saidi f3585c841e stats: update stats for cache occupancy and clock domain changes 2014-01-24 15:29:33 -06:00
Steve Reinhardt fbc1feb39a tests: update reference outputs
Apparently only stats.txt was updated the last time, so
this changeset updates other reference output files
(config.ini, simout, simerr, ruby.stats) so that
test output diffs should not be cluttered with irrelevant
changes.  There are a few stats.txt updates too, but
they are in the minority.
2013-09-28 15:25:17 -04:00
Nilay Vaish 4646369afd regressions: update due to cache latency fix 2013-03-27 18:36:21 -05:00
Ali Saidi 09b2430e95 stats: update patches for branch predictor and fetch updates. 2013-03-04 23:33:47 -05:00
Ali Saidi bd31a5dc18 stats: update regressions for o3 changes in renaming and translation. 2013-02-15 17:40:14 -05:00
Nilay Vaish 9bc132e473 regressions: update stats due to branch predictor changes
The actual statistical values are being updated for only two tests belonging
to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others
the patch updates config.ini and name changes to statistical variables.
2013-01-24 12:29:00 -06:00
Ali Saidi 9f15510c2c stats: update stats for previous changes. 2013-01-07 13:05:54 -05:00
Ali Saidi 1dbf9bb4ca update stats for preceeding changes 2012-11-02 11:50:06 -05:00
Ali Saidi 91e74beee6 ARM: update stats for bp and squash fixes. 2012-09-25 11:49:41 -05:00
Ali Saidi b1a58933e0 stats: update stats for icache change not allowing dirty data 2012-07-27 16:08:05 -04:00
Andreas Hansson fda338f8d3 Stats: Updates due to bus changes
This patch bumps all the stats to reflect the bus changes, i.e. the
introduction of the state variable, the division into a request and
response layer, and the new default bus width of 8 bytes.
2012-07-09 12:35:41 -04:00
Ali Saidi 3965ecc36b Stats: Update stats for RAS and LRU fixes. 2012-06-29 11:19:03 -04:00
Ali Saidi e62beaaa8f ARM: update stats for clock frequency fix. 2012-05-10 18:04:29 -05:00
Ali Saidi 3c666083c6 ARM: Update stats for IT and conditional branch changes 2012-03-21 10:36:45 -05:00
Geoffrey Blake da0d67c3d6 CheckerCPU: Make some basic regression tests for CheckerCPU
Adds regression tests for the CheckerCPU. ARM ISA support
only at this point.
2012-03-09 09:59:28 -05:00