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gem5/tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt

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ruby: Initial references for ruby regressions
2009-05-11 19:38:46 +02:00
---------- Begin Simulation Statistics ----------
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
sim_seconds 0.000107 # Number of seconds simulated
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
sim_ticks 107256 # Number of ticks simulated
final_tick 107256 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
X86 Regressions: Update stats due to fence instruction
2012-01-10 16:59:01 +01:00
sim_freq 1000000000 # Frequency of simulated ticks
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
host_inst_rate 57113 # Simulator instruction rate (inst/s)
host_op_rate 103447 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 1138055 # Simulator tick rate (ticks/s)
host_mem_usage 467864 # Number of bytes of host memory used
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
host_seconds 0.09 # Real time elapsed on the host
stats: Update stats for syscall emulation Linux kernel changes.
2012-08-15 16:38:05 +02:00
sim_insts 5381 # Number of instructions simulated
regressions: x86: stats updates due to new x87 insts
2013-03-11 23:45:09 +01:00
sim_ops 9748 # Number of ops (including micro ops) simulated
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 88128 # Number of bytes read from this memory
system.mem_ctrls.bytes_read::total 88128 # Number of bytes read from this memory
system.mem_ctrls.bytes_written::ruby.dir_cntrl0 87872 # Number of bytes written to this memory
system.mem_ctrls.bytes_written::total 87872 # Number of bytes written to this memory
system.mem_ctrls.num_reads::ruby.dir_cntrl0 1377 # Number of read requests responded to by this memory
system.mem_ctrls.num_reads::total 1377 # Number of read requests responded to by this memory
system.mem_ctrls.num_writes::ruby.dir_cntrl0 1373 # Number of write requests responded to by this memory
system.mem_ctrls.num_writes::total 1373 # Number of write requests responded to by this memory
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.bw_read::ruby.dir_cntrl0 821660327 # Total read bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_read::total 821660327 # Total read bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_write::ruby.dir_cntrl0 819273514 # Write bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_write::total 819273514 # Write bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_total::ruby.dir_cntrl0 1640933841 # Total bandwidth to/from this memory (bytes/s)
system.mem_ctrls.bw_total::total 1640933841 # Total bandwidth to/from this memory (bytes/s)
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.readReqs 1377 # Number of read requests accepted
system.mem_ctrls.writeReqs 1373 # Number of write requests accepted
system.mem_ctrls.readBursts 1377 # Number of DRAM read bursts, including those serviced by the write queue
system.mem_ctrls.writeBursts 1373 # Number of DRAM write bursts, including those merged in the write queue
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.bytesReadDRAM 43264 # Total number of bytes read from DRAM
system.mem_ctrls.bytesReadWrQ 44864 # Total number of bytes read from write queue
system.mem_ctrls.bytesWritten 43264 # Total number of bytes written to DRAM
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.bytesReadSys 88128 # Total read bytes from the system interface side
system.mem_ctrls.bytesWrittenSys 87872 # Total written bytes from the system interface side
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.servicedByWrQ 701 # Number of DRAM read bursts serviced by the write queue
system.mem_ctrls.mergedWrBursts 674 # Number of DRAM write bursts merged with an existing one
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.perBankRdBursts::0 56 # Per bank write bursts
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.perBankRdBursts::1 1 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::2 6 # Per bank write bursts
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.perBankRdBursts::3 12 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::4 54 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::5 56 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::6 43 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::7 70 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::8 29 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::9 129 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::10 124 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::11 21 # Per bank write bursts
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.perBankRdBursts::12 2 # Per bank write bursts
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.perBankRdBursts::13 34 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::14 8 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::15 31 # Per bank write bursts
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.perBankWrBursts::0 50 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::1 1 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::2 6 # Per bank write bursts
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.perBankWrBursts::3 11 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::4 54 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::5 54 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::6 41 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::7 72 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::8 30 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::9 129 # Per bank write bursts
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.perBankWrBursts::10 129 # Per bank write bursts
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.perBankWrBursts::11 21 # Per bank write bursts
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.perBankWrBursts::12 2 # Per bank write bursts
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.perBankWrBursts::13 36 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::14 8 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::15 32 # Per bank write bursts
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.totGap 107152 # Total gap between requests
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::6 1377 # Read request sizes (log2)
system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::6 1373 # Write request sizes (log2)
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.rdQLenPdf::0 676 # What read queue length does an incoming req see
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.wrQLenPdf::15 7 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::16 10 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::17 40 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::18 45 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::19 43 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::20 44 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::21 42 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::22 43 # What write queue length does an incoming req see
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.wrQLenPdf::23 41 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::24 41 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::25 41 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::26 41 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::27 41 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::28 41 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::29 41 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::30 41 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::31 41 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::32 41 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.bytesPerActivate::samples 276 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::mean 306.782609 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::gmean 194.488181 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::stdev 303.473845 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::0-127 80 28.99% 28.99% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::128-255 80 28.99% 57.97% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::256-383 33 11.96% 69.93% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::384-511 22 7.97% 77.90% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::512-639 18 6.52% 84.42% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::640-767 7 2.54% 86.96% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::768-895 7 2.54% 89.49% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::896-1023 4 1.45% 90.94% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::1024-1151 25 9.06% 100.00% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::total 276 # Bytes accessed per row activation
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.rdPerTurnAround::samples 41 # Reads before turning the bus around for writes
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.rdPerTurnAround::mean 16.243902 # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::gmean 16.023325 # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::stdev 3.314970 # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::12-13 1 2.44% 2.44% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::14-15 16 39.02% 41.46% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::16-17 18 43.90% 85.37% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::18-19 5 12.20% 97.56% # Reads before turning the bus around for writes
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.rdPerTurnAround::34-35 1 2.44% 100.00% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::total 41 # Reads before turning the bus around for writes
system.mem_ctrls.wrPerTurnAround::samples 41 # Writes before turning the bus around for reads
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.wrPerTurnAround::mean 16.487805 # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::gmean 16.459950 # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::stdev 1.003044 # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::16 32 78.05% 78.05% # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::17 2 4.88% 82.93% # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::18 3 7.32% 90.24% # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::19 4 9.76% 100.00% # Writes before turning the bus around for reads
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.wrPerTurnAround::total 41 # Writes before turning the bus around for reads
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.totQLat 9573 # Total ticks spent queuing
system.mem_ctrls.totMemAccLat 22417 # Total ticks spent from burst creation until serviced by the DRAM
system.mem_ctrls.totBusLat 3380 # Total ticks spent in databus transfers
system.mem_ctrls.avgQLat 14.16 # Average queueing delay per DRAM burst
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.avgMemAccLat 33.16 # Average memory access latency per DRAM burst
system.mem_ctrls.avgRdBW 403.37 # Average DRAM read bandwidth in MiByte/s
system.mem_ctrls.avgWrBW 403.37 # Average achieved write bandwidth in MiByte/s
system.mem_ctrls.avgRdBWSys 821.66 # Average system read bandwidth in MiByte/s
system.mem_ctrls.avgWrBWSys 819.27 # Average system write bandwidth in MiByte/s
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.busUtil 6.30 # Data bus utilization in percentage
system.mem_ctrls.busUtilRead 3.15 # Data bus utilization in percentage for reads
system.mem_ctrls.busUtilWrite 3.15 # Data bus utilization in percentage for writes
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.avgWrQLen 25.88 # Average write queue length when enqueuing
system.mem_ctrls.readRowHits 443 # Number of row buffer hits during reads
system.mem_ctrls.writeRowHits 622 # Number of row buffer hits during writes
system.mem_ctrls.readRowHitRate 65.53 # Row buffer hit rate for reads
system.mem_ctrls.writeRowHitRate 88.98 # Row buffer hit rate for writes
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.avgGap 38.96 # Average gap between requests
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls.pageHitRate 77.45 # Row buffer hit rate, read and write combined
system.mem_ctrls_0.actEnergy 703080 # Energy for activate commands per rank (pJ)
system.mem_ctrls_0.preEnergy 390600 # Energy for precharge commands per rank (pJ)
system.mem_ctrls_0.readEnergy 3319680 # Energy for read commands per rank (pJ)
system.mem_ctrls_0.writeEnergy 2685312 # Energy for write commands per rank (pJ)
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls_0.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ)
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls_0.actBackEnergy 57105108 # Energy for active background per rank (pJ)
system.mem_ctrls_0.preBackEnergy 10794600 # Energy for precharge background per rank (pJ)
system.mem_ctrls_0.totalEnergy 81609660 # Total energy per rank (pJ)
system.mem_ctrls_0.averagePower 804.210371 # Core power per rank (mW)
system.mem_ctrls_0.memoryStateTime::IDLE 17627 # Time in different power states
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls_0.memoryStateTime::REF 3380 # Time in different power states
system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls_0.memoryStateTime::ACT 80485 # Time in different power states
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls_1.actEnergy 1292760 # Energy for activate commands per rank (pJ)
system.mem_ctrls_1.preEnergy 718200 # Energy for precharge commands per rank (pJ)
system.mem_ctrls_1.readEnergy 4630080 # Energy for read commands per rank (pJ)
system.mem_ctrls_1.writeEnergy 3805056 # Energy for write commands per rank (pJ)
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls_1.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ)
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls_1.actBackEnergy 62793936 # Energy for active background per rank (pJ)
system.mem_ctrls_1.preBackEnergy 5804400 # Energy for precharge background per rank (pJ)
system.mem_ctrls_1.totalEnergy 85655712 # Total energy per rank (pJ)
system.mem_ctrls_1.averagePower 844.081594 # Core power per rank (mW)
system.mem_ctrls_1.memoryStateTime::IDLE 9408 # Time in different power states
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls_1.memoryStateTime::REF 3380 # Time in different power states
system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.mem_ctrls_1.memoryStateTime::ACT 88844 # Time in different power states
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states
system.cpu.clk_domain.clock 1 # Clock period in ticks
system.cpu.apic_clk_domain.clock 16 # Clock period in ticks
system.cpu.workload.num_syscalls 11 # Number of system calls
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.cpu.numCycles 107256 # number of cpu cycles simulated
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 5381 # Number of instructions committed
system.cpu.committedOps 9748 # Number of ops (including micro ops) committed
system.cpu.num_int_alu_accesses 9654 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
system.cpu.num_func_calls 209 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 899 # number of instructions that are conditional controls
system.cpu.num_int_insts 9654 # number of integer instructions
system.cpu.num_fp_insts 0 # number of float instructions
system.cpu.num_int_register_reads 18335 # number of times the integer registers were read
system.cpu.num_int_register_writes 7527 # number of times the integer registers were written
system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
system.cpu.num_cc_register_reads 6487 # number of times the CC registers were read
system.cpu.num_cc_register_writes 3536 # number of times the CC registers were written
system.cpu.num_mem_refs 1988 # number of memory refs
system.cpu.num_load_insts 1053 # Number of load instructions
system.cpu.num_store_insts 935 # Number of store instructions
system.cpu.num_idle_cycles 0.999991 # Number of idle cycles
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.cpu.num_busy_cycles 107255.000009 # Number of busy cycles
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.cpu.not_idle_fraction 0.999991 # Percentage of non-idle cycles
system.cpu.idle_fraction 0.000009 # Percentage of idle cycles
system.cpu.Branches 1208 # Number of branches fetched
system.cpu.op_class::No_OpClass 1 0.01% 0.01% # Class of executed instruction
system.cpu.op_class::IntAlu 7749 79.49% 79.50% # Class of executed instruction
system.cpu.op_class::IntMult 3 0.03% 79.53% # Class of executed instruction
system.cpu.op_class::IntDiv 7 0.07% 79.61% # Class of executed instruction
system.cpu.op_class::FloatAdd 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::FloatCmp 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::FloatCvt 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::FloatMult 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::FloatDiv 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::FloatSqrt 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdAdd 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdAddAcc 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdAlu 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdCmp 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdCvt 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdMisc 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdMult 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdMultAcc 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdShift 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdShiftAcc 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdSqrt 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdFloatAdd 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdFloatAlu 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdFloatCmp 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdFloatCvt 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdFloatDiv 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdFloatMisc 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdFloatMult 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdFloatMultAcc 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::SimdFloatSqrt 0 0.00% 79.61% # Class of executed instruction
system.cpu.op_class::MemRead 1053 10.80% 90.41% # Class of executed instruction
system.cpu.op_class::MemWrite 935 9.59% 100.00% # Class of executed instruction
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::total 9748 # Class of executed instruction
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
system.ruby.clk_domain.clock 1 # Clock period in ticks
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.delayHist::bucket_size 1 # delay histogram for all message
system.ruby.delayHist::max_bucket 9 # delay histogram for all message
system.ruby.delayHist::samples 2750 # delay histogram for all message
system.ruby.delayHist | 2750 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message
system.ruby.delayHist::total 2750 # delay histogram for all message
system.ruby.outstanding_req_hist::bucket_size 1
system.ruby.outstanding_req_hist::max_bucket 9
stats: updates due to previous mmap and exit_group patches.
2014-10-20 23:48:19 +02:00
system.ruby.outstanding_req_hist::samples 8852
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.outstanding_req_hist::mean 1
system.ruby.outstanding_req_hist::gmean 1
stats: updates due to previous mmap and exit_group patches.
2014-10-20 23:48:19 +02:00
system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 8852 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.outstanding_req_hist::total 8852
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.latency_hist::bucket_size 64
system.ruby.latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.latency_hist::samples 8852
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.latency_hist::mean 11.116584
system.ruby.latency_hist::gmean 4.640695
system.ruby.latency_hist::stdev 22.790037
system.ruby.latency_hist | 8597 97.12% 97.12% | 214 2.42% 99.54% | 29 0.33% 99.86% | 4 0.05% 99.91% | 5 0.06% 99.97% | 3 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.latency_hist::total 8852
system.ruby.hit_latency_hist::bucket_size 1
system.ruby.hit_latency_hist::max_bucket 9
system.ruby.hit_latency_hist::samples 7475
system.ruby.hit_latency_hist::mean 3
system.ruby.hit_latency_hist::gmean 3.000000
system.ruby.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 7475 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.hit_latency_hist::total 7475
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.miss_latency_hist::bucket_size 64
system.ruby.miss_latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.miss_latency_hist::samples 1377
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.miss_latency_hist::mean 55.177197
system.ruby.miss_latency_hist::gmean 49.553011
system.ruby.miss_latency_hist::stdev 32.253276
system.ruby.miss_latency_hist | 1122 81.48% 81.48% | 214 15.54% 97.02% | 29 2.11% 99.13% | 4 0.29% 99.42% | 5 0.36% 99.78% | 3 0.22% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.miss_latency_hist::total 1377
system.ruby.Directory.incomplete_times 1376
stats: updates statistics for ruby regressions
2013-05-21 18:32:57 +02:00
system.ruby.l1_cntrl0.cacheMemory.demand_hits 7475 # Number of cache demand hits
system.ruby.l1_cntrl0.cacheMemory.demand_misses 1377 # Number of cache demand misses
system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8852 # Number of cache demand accesses
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.network.routers0.percent_links_utilized 6.409898
stats: ruby: updates due to recent changes.
2013-09-06 23:21:36 +02:00
system.ruby.network.routers0.msg_count.Control::2 1377
system.ruby.network.routers0.msg_count.Data::2 1373
system.ruby.network.routers0.msg_count.Response_Data::4 1377
system.ruby.network.routers0.msg_count.Writeback_Control::3 1373
system.ruby.network.routers0.msg_bytes.Control::2 11016
system.ruby.network.routers0.msg_bytes.Data::2 98856
system.ruby.network.routers0.msg_bytes.Response_Data::4 99144
system.ruby.network.routers0.msg_bytes.Writeback_Control::3 10984
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.network.routers1.percent_links_utilized 6.409898
stats: ruby: updates due to recent changes.
2013-09-06 23:21:36 +02:00
system.ruby.network.routers1.msg_count.Control::2 1377
system.ruby.network.routers1.msg_count.Data::2 1373
system.ruby.network.routers1.msg_count.Response_Data::4 1377
system.ruby.network.routers1.msg_count.Writeback_Control::3 1373
system.ruby.network.routers1.msg_bytes.Control::2 11016
system.ruby.network.routers1.msg_bytes.Data::2 98856
system.ruby.network.routers1.msg_bytes.Response_Data::4 99144
system.ruby.network.routers1.msg_bytes.Writeback_Control::3 10984
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.network.routers2.percent_links_utilized 6.409898
stats: ruby: updates due to recent changes.
2013-09-06 23:21:36 +02:00
system.ruby.network.routers2.msg_count.Control::2 1377
system.ruby.network.routers2.msg_count.Data::2 1373
system.ruby.network.routers2.msg_count.Response_Data::4 1377
system.ruby.network.routers2.msg_count.Writeback_Control::3 1373
system.ruby.network.routers2.msg_bytes.Control::2 11016
system.ruby.network.routers2.msg_bytes.Data::2 98856
system.ruby.network.routers2.msg_bytes.Response_Data::4 99144
system.ruby.network.routers2.msg_bytes.Writeback_Control::3 10984
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
system.ruby.network.msg_count.Control 4131
system.ruby.network.msg_count.Data 4119
system.ruby.network.msg_count.Response_Data 4131
system.ruby.network.msg_count.Writeback_Control 4119
system.ruby.network.msg_byte.Control 33048
system.ruby.network.msg_byte.Data 296568
system.ruby.network.msg_byte.Response_Data 297432
system.ruby.network.msg_byte.Writeback_Control 32952
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.network.routers0.throttle0.link_utilization 6.417357
stats: ruby: updates due to recent changes.
2013-09-06 23:21:36 +02:00
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1377
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1373
system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 99144
system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 10984
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.network.routers0.throttle1.link_utilization 6.402439
stats: ruby: updates due to recent changes.
2013-09-06 23:21:36 +02:00
system.ruby.network.routers0.throttle1.msg_count.Control::2 1377
system.ruby.network.routers0.throttle1.msg_count.Data::2 1373
system.ruby.network.routers0.throttle1.msg_bytes.Control::2 11016
system.ruby.network.routers0.throttle1.msg_bytes.Data::2 98856
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.network.routers1.throttle0.link_utilization 6.402439
stats: ruby: updates due to recent changes.
2013-09-06 23:21:36 +02:00
system.ruby.network.routers1.throttle0.msg_count.Control::2 1377
system.ruby.network.routers1.throttle0.msg_count.Data::2 1373
system.ruby.network.routers1.throttle0.msg_bytes.Control::2 11016
system.ruby.network.routers1.throttle0.msg_bytes.Data::2 98856
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.network.routers1.throttle1.link_utilization 6.417357
stats: ruby: updates due to recent changes.
2013-09-06 23:21:36 +02:00
system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1377
system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1373
system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 99144
system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 10984
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.network.routers2.throttle0.link_utilization 6.417357
stats: ruby: updates due to recent changes.
2013-09-06 23:21:36 +02:00
system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1377
system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1373
system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 99144
system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 10984
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.network.routers2.throttle1.link_utilization 6.402439
stats: ruby: updates due to recent changes.
2013-09-06 23:21:36 +02:00
system.ruby.network.routers2.throttle1.msg_count.Control::2 1377
system.ruby.network.routers2.throttle1.msg_count.Data::2 1373
system.ruby.network.routers2.throttle1.msg_bytes.Control::2 11016
system.ruby.network.routers2.throttle1.msg_bytes.Data::2 98856
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1::samples 1377 # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1 | 1377 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1::total 1377 # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2::samples 1373 # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2 | 1373 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2::total 1373 # delay histogram for vnet_2
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.LD.latency_hist::bucket_size 64
system.ruby.LD.latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.LD.latency_hist::samples 1045
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.LD.latency_hist::mean 24.565550
system.ruby.LD.latency_hist::gmean 10.818925
system.ruby.LD.latency_hist::stdev 28.664875
system.ruby.LD.latency_hist | 965 92.34% 92.34% | 74 7.08% 99.43% | 4 0.38% 99.81% | 1 0.10% 99.90% | 0 0.00% 99.90% | 1 0.10% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.LD.latency_hist::total 1045
system.ruby.LD.hit_latency_hist::bucket_size 1
system.ruby.LD.hit_latency_hist::max_bucket 9
system.ruby.LD.hit_latency_hist::samples 546
system.ruby.LD.hit_latency_hist::mean 3
system.ruby.LD.hit_latency_hist::gmean 3.000000
system.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 546 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.hit_latency_hist::total 546
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.LD.miss_latency_hist::bucket_size 64
system.ruby.LD.miss_latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.LD.miss_latency_hist::samples 499
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.LD.miss_latency_hist::mean 48.162325
system.ruby.LD.miss_latency_hist::gmean 44.026667
system.ruby.LD.miss_latency_hist::stdev 25.587548
system.ruby.LD.miss_latency_hist | 419 83.97% 83.97% | 74 14.83% 98.80% | 4 0.80% 99.60% | 1 0.20% 99.80% | 0 0.00% 99.80% | 1 0.20% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.LD.miss_latency_hist::total 499
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.ST.latency_hist::bucket_size 64
system.ruby.ST.latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.ST.latency_hist::samples 935
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.ST.latency_hist::mean 16.914439
system.ruby.ST.latency_hist::gmean 6.394076
system.ruby.ST.latency_hist::stdev 28.735394
system.ruby.ST.latency_hist | 895 95.72% 95.72% | 33 3.53% 99.25% | 3 0.32% 99.57% | 2 0.21% 99.79% | 1 0.11% 99.89% | 1 0.11% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.ST.latency_hist::total 935
system.ruby.ST.hit_latency_hist::bucket_size 1
system.ruby.ST.hit_latency_hist::max_bucket 9
system.ruby.ST.hit_latency_hist::samples 681
system.ruby.ST.hit_latency_hist::mean 3
system.ruby.ST.hit_latency_hist::gmean 3.000000
system.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 681 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.ST.hit_latency_hist::total 681
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.ST.miss_latency_hist::bucket_size 64
system.ruby.ST.miss_latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.ST.miss_latency_hist::samples 254
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.ST.miss_latency_hist::mean 54.220472
system.ruby.ST.miss_latency_hist::gmean 48.633946
system.ruby.ST.miss_latency_hist::stdev 33.614512
system.ruby.ST.miss_latency_hist | 214 84.25% 84.25% | 33 12.99% 97.24% | 3 1.18% 98.43% | 2 0.79% 99.21% | 1 0.39% 99.61% | 1 0.39% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.ST.miss_latency_hist::total 254
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.IFETCH.latency_hist::bucket_size 64
system.ruby.IFETCH.latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.IFETCH.latency_hist::samples 6864
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.IFETCH.latency_hist::mean 8.284237
system.ruby.IFETCH.latency_hist::gmean 3.905930
system.ruby.IFETCH.latency_hist::stdev 19.803554
system.ruby.IFETCH.latency_hist | 6729 98.03% 98.03% | 107 1.56% 99.59% | 22 0.32% 99.91% | 1 0.01% 99.93% | 4 0.06% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.IFETCH.latency_hist::total 6864
system.ruby.IFETCH.hit_latency_hist::bucket_size 1
system.ruby.IFETCH.hit_latency_hist::max_bucket 9
system.ruby.IFETCH.hit_latency_hist::samples 6241
system.ruby.IFETCH.hit_latency_hist::mean 3
system.ruby.IFETCH.hit_latency_hist::gmean 3.000000
system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 6241 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.IFETCH.hit_latency_hist::total 6241
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.IFETCH.miss_latency_hist::bucket_size 64
system.ruby.IFETCH.miss_latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.IFETCH.miss_latency_hist::samples 623
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.IFETCH.miss_latency_hist::mean 61.219904
system.ruby.IFETCH.miss_latency_hist::gmean 54.926300
system.ruby.IFETCH.miss_latency_hist::stdev 35.218812
system.ruby.IFETCH.miss_latency_hist | 488 78.33% 78.33% | 107 17.17% 95.51% | 22 3.53% 99.04% | 1 0.16% 99.20% | 4 0.64% 99.84% | 1 0.16% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.IFETCH.miss_latency_hist::total 623
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.RMW_Read.latency_hist::bucket_size 4
system.ruby.RMW_Read.latency_hist::max_bucket 39
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.RMW_Read.latency_hist::samples 8
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.RMW_Read.latency_hist::mean 6.875000
system.ruby.RMW_Read.latency_hist::gmean 4.063647
system.ruby.RMW_Read.latency_hist::stdev 10.960155
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.RMW_Read.latency_hist | 7 87.50% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 1 12.50% 100.00% | 0 0.00% 100.00%
system.ruby.RMW_Read.latency_hist::total 8
system.ruby.RMW_Read.hit_latency_hist::bucket_size 1
system.ruby.RMW_Read.hit_latency_hist::max_bucket 9
system.ruby.RMW_Read.hit_latency_hist::samples 7
system.ruby.RMW_Read.hit_latency_hist::mean 3
system.ruby.RMW_Read.hit_latency_hist::gmean 3.000000
system.ruby.RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 7 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.RMW_Read.hit_latency_hist::total 7
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.RMW_Read.miss_latency_hist::bucket_size 4
system.ruby.RMW_Read.miss_latency_hist::max_bucket 39
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.RMW_Read.miss_latency_hist::samples 1
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.RMW_Read.miss_latency_hist::mean 34
system.ruby.RMW_Read.miss_latency_hist::gmean 34.000000
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.RMW_Read.miss_latency_hist::stdev nan
system.ruby.RMW_Read.miss_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
system.ruby.RMW_Read.miss_latency_hist::total 1
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.Directory.miss_mach_latency_hist::bucket_size 64
system.ruby.Directory.miss_mach_latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.Directory.miss_mach_latency_hist::samples 1377
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.Directory.miss_mach_latency_hist::mean 55.177197
system.ruby.Directory.miss_mach_latency_hist::gmean 49.553011
system.ruby.Directory.miss_mach_latency_hist::stdev 32.253276
system.ruby.Directory.miss_mach_latency_hist | 1122 81.48% 81.48% | 214 15.54% 97.02% | 29 2.11% 99.13% | 4 0.29% 99.42% | 5 0.36% 99.78% | 3 0.22% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.Directory.miss_mach_latency_hist::total 1377
system.ruby.Directory.miss_latency_hist.issue_to_initial_request::bucket_size 1
system.ruby.Directory.miss_latency_hist.issue_to_initial_request::max_bucket 9
system.ruby.Directory.miss_latency_hist.issue_to_initial_request::samples 1
system.ruby.Directory.miss_latency_hist.issue_to_initial_request::stdev nan
system.ruby.Directory.miss_latency_hist.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.Directory.miss_latency_hist.issue_to_initial_request::total 1
system.ruby.Directory.miss_latency_hist.initial_to_forward::bucket_size 1
system.ruby.Directory.miss_latency_hist.initial_to_forward::max_bucket 9
system.ruby.Directory.miss_latency_hist.initial_to_forward::samples 1
system.ruby.Directory.miss_latency_hist.initial_to_forward::stdev nan
system.ruby.Directory.miss_latency_hist.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.Directory.miss_latency_hist.initial_to_forward::total 1
system.ruby.Directory.miss_latency_hist.forward_to_first_response::bucket_size 1
system.ruby.Directory.miss_latency_hist.forward_to_first_response::max_bucket 9
system.ruby.Directory.miss_latency_hist.forward_to_first_response::samples 1
system.ruby.Directory.miss_latency_hist.forward_to_first_response::stdev nan
system.ruby.Directory.miss_latency_hist.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.Directory.miss_latency_hist.forward_to_first_response::total 1
system.ruby.Directory.miss_latency_hist.first_response_to_completion::bucket_size 8
system.ruby.Directory.miss_latency_hist.first_response_to_completion::max_bucket 79
system.ruby.Directory.miss_latency_hist.first_response_to_completion::samples 1
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.Directory.miss_latency_hist.first_response_to_completion::mean 75
system.ruby.Directory.miss_latency_hist.first_response_to_completion::gmean 75.000000
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.Directory.miss_latency_hist.first_response_to_completion::stdev nan
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.Directory.miss_latency_hist.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.Directory.miss_latency_hist.first_response_to_completion::total 1
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.LD.Directory.miss_type_mach_latency_hist::bucket_size 64
system.ruby.LD.Directory.miss_type_mach_latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.LD.Directory.miss_type_mach_latency_hist::samples 499
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.LD.Directory.miss_type_mach_latency_hist::mean 48.162325
system.ruby.LD.Directory.miss_type_mach_latency_hist::gmean 44.026667
system.ruby.LD.Directory.miss_type_mach_latency_hist::stdev 25.587548
system.ruby.LD.Directory.miss_type_mach_latency_hist | 419 83.97% 83.97% | 74 14.83% 98.80% | 4 0.80% 99.60% | 1 0.20% 99.80% | 0 0.00% 99.80% | 1 0.20% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.LD.Directory.miss_type_mach_latency_hist::total 499
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.ST.Directory.miss_type_mach_latency_hist::bucket_size 64
system.ruby.ST.Directory.miss_type_mach_latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.ST.Directory.miss_type_mach_latency_hist::samples 254
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.ST.Directory.miss_type_mach_latency_hist::mean 54.220472
system.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 48.633946
system.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 33.614512
system.ruby.ST.Directory.miss_type_mach_latency_hist | 214 84.25% 84.25% | 33 12.99% 97.24% | 3 1.18% 98.43% | 2 0.79% 99.21% | 1 0.39% 99.61% | 1 0.39% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.ST.Directory.miss_type_mach_latency_hist::total 254
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::bucket_size 64
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::max_bucket 639
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::samples 623
stats: Update stats for cache, crossbar and DRAM changes This update includes the changes to whole-line writes, the refinement of Read to ReadClean and ReadShared, the introduction of CleanEvict for snoop-filter tracking, and updates to the DRAM command scheduler for bank-group-aware scheduling. Needless to say, almost every regression is affected.
2015-07-03 16:15:03 +02:00
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::mean 61.219904
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 54.926300
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 35.218812
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 488 78.33% 78.33% | 107 17.17% 95.51% | 22 3.53% 99.04% | 1 0.16% 99.20% | 4 0.64% 99.84% | 1 0.16% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::total 623
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::bucket_size 4
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::max_bucket 39
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::samples 1
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::mean 34
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::gmean 34.000000
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::stdev nan
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::total 1
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.ruby.Directory_Controller.GETX 1377 0.00% 0.00%
system.ruby.Directory_Controller.PUTX 1373 0.00% 0.00%
system.ruby.Directory_Controller.Memory_Data 1377 0.00% 0.00%
system.ruby.Directory_Controller.Memory_Ack 1373 0.00% 0.00%
system.ruby.Directory_Controller.I.GETX 1377 0.00% 0.00%
system.ruby.Directory_Controller.M.PUTX 1373 0.00% 0.00%
system.ruby.Directory_Controller.IM.Memory_Data 1377 0.00% 0.00%
system.ruby.Directory_Controller.MI.Memory_Ack 1373 0.00% 0.00%
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.L1Cache_Controller.Load 1045 0.00% 0.00%
system.ruby.L1Cache_Controller.Ifetch 6864 0.00% 0.00%
system.ruby.L1Cache_Controller.Store 943 0.00% 0.00%
system.ruby.L1Cache_Controller.Data 1377 0.00% 0.00%
system.ruby.L1Cache_Controller.Replacement 1373 0.00% 0.00%
system.ruby.L1Cache_Controller.Writeback_Ack 1373 0.00% 0.00%
system.ruby.L1Cache_Controller.I.Load 499 0.00% 0.00%
system.ruby.L1Cache_Controller.I.Ifetch 623 0.00% 0.00%
system.ruby.L1Cache_Controller.I.Store 255 0.00% 0.00%
system.ruby.L1Cache_Controller.M.Load 546 0.00% 0.00%
system.ruby.L1Cache_Controller.M.Ifetch 6241 0.00% 0.00%
system.ruby.L1Cache_Controller.M.Store 688 0.00% 0.00%
system.ruby.L1Cache_Controller.M.Replacement 1373 0.00% 0.00%
system.ruby.L1Cache_Controller.MI.Writeback_Ack 1373 0.00% 0.00%
system.ruby.L1Cache_Controller.IS.Data 1122 0.00% 0.00%
system.ruby.L1Cache_Controller.IM.Data 255 0.00% 0.00%
ruby: Initial references for ruby regressions
2009-05-11 19:38:46 +02:00
---------- End Simulation Statistics ----------
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