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gem5/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini

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ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[root]
type=Root
children=system
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
full_system=true
Stats: Re update stats.
2011-02-08 04:23:13 +01:00
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000
ARM: Add full-system regressions
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[system]
type=LinuxArmSystem
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
atags_addr=256
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
boot_loader=/dist/m5/system/binaries/boot.arm
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
cache_line_size=64
clk_domain=system.clk_domain
dtb_filename=False
all: Update stats for memory per master and total fix.
2012-06-05 07:23:16 +02:00
early_kernel_symbols=false
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
enable_context_switch_stats_dump=false
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
flags_addr=268435504
gic_cpu_addr=520093952
ARM: Add full-system regressions
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init_param=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
kernel=/dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
load_addr_mask=268435455
machine_type=RealView_PBX
mem_mode=timing
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
mem_ranges=0:134217727
regressions: update stats due to branch predictor changes The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
2013-01-24 19:29:00 +01:00
memories=system.physmem system.realview.nvmem
Stats: Update stats for RAS and LRU fixes.
2012-06-29 17:19:03 +02:00
multi_proc=true
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
num_work_ids=16
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
panic_on_oops=true
panic_on_panic=true
ARM: Add full-system regressions
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readfile=tests/halt.sh
symbolfile=
Stats: Re update stats.
2011-02-08 04:23:13 +01:00
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
system_port=system.membus.slave[0]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.bridge]
type=Bridge
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
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delay=50000
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
ranges=268435456:520093695 1073741824:1610612735
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
req_size=16
resp_size=16
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
master=system.iobus.slave[0]
slave=system.membus.master[0]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
[system.cf0]
type=IdeDisk
children=image
delay=1000000
driveID=master
image=system.cf0.image
[system.cf0.image]
type=CowDiskImage
children=child
child=system.cf0.image.child
image_file=
read_only=false
table_size=65536
[system.cf0.image.child]
type=RawDiskImage
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
image_file=/dist/m5/system/disks/linux-arm-ael.img
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
read_only=true
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.clk_domain]
type=SrcClockDomain
clock=1000
voltage_domain=system.voltage_domain
ARM: Add full-system regressions
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[system.cpu]
type=TimingSimpleCPU
stats: update stats for previous changes.
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children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer
ARM: Add full-system regressions
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checker=Null
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
ARM: Add full-system regressions
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cpu_id=0
do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu.dtb
function_trace=false
function_trace_start=0
interrupts=system.cpu.interrupts
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
isa=system.cpu.isa
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
itb=system.cpu.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
numThreads=1
profile=0
progress_interval=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
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simpoint_start_insts=
stats: update stats for previous changes.
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switched_out=false
ARM: Add full-system regressions
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system=system
tracer=system.cpu.tracer
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
workload=
ARM: Add full-system regressions
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dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
addr_ranges=0:18446744073709551615
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
assoc=4
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
forward_snoops=true
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
hit_latency=2
ARM: Update stats for the previous changes and add ARM_FS/O3 regression.
2011-03-18 01:20:22 +01:00
is_top_level=true
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
max_miss_count=0
mshrs=4
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
response_latency=2
ARM: Add full-system regressions
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size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu.dcache.tags
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
tgts_per_mshr=20
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
mem_side=system.cpu.toL2Bus.slave[1]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu.dcache.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
hit_latency=2
size=32768
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.cpu.dtb]
type=ArmTLB
children=walker
size=64
walker=system.cpu.dtb.walker
[system.cpu.dtb.walker]
type=ArmTableWalker
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
num_squash_per_cycle=2
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
sys=system
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
port=system.cpu.toL2Bus.slave[3]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.cpu.icache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
addr_ranges=0:18446744073709551615
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
assoc=1
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
forward_snoops=true
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
hit_latency=2
ARM: Update stats for the previous changes and add ARM_FS/O3 regression.
2011-03-18 01:20:22 +01:00
is_top_level=true
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
max_miss_count=0
mshrs=4
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
response_latency=2
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
size=32768
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu.icache.tags
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
tgts_per_mshr=20
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
mem_side=system.cpu.toL2Bus.slave[0]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu.icache.tags]
type=LRU
assoc=1
block_size=64
clk_domain=system.cpu_clk_domain
hit_latency=2
size=32768
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.cpu.interrupts]
type=ArmInterrupts
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
[system.cpu.isa]
type=ArmISA
fpsid=1090793632
id_isar0=34607377
id_isar1=34677009
id_isar2=555950401
id_isar3=17899825
id_isar4=268501314
id_isar5=0
id_mmfr0=3
id_mmfr1=0
id_mmfr2=19070976
id_mmfr3=4027589137
id_pfr0=49
id_pfr1=1
midr=890224640
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.cpu.itb]
type=ArmTLB
children=walker
size=64
walker=system.cpu.itb.walker
[system.cpu.itb.walker]
type=ArmTableWalker
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
num_squash_per_cycle=2
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
sys=system
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
port=system.cpu.toL2Bus.slave[2]
[system.cpu.l2cache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
addr_ranges=0:18446744073709551615
assoc=8
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
forward_snoops=true
hit_latency=20
is_top_level=false
max_miss_count=0
mshrs=20
prefetch_on_access=false
prefetcher=Null
response_latency=20
size=4194304
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.cpu.l2cache.tags
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
tgts_per_mshr=12
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu.l2cache.tags]
type=LRU
assoc=8
block_size=64
clk_domain=system.cpu_clk_domain
hit_latency=20
size=4194304
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
[system.cpu.toL2Bus]
type=CoherentBus
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.cpu_clk_domain
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
header_cycles=1
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
system=system
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
use_default_range=false
width=32
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.cpu.tracer]
type=ExeTracer
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
voltage_domain=system.voltage_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.intrctrl]
type=IntrControl
sys=system
[system.iobus]
all: Update stats for memory per master and total fix.
2012-06-05 07:23:16 +02:00
type=NoncoherentBus
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
header_cycles=1
use_default_range=false
Stats: Updates due to bus changes This patch bumps all the stats to reflect the bus changes, i.e. the introduction of the state variable, the division into a request and response layer, and the new default bus width of 8 bytes.
2012-07-09 18:35:41 +02:00
width=8
ARM: Update stats for IT and conditional branch changes
2012-03-21 16:36:45 +01:00
master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.iocache]
type=BaseCache
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
children=tags
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
addr_ranges=0:134217727
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
assoc=8
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
forward_snoops=false
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
hit_latency=50
is_top_level=true
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
max_miss_count=0
mshrs=20
prefetch_on_access=false
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
prefetcher=Null
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
response_latency=50
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
size=1024
stats: update stats for insts/ops and master id changes
2012-02-12 23:07:43 +01:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tags=system.iocache.tags
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
tgts_per_mshr=12
two_queue=false
write_buffers=8
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
cpu_side=system.iobus.master[25]
mem_side=system.membus.slave[2]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.iocache.tags]
type=LRU
assoc=8
block_size=64
clk_domain=system.clk_domain
hit_latency=50
size=1024
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.membus]
all: Update stats for memory per master and total fix.
2012-06-05 07:23:16 +02:00
type=CoherentBus
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
children=badaddr_responder
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
header_cycles=1
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
system=system
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
use_default_range=false
Stats: Updates due to bus changes This patch bumps all the stats to reflect the bus changes, i.e. the introduction of the state variable, the division into a request and response layer, and the new default bus width of 8 bytes.
2012-07-09 18:35:41 +02:00
width=8
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
default=system.membus.badaddr_responder.pio
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.membus.badaddr_responder]
type=IsaFake
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
fake_mem=false
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
pio_addr=0
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
pio_size=8
ret_bad_addr=true
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=warn
pio=system.membus.default
[system.physmem]
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
type=SimpleDRAM
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
activation_limit=4
addr_mapping=RaBaChCo
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
banks_per_rank=8
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
burst_length=8
channels=1
clk_domain=system.clk_domain
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
conf_table_reported=true
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
device_bus_width=8
device_rowbuffer_size=1024
devices_per_rank=8
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
in_addr_map=true
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
mem_sched_policy=frfcfs
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
null=false
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
page_policy=open
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
range=0:134217727
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
ranks_per_channel=2
read_buffer_size=32
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
static_backend_latency=10000
static_frontend_latency=10000
tBURST=5000
tCL=13750
tRCD=13750
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
tREFI=7800000
tRFC=300000
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
tRP=13750
tWTR=7500
tXAW=40000
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
write_buffer_size=32
write_thresh_perc=70
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
port=system.membus.master[6]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview]
type=RealView
ARM: Update stats for IT and conditional branch changes
2012-03-21 16:36:45 +01:00
children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
intrctrl=system.intrctrl
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
max_mem_size=268435456
mem_start_addr=0
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
pci_cfg_base=0
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update ARM_FS stats for mp changes
2011-05-05 03:38:28 +02:00
[system.realview.a9scu]
type=A9SCU
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Update ARM_FS stats for mp changes
2011-05-05 03:38:28 +02:00
pio_addr=520093696
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Update ARM_FS stats for mp changes
2011-05-05 03:38:28 +02:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
pio=system.membus.master[4]
ARM: Update ARM_FS stats for mp changes
2011-05-05 03:38:28 +02:00
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.aaci_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268451840
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[21]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ARM: Update stats for default inclusion of CF adapter.
2011-04-04 18:42:32 +02:00
[system.realview.cf_ctrl]
type=IdeController
BAR0=402653184
BAR0LegacyIO=true
BAR0Size=16
BAR1=402653440
BAR1LegacyIO=true
BAR1Size=1
BAR2=1
BAR2LegacyIO=false
BAR2Size=8
BAR3=1
BAR3LegacyIO=false
BAR3Size=4
BAR4=1
BAR4LegacyIO=false
BAR4Size=16
BAR5=1
BAR5LegacyIO=false
BAR5Size=0
BIST=0
CacheLineSize=0
CardbusCIS=0
ClassCode=1
Command=1
DeviceID=28945
ExpansionROM=0
HeaderType=0
InterruptLine=31
InterruptPin=1
LatencyTimer=0
MaximumLatency=0
MinimumGrant=0
ProgIF=133
Revision=0
Status=640
SubClassCode=1
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Update stats for default inclusion of CF adapter.
2011-04-04 18:42:32 +02:00
config_latency=20000
ctrl_offset=2
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
disks=system.cf0
ARM: Update stats for default inclusion of CF adapter.
2011-04-04 18:42:32 +02:00
io_shift=1
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
pci_bus=2
pci_dev=7
ARM: Update stats for default inclusion of CF adapter.
2011-04-04 18:42:32 +02:00
pci_func=0
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=30000
Stats: Update the statistics for vnc patch.
2011-02-12 01:29:36 +01:00
platform=system.realview
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
config=system.iobus.master[8]
dma=system.iobus.slave[2]
pio=system.iobus.master[7]
Stats: Update the statistics for vnc patch.
2011-02-12 01:29:36 +01:00
ARM: Update regressions for CLCD and KMI additions
2010-11-15 21:04:03 +01:00
[system.realview.clcd]
type=Pl111
amba_id=1315089
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Update regressions for CLCD and KMI additions
2010-11-15 21:04:03 +01:00
gic=system.realview.gic
int_num=55
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
pio_addr=268566528
ARM: Update regressions for CLCD and KMI additions
2010-11-15 21:04:03 +01:00
pio_latency=10000
stats: update stats for previous changes.
2013-01-07 19:05:54 +01:00
pixel_clock=41667
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
Stats: Update the statistics for vnc patch.
2011-02-12 01:29:36 +01:00
vnc=system.vncserver
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
dma=system.iobus.slave[1]
pio=system.iobus.master[4]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.dmac_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268632064
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[9]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.flash_fake]
type=IsaFake
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
fake_mem=true
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
pio_addr=1073741824
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Update ARM_FS stats for mp changes
2011-05-05 03:38:28 +02:00
pio_size=536870912
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[24]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.gic]
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
type=Pl390
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
cpu_addr=520093952
cpu_pio_delay=10000
dist_addr=520097792
dist_pio_delay=10000
ARM: Update ARM_FS stats for mp changes
2011-05-05 03:38:28 +02:00
int_latency=10000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
it_lines=128
platform=system.realview
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
pio=system.membus.master[2]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.gpio0_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268513280
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[16]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.gpio1_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268517376
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[17]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.gpio2_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268521472
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[18]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ARM: Update regressions for CLCD and KMI additions
2010-11-15 21:04:03 +01:00
[system.realview.kmi0]
type=Pl050
amba_id=1314896
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Update regressions for CLCD and KMI additions
2010-11-15 21:04:03 +01:00
gic=system.realview.gic
Stats: Update the statistics for vnc patch.
2011-02-12 01:29:36 +01:00
int_delay=1000000
ARM: Update regressions for CLCD and KMI additions
2010-11-15 21:04:03 +01:00
int_num=52
Stats: Update the statistics for vnc patch.
2011-02-12 01:29:36 +01:00
is_mouse=false
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
pio_addr=268460032
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
Stats: Update the statistics for vnc patch.
2011-02-12 01:29:36 +01:00
vnc=system.vncserver
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[5]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ARM: Update regressions for CLCD and KMI additions
2010-11-15 21:04:03 +01:00
[system.realview.kmi1]
type=Pl050
amba_id=1314896
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Update regressions for CLCD and KMI additions
2010-11-15 21:04:03 +01:00
gic=system.realview.gic
Stats: Update the statistics for vnc patch.
2011-02-12 01:29:36 +01:00
int_delay=1000000
ARM: Update regressions for CLCD and KMI additions
2010-11-15 21:04:03 +01:00
int_num=53
Stats: Update the statistics for vnc patch.
2011-02-12 01:29:36 +01:00
is_mouse=true
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
pio_addr=268464128
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
Stats: Update the statistics for vnc patch.
2011-02-12 01:29:36 +01:00
vnc=system.vncserver
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[6]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.l2x0_fake]
type=IsaFake
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
fake_mem=false
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
pio_addr=520101888
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
pio_size=4095
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
ret_data8=255
system=system
update_data=false
warn_access=
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
pio=system.membus.master[3]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
[system.realview.local_cpu_timer]
type=CpuLocalTimer
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
gic=system.realview.gic
int_num_timer=29
int_num_watchdog=30
pio_addr=520095232
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
system=system
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
pio=system.membus.master[5]
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.mmc_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268455936
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[22]
[system.realview.nvmem]
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
type=SimpleMemory
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
bandwidth=73.000000
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
conf_table_reported=false
in_addr_map=true
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
latency=30000
latency_var=0
null=false
range=2147483648:2214592511
port=system.membus.master[1]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.realview_io]
type=RealViewCtrl
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Update ARM_FS stats for mp changes
2011-05-05 03:38:28 +02:00
idreg=0
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
pio_addr=268435456
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add some MP regressions and clean up the disk images and kernels a bit
2011-08-19 22:08:09 +02:00
proc_id0=201326592
proc_id1=201327138
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[1]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ARM: Update stats for IT and conditional branch changes
2012-03-21 16:36:45 +01:00
[system.realview.rtc]
type=PL031
amba_id=3412017
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Update stats for IT and conditional branch changes
2012-03-21 16:36:45 +01:00
gic=system.realview.gic
int_delay=100000
int_num=42
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
pio_addr=268529664
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for IT and conditional branch changes
2012-03-21 16:36:45 +01:00
time=Thu Jan 1 00:00:00 2009
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[23]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.sci_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268492800
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[20]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.smc_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=269357056
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[13]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.sp810_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=true
pio_addr=268439552
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[14]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.ssp_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268488704
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[19]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.timer0]
type=Sp804
amba_id=1316868
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
clock0=1000000
clock1=1000000
gic=system.realview.gic
int_num0=36
int_num1=36
pio_addr=268505088
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[2]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.timer1]
type=Sp804
amba_id=1316868
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
clock0=1000000
clock1=1000000
gic=system.realview.gic
int_num0=37
int_num1=37
pio_addr=268509184
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[3]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.uart]
type=Pl011
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
end_on_eot=false
gic=system.realview.gic
int_delay=100000
int_num=44
pio_addr=268472320
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
platform=system.realview
system=system
terminal=system.terminal
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[0]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.uart1_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268476416
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[10]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.uart2_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268480512
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[11]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.uart3_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268484608
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[12]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.realview.watchdog_fake]
type=AmbaFake
amba_id=0
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
clk_domain=system.clk_domain
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
ignore_access=false
pio_addr=268500992
ARM: update stats for bp and squash fixes.
2012-09-25 18:49:41 +02:00
pio_latency=100000
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
system=system
ARM: Update stats for valgrind fix and replace config.inis which are out of date.
2012-03-09 15:59:29 +01:00
pio=system.iobus.master[15]
ARM: Add full-system regressions
2010-11-08 20:58:25 +01:00
[system.terminal]
type=Terminal
intr_control=system.intrctrl
number=0
output=true
port=3456
Stats: Update the statistics for vnc patch.
2011-02-12 01:29:36 +01:00
[system.vncserver]
type=VncServer
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
frame_capture=false
Stats: Update the statistics for vnc patch.
2011-02-12 01:29:36 +01:00
number=0
port=5900
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
[system.voltage_domain]
type=VoltageDomain
voltage=1.000000
Reference in a new issue Copy permalink