| .. |
|
freebsd
|
X86: Fix argument register indexing.
|
2007-07-26 22:13:14 -07:00 |
|
isa
|
Add a flag to indicate an instruction triggers a syscall in SE mode.
|
2007-07-31 17:34:08 -07:00 |
|
linux
|
Linux Support: make sure that when we get the stack page for thread info we're doing a 64bit not
|
2007-08-02 14:34:58 -04:00 |
|
tru64
|
Major changes to how SimObjects are created and initialized. Almost all
|
2007-07-23 21:51:38 -07:00 |
|
AlphaSystem.py
|
Move SimObject python files alongside the C++ and fix
|
2007-05-27 19:21:17 -07:00 |
|
AlphaTLB.py
|
Major changes to how SimObjects are created and initialized. Almost all
|
2007-07-23 21:51:38 -07:00 |
|
aout_machdep.h
|
Updated Authors from bk prs info
|
2006-05-31 19:26:56 -04:00 |
|
ecoff_machdep.h
|
New directory structure:
|
2006-05-22 14:29:33 -04:00 |
|
ev5.cc
|
fixes for solaris compile
|
2007-04-21 19:11:38 -04:00 |
|
ev5.hh
|
Updated Authors from bk prs info
|
2006-05-31 19:26:56 -04:00 |
|
faults.cc
|
Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same across all architectures.
|
2007-03-07 20:04:46 +00:00 |
|
faults.hh
|
Make name, isMachineCheckFault, and isAlignmentFault const.
|
2007-07-18 16:09:00 -07:00 |
|
floatregfile.cc
|
Moved the Alpha float regfile into it's own regfile and got rid of constants.hh and isa_traits.cc
|
2006-11-10 05:29:05 -05:00 |
|
floatregfile.hh
|
fixes for solaris compile
|
2007-04-21 19:11:38 -04:00 |
|
idle_event.cc
|
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
|
2007-03-07 15:04:31 -05:00 |
|
idle_event.hh
|
Put kernel_stats back into arch.
|
2006-11-07 22:34:34 -05:00 |
|
interrupts.hh
|
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
|
2007-03-07 15:04:31 -05:00 |
|
intregfile.cc
|
Split out alpha integer register file into it's own files.
|
2006-11-10 04:54:25 -05:00 |
|
intregfile.hh
|
fixes for solaris compile
|
2007-04-21 19:11:38 -04:00 |
|
ipr.cc
|
Made the old name refer to the miscreg index to prevent having to change code all over the place.
|
2006-10-31 16:36:45 -05:00 |
|
ipr.hh
|
Fix stupid typo
|
2006-10-31 18:01:31 -05:00 |
|
isa_traits.hh
|
X86: Fix argument register indexing.
|
2007-07-26 22:13:14 -07:00 |
|
kernel_stats.cc
|
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
|
2007-03-07 15:04:31 -05:00 |
|
kernel_stats.hh
|
Put kernel_stats back into arch.
|
2006-11-07 22:34:34 -05:00 |
|
kgdb.h
|
Force remote gdb code to use signal numbers and not ISA specific trap numbers.
|
2006-11-07 23:40:54 -05:00 |
|
locked_mem.hh
|
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
|
2007-03-07 15:04:31 -05:00 |
|
miscregfile.cc
|
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
|
2007-03-07 15:04:31 -05:00 |
|
miscregfile.hh
|
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
|
2007-03-07 15:04:31 -05:00 |
|
mmaped_ipr.hh
|
Add support for mmapped iprs to atomic cpu
|
2006-11-29 17:11:10 -05:00 |
|
osfpal.cc
|
Updated Authors from bk prs info
|
2006-05-31 19:26:56 -04:00 |
|
osfpal.hh
|
Updated Authors from bk prs info
|
2006-05-31 19:26:56 -04:00 |
|
pagetable.cc
|
Moved the Alpha float regfile into it's own regfile and got rid of constants.hh and isa_traits.cc
|
2006-11-10 05:29:05 -05:00 |
|
pagetable.hh
|
pagetable.hh:
|
2007-01-08 20:50:45 -05:00 |
|
predecoder.hh
|
Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though.
|
2007-06-19 18:17:34 +00:00 |
|
process.cc
|
Implement current working directory for LiveProcesses
|
2006-11-16 12:43:11 -08:00 |
|
process.hh
|
Implement current working directory for LiveProcesses
|
2006-11-16 12:43:11 -08:00 |
|
regfile.cc
|
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
|
2007-03-07 15:04:31 -05:00 |
|
regfile.hh
|
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
|
2007-03-07 15:04:31 -05:00 |
|
remote_gdb.cc
|
Modified instruction decode method.
|
2007-06-14 16:52:19 -04:00 |
|
remote_gdb.hh
|
Broke remote_gdb into a base class and architecture specific derived classes.
|
2006-11-07 05:39:40 -05:00 |
|
SConscript
|
Arguments: Get rid of duplicate code for the Arguments class in each architecture.
|
2007-08-01 16:59:14 -04:00 |
|
SConsopts
|
Rework the way SCons recurses into subdirectories, making it
|
2007-03-10 23:00:54 -08:00 |
|
stacktrace.cc
|
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
|
2007-03-07 15:04:31 -05:00 |
|
stacktrace.hh
|
Put the ProcessInfo and StackTrace objects into the ISA namespaces.
|
2006-11-08 00:52:04 -05:00 |
|
syscallreturn.hh
|
Made the alpha setSyscallReturn take a ThreadContext pointer instead of a RegFile *.
|
2006-12-06 11:33:37 -05:00 |
|
system.cc
|
Major changes to how SimObjects are created and initialized. Almost all
|
2007-07-23 21:51:38 -07:00 |
|
system.hh
|
Major changes to how SimObjects are created and initialized. Almost all
|
2007-07-23 21:51:38 -07:00 |
|
tlb.cc
|
Major changes to how SimObjects are created and initialized. Almost all
|
2007-07-23 21:51:38 -07:00 |
|
tlb.hh
|
Put the Alpha tlb stuff into the AlphaISA namespace, and give the classes more neutral names.
|
2006-10-31 02:08:44 -05:00 |
|
types.hh
|
rename store conditional stuff as extra data so it can be used for conditional swaps as well
|
2007-02-12 13:06:30 -05:00 |
|
utility.cc
|
Arguments: Get rid of duplicate code for the Arguments class in each architecture.
|
2007-08-01 16:59:14 -04:00 |
|
utility.hh
|
Arguments: Get rid of duplicate code for the Arguments class in each architecture.
|
2007-08-01 16:59:14 -04:00 |
|
vtophys.cc
|
*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
|
2007-03-07 15:04:31 -05:00 |
|
vtophys.hh
|
implement vtophys and 32bit gdb support
|
2007-02-18 19:57:46 -05:00 |
