5b5570e0bf
Make code compatible with new decode method.
src/arch/alpha/remote_gdb.cc:
src/cpu/base_dyn_inst_impl.hh:
src/cpu/exetrace.cc:
src/cpu/simple/base.cc:
Make code compatible with new decode method.
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
Modified instruction decode method.
--HG--
extra : convert_revision : a9a6d3a16fff59bc95d0606ea344bd57e71b8d0a
317 lines
11 KiB
C++
317 lines
11 KiB
C++
/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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*/
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/*
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* Copyright (c) 1990, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratories.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
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*/
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $
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*
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* Taken from NetBSD
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*
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* "Stub" to allow remote cpu to debug over a serial line using gdb.
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*/
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#include <sys/signal.h>
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#include <string>
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#include <unistd.h>
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#include "config/full_system.hh"
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#if FULL_SYSTEM
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#include "arch/alpha/vtophys.hh"
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#endif
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#include "arch/alpha/kgdb.h"
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#include "arch/alpha/utility.hh"
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#include "arch/alpha/remote_gdb.hh"
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#include "base/intmath.hh"
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#include "base/remote_gdb.hh"
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#include "base/socket.hh"
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#include "base/trace.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/static_inst.hh"
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#include "mem/physical.hh"
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#include "mem/port.hh"
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#include "sim/system.hh"
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using namespace std;
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using namespace TheISA;
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RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
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: BaseRemoteGDB(_system, c, KGDB_NUMREGS)
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{
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memset(gdbregs.regs, 0, gdbregs.bytes());
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}
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///////////////////////////////////////////////////////////
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// RemoteGDB::acc
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//
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// Determine if the mapping at va..(va+len) is valid.
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//
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bool
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RemoteGDB::acc(Addr va, size_t len)
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{
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#if !FULL_SYSTEM
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panic("acc function needs to be rewritten for SE mode\n");
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#else
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Addr last_va;
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va = TheISA::TruncPage(va);
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last_va = TheISA::RoundPage(va + len);
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do {
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if (TheISA::IsK0Seg(va)) {
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if (va < (TheISA::K0SegBase + pmem->size())) {
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DPRINTF(GDBAcc, "acc: Mapping is valid K0SEG <= "
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"%#x < K0SEG + size\n", va);
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return true;
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} else {
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DPRINTF(GDBAcc, "acc: Mapping invalid %#x > K0SEG + size\n",
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va);
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return false;
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}
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}
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/**
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* This code says that all accesses to palcode (instruction and data)
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* are valid since there isn't a va->pa mapping because palcode is
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* accessed physically. At some point this should probably be cleaned up
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* but there is no easy way to do it.
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*/
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if (AlphaISA::PcPAL(va) || va < 0x10000)
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return true;
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Addr ptbr = context->readMiscRegNoEffect(AlphaISA::IPR_PALtemp20);
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TheISA::PageTableEntry pte = TheISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va);
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if (!pte.valid()) {
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DPRINTF(GDBAcc, "acc: %#x pte is invalid\n", va);
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return false;
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}
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va += TheISA::PageBytes;
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} while (va < last_va);
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DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va);
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return true;
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#endif
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}
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///////////////////////////////////////////////////////////
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// RemoteGDB::getregs
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//
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// Translate the kernel debugger register format into
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// the GDB register format.
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void
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RemoteGDB::getregs()
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{
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memset(gdbregs.regs, 0, gdbregs.bytes());
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gdbregs.regs[KGDB_REG_PC] = context->readPC();
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// @todo: Currently this is very Alpha specific.
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if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) {
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for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
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gdbregs.regs[i] = context->readIntReg(AlphaISA::reg_redir[i]);
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}
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} else {
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for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
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gdbregs.regs[i] = context->readIntReg(i);
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}
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}
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#ifdef KGDB_FP_REGS
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for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) {
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gdbregs.regs[i + KGDB_REG_F0] = context->readFloatRegBits(i);
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}
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#endif
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}
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///////////////////////////////////////////////////////////
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// RemoteGDB::setregs
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//
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// Translate the GDB register format into the kernel
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// debugger register format.
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//
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void
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RemoteGDB::setregs()
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{
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// @todo: Currently this is very Alpha specific.
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if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) {
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for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
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context->setIntReg(AlphaISA::reg_redir[i], gdbregs.regs[i]);
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}
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} else {
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for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
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context->setIntReg(i, gdbregs.regs[i]);
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}
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}
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#ifdef KGDB_FP_REGS
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for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) {
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context->setFloatRegBits(i, gdbregs.regs[i + KGDB_REG_F0]);
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}
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#endif
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context->setPC(gdbregs.regs[KGDB_REG_PC]);
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}
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void
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RemoteGDB::clearSingleStep()
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{
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DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n",
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takenBkpt, notTakenBkpt);
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if (takenBkpt != 0)
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clearTempBreakpoint(takenBkpt);
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if (notTakenBkpt != 0)
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clearTempBreakpoint(notTakenBkpt);
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}
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void
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RemoteGDB::setSingleStep()
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{
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Addr pc = context->readPC();
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Addr npc, bpc;
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bool set_bt = false;
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npc = pc + sizeof(MachInst);
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// User was stopped at pc, e.g. the instruction at pc was not
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// executed.
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MachInst inst = read<MachInst>(pc);
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StaticInstPtr si(inst, pc);
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if (si->hasBranchTarget(pc, context, bpc)) {
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// Don't bother setting a breakpoint on the taken branch if it
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// is the same as the next pc
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if (bpc != npc)
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set_bt = true;
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}
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DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n",
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takenBkpt, notTakenBkpt);
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setTempBreakpoint(notTakenBkpt = npc);
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if (set_bt)
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setTempBreakpoint(takenBkpt = bpc);
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}
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// Write bytes to kernel address space for debugger.
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bool
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RemoteGDB::write(Addr vaddr, size_t size, const char *data)
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{
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if (BaseRemoteGDB::write(vaddr, size, data)) {
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#ifdef IMB
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alpha_pal_imb();
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#endif
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return true;
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} else {
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return false;
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}
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}
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