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checker
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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inorder
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inorder: simplify handling of split accesses
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2011-06-19 21:43:35 -04:00 |
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nocpu
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SCons: Support building without an ISA
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2010-11-19 18:00:39 -06:00 |
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o3
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o3: missing newlines on some dprintfs
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2011-06-10 22:15:32 -04:00 |
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ozone
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scons: rename TraceFlags to DebugFlags
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2011-06-02 17:36:21 -07:00 |
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pred
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scons: rename TraceFlags to DebugFlags
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2011-06-02 17:36:21 -07:00 |
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simple
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scons: rename TraceFlags to DebugFlags
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2011-06-02 17:36:21 -07:00 |
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testers
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scons: rename TraceFlags to DebugFlags
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2011-06-02 17:36:21 -07:00 |
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trace
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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activity.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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activity.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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base.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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base.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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base_dyn_inst.hh
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CPU: Remove references to memory copy operations
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2011-04-04 11:42:26 -05:00 |
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base_dyn_inst_impl.hh
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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BaseCPU.py
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mips: cleanup ISA-specific code
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2011-03-26 09:23:52 -04:00 |
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CheckerCPU.py
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python: Move more code into m5.util allow SCons to use that code.
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2009-09-22 15:24:16 -07:00 |
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cpuevent.cc
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Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.
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2006-06-06 17:32:21 -04:00 |
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cpuevent.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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exec_context.hh
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ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.
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2010-11-08 13:58:22 -06:00 |
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exetrace.cc
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Trace: Allow printing ASIDs and selectively tracing based on user/kernel code.
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2011-05-13 17:27:00 -05:00 |
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exetrace.hh
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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ExeTracer.py
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SimObjects: Clean up handling of C++ namespaces.
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2008-10-09 22:19:39 -07:00 |
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func_unit.cc
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params: Deprecate old-style constructors; update most SimObject constructors.
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2007-08-30 15:16:59 -04:00 |
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func_unit.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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FuncUnit.py
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CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.
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2010-11-15 14:04:04 -06:00 |
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inst_seq.hh
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build: fix compile problems pointed out by gcc 4.4
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2009-11-04 16:57:01 -08:00 |
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inteltrace.cc
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Make commenting on close namespace brackets consistent.
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2011-01-03 14:35:43 -08:00 |
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inteltrace.hh
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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IntelTrace.py
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SimObjects: Clean up handling of C++ namespaces.
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2008-10-09 22:19:39 -07:00 |
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intr_control.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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intr_control.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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IntrControl.py
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Move SimObject python files alongside the C++ and fix
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2007-05-27 19:21:17 -07:00 |
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legiontrace.cc
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Make commenting on close namespace brackets consistent.
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2011-01-03 14:35:43 -08:00 |
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legiontrace.hh
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Make commenting on close namespace brackets consistent.
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2011-01-03 14:35:43 -08:00 |
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LegionTrace.py
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SimObjects: Clean up handling of C++ namespaces.
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2008-10-09 22:19:39 -07:00 |
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m5legion_interface.h
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add fsr to the list of registers we are interested in
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2007-01-30 18:27:04 -05:00 |
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nativetrace.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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nativetrace.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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NativeTrace.py
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ARM: Make native trace print out what instruction caused an error.
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2009-07-27 00:54:09 -07:00 |
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op_class.hh
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CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.
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2010-11-15 14:04:04 -06:00 |
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pc_event.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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pc_event.hh
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types: Move stuff for global types into src/base/types.hh
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2009-05-17 14:34:50 -07:00 |
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profile.cc
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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profile.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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quiesce_event.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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quiesce_event.hh
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Make the Event::description() a const function
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2008-02-06 16:32:40 -05:00 |
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sched_list.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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SConscript
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scons: rename TraceFlags to DebugFlags
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2011-06-02 17:36:21 -07:00 |
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simple_thread.cc
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Replace curTick global variable with accessor functions.
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2011-01-07 21:50:29 -08:00 |
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simple_thread.hh
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simple-thread: give a name() function for debugging w/the SimpleThread object
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2011-06-19 21:43:33 -04:00 |
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smt.hh
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includes: fix up code after sorting
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2011-04-15 10:44:14 -07:00 |
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static_inst.cc
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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static_inst.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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thread_context.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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thread_context.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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thread_state.cc
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CPU: Get rid of the now unnecessary getInst/setInst family of functions.
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2010-09-13 21:58:34 -07:00 |
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thread_state.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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timebuf.hh
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Move sched_list.hh and timebuf.hh from src/base to src/cpu.
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2011-01-03 14:35:47 -08:00 |
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translation.hh
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O3: Enhance data address translation by supporting hardware page table walkers.
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2011-02-11 18:29:35 -06:00 |
