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gem5/src/cpu/o3
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Andreas Hansson 750f33a901 MEM: Remove the Broadcast destination from the packet 
This patch simplifies the packet by removing the broadcast flag and
instead more firmly relying on (and enforcing) the semantics of
transactions in the classic memory system, i.e. request packets are
routed from a master to a slave based on the address, and when they
are created they have neither a valid source, nor destination. On
their way to the slave, the request packet is updated with a source
field for all modules that multiplex packets from multiple master
(e.g. a bus). When a request packet is turned into a response packet
(at the final slave), it moves the potentially populated source field
to the destination field, and the response packet is routed through
any multiplexing components back to the master based on the
destination field.

Modules that connect multiplexing components, such as caches and
bridges store any existing source and destination field in the sender
state as a stack (just as before).

The packet constructor is simplified in that there is no longer a need
to pass the Packet::Broadcast as the destination (this was always the
case for the classic memory system). In the case of Ruby, rather than
using the parameter to the constructor we now rely on setDest, as
there is already another three-argument constructor in the packet
class.

In many places where the packet information was printed as part of
DPRINTFs, request packets would be printed with a numeric "dest" that
would always be -1 (Broadcast) and that field is now removed from the
printing.
2012-04-14 05:45:55 -04:00
..
base_dyn_inst.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
bpred_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
bpred_unit.hh BPred: Fix RAS to handle predicated call/return instructions. 2012-02-13 12:26:25 -06:00
bpred_unit_impl.hh BPred: Fix RAS to handle predicated call/return instructions. 2012-02-13 12:26:25 -06:00
checker_builder.cc CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable 2012-03-09 09:59:27 -05:00
comm.hh O3: When squashing, restore the macroop that should be used for fetching. 2011-08-14 17:41:34 -07:00
commit.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
commit.hh cpu: add separate stats for insts/ops both globally and per cpu model 2012-02-12 16:07:39 -06:00
commit_impl.hh O3/Ozone: Eliminate dead code counting software prefetch insts 2012-03-09 09:59:28 -05:00
cpu.cc MEM: Separate snoops and normal memory requests/responses 2012-04-14 05:45:07 -04:00
cpu.hh MEM: Separate snoops and normal memory requests/responses 2012-04-14 05:45:07 -04:00
cpu_builder.cc CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable 2012-03-09 09:59:27 -05:00
cpu_policy.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
decode.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
decode.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
decode_impl.hh O3: Fix size of skid buffer between fetch and decode when widths are different 2012-03-21 10:34:05 -05:00
dep_graph.hh ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. 2010-10-31 00:07:20 -07:00
dyn_inst.cc O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
dyn_inst.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
dyn_inst_impl.hh CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable 2012-03-09 09:59:27 -05:00
fetch.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
fetch.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
fetch_impl.hh MEM: Remove the Broadcast destination from the packet 2012-04-14 05:45:55 -04:00
free_list.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
free_list.hh trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
fu_pool.cc clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
fu_pool.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
FuncUnitConfig.py CPU/ARM: Add SIMD op classes to CPU models and ARM ISA. 2010-11-15 14:04:04 -06:00
FUPool.py CPU/ARM: Add SIMD op classes to CPU models and ARM ISA. 2010-11-15 14:04:04 -06:00
iew.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
iew.hh Merge with head, hopefully the last time for this batch. 2012-01-31 22:40:08 -08:00
iew_impl.hh O3/Ozone: Eliminate dead code counting software prefetch insts 2012-03-09 09:59:28 -05:00
impl.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
inst_queue.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
inst_queue.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
inst_queue_impl.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
isa_specific.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
lsq.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq.hh MEM: Separate snoops and normal memory requests/responses 2012-04-14 05:45:07 -04:00
lsq_impl.hh MEM: Separate snoops and normal memory requests/responses 2012-04-14 05:45:07 -04:00
lsq_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq_unit.hh MEM: Remove the Broadcast destination from the packet 2012-04-14 05:45:55 -04:00
lsq_unit_impl.hh MEM: Remove the Broadcast destination from the packet 2012-04-14 05:45:55 -04:00
mem_dep_unit.cc clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
mem_dep_unit.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
mem_dep_unit_impl.hh LSQ: Set store predictor to periodically clear itself as recommended in the storesets paper. 2011-08-19 15:08:07 -05:00
O3Checker.py CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 2012-01-31 07:46:03 -08:00
O3CPU.py CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable 2012-03-09 09:59:27 -05:00
regfile.hh SE/FS: Get rid of includes of config/full_system.hh. 2011-11-18 02:20:22 -08:00
rename.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rename.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
rename_impl.hh O3: Fix sizing of decode to rename skid buffer. 2012-03-21 10:34:06 -05:00
rename_map.cc o3: missing newlines on some dprintfs 2011-06-10 22:15:32 -04:00
rename_map.hh arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
rob.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rob.hh O3 CPU: Provide the squashing instruction 2012-02-10 08:37:28 -06:00
rob_impl.hh O3 CPU: Provide the squashing instruction 2012-02-10 08:37:28 -06:00
sat_counter.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
sat_counter.hh clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
SConscript CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable 2012-03-09 09:59:27 -05:00
SConsopts cpu_models: get rid of cpu_models.py and move the stuff into SCons 2010-02-26 18:14:48 -08:00
scoreboard.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
scoreboard.hh trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
store_set.cc LSQ: Set store predictor to periodically clear itself as recommended in the storesets paper. 2011-08-19 15:08:07 -05:00
store_set.hh LSQ: Set store predictor to periodically clear itself as recommended in the storesets paper. 2011-08-19 15:08:07 -05:00
thread_context.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
thread_context.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
thread_context_impl.hh CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable 2012-03-09 09:59:27 -05:00
thread_state.hh Implement Ali's review feedback. 2012-01-29 02:04:34 -08:00