gem5/src/cpu/o3/FuncUnitConfig.py
2010-11-15 14:04:04 -06:00

104 lines
4.2 KiB
Python

# Copyright (c) 2010 ARM Limited
# All rights reserved.
#
# The license below extends only to copyright in the software and shall
# not be construed as granting a license to any other intellectual
# property including but not limited to intellectual property relating
# to a hardware implementation of the functionality of the software
# licensed hereunder. You may use the software subject to the license
# terms below provided that you ensure that this notice is replicated
# unmodified and in its entirety in all distributions of the software,
# modified or unmodified, in source code or in binary form.
#
# Copyright (c) 2006-2007 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
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# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
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# this software without specific prior written permission.
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# Authors: Kevin Lim
from m5.SimObject import SimObject
from m5.params import *
from FuncUnit import *
class IntALU(FUDesc):
opList = [ OpDesc(opClass='IntAlu') ]
count = 6
class IntMultDiv(FUDesc):
opList = [ OpDesc(opClass='IntMult', opLat=3),
OpDesc(opClass='IntDiv', opLat=20, issueLat=19) ]
count=2
class FP_ALU(FUDesc):
opList = [ OpDesc(opClass='FloatAdd', opLat=2),
OpDesc(opClass='FloatCmp', opLat=2),
OpDesc(opClass='FloatCvt', opLat=2) ]
count = 4
class FP_MultDiv(FUDesc):
opList = [ OpDesc(opClass='FloatMult', opLat=4),
OpDesc(opClass='FloatDiv', opLat=12, issueLat=12),
OpDesc(opClass='FloatSqrt', opLat=24, issueLat=24) ]
count = 2
class SIMD_Unit(FUDesc):
opList = [ OpDesc(opClass='SimdAdd'),
OpDesc(opClass='SimdAddAcc'),
OpDesc(opClass='SimdAlu'),
OpDesc(opClass='SimdCmp'),
OpDesc(opClass='SimdCvt'),
OpDesc(opClass='SimdMisc'),
OpDesc(opClass='SimdMult'),
OpDesc(opClass='SimdMultAcc'),
OpDesc(opClass='SimdShift'),
OpDesc(opClass='SimdShiftAcc'),
OpDesc(opClass='SimdSqrt'),
OpDesc(opClass='SimdFloatAdd'),
OpDesc(opClass='SimdFloatAlu'),
OpDesc(opClass='SimdFloatCmp'),
OpDesc(opClass='SimdFloatCvt'),
OpDesc(opClass='SimdFloatDiv'),
OpDesc(opClass='SimdFloatMisc'),
OpDesc(opClass='SimdFloatMult'),
OpDesc(opClass='SimdFloatMultAcc'),
OpDesc(opClass='SimdFloatSqrt') ]
count = 4
class ReadPort(FUDesc):
opList = [ OpDesc(opClass='MemRead') ]
count = 0
class WritePort(FUDesc):
opList = [ OpDesc(opClass='MemWrite') ]
count = 0
class RdWrPort(FUDesc):
opList = [ OpDesc(opClass='MemRead'), OpDesc(opClass='MemWrite') ]
count = 4
class IprPort(FUDesc):
opList = [ OpDesc(opClass='IprAccess', opLat = 3, issueLat = 3) ]
count = 1