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gem5/src/cpu/o3
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Brandon Potter 7a8dda49a4 style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
..
probe style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
base_dyn_inst.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
checker.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
checker.hh cpu: Add header files for checker CPUs 2012-11-02 11:32:01 -05:00
comm.hh mem, cpu: Add a separate flag for strictly ordered memory 2015-05-05 03:22:33 -04:00
commit.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
commit.hh probe: Add probe in Fetch, IEW, Rename and Commit 2015-12-07 16:42:15 -06:00
commit_impl.hh probe: Add probe in Fetch, IEW, Rename and Commit 2015-12-07 16:42:15 -06:00
cpu.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
cpu.hh mem: Deduce if cache should forward snoops 2016-02-10 04:08:24 -05:00
cpu_policy.hh cpu/o3: clean up rename map and free list 2013-10-15 14:22:44 -04:00
decode.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
decode.hh cpu: Fix o3 front-end pipeline interlock behavior 2014-09-03 07:42:34 -04:00
decode_impl.hh cpu: Resolve targets of predicted 'taken' decode for O3 2016-12-21 15:05:24 -06:00
dep_graph.hh cpu: Rewrite O3 draining to avoid stopping in microcode 2013-01-07 13:05:46 -05:00
deriv.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
deriv.hh cpu: O3 add a header declaring the DerivO3CPU 2012-11-02 11:32:01 -05:00
dyn_inst.cc O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
dyn_inst.hh revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
dyn_inst_impl.hh arch: Use shared_ptr for all Faults 2014-10-16 05:49:51 -04:00
fetch.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
fetch.hh probe: Add probe in Fetch, IEW, Rename and Commit 2015-12-07 16:42:15 -06:00
fetch_impl.hh cpu: Fix the O3 CPU Drain 2016-09-22 10:49:10 +01:00
free_list.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
free_list.hh revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
fu_pool.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
fu_pool.hh cpu: Change literal integer constants to meaningful labels 2015-05-05 16:47:24 +01:00
FuncUnitConfig.py cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass 2016-10-15 14:58:45 -05:00
FUPool.py sim: Include object header files in SWIG interfaces 2012-11-02 11:32:01 -05:00
iew.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
iew.hh probe: Add probe in Fetch, IEW, Rename and Commit 2015-12-07 16:42:15 -06:00
iew_impl.hh cpu: Fix the O3 CPU Drain 2016-09-22 10:49:10 +01:00
impl.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
inst_queue.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
inst_queue.hh cpu: Add writeback modeling for drain functionality 2014-10-29 23:18:27 -05:00
inst_queue_impl.hh cpu: Change literal integer constants to meaningful labels 2015-05-05 16:47:24 +01:00
isa_specific.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
lsq.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq.hh mem: Remove threadId from memory request class 2016-04-07 09:30:20 -05:00
lsq_impl.hh mem: Remove threadId from memory request class 2016-04-07 09:30:20 -05:00
lsq_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq_unit.hh cpu: Clarify meaning of cachePorts variable in lsq_unit.hh of O3 2016-12-21 15:04:06 -06:00
lsq_unit_impl.hh cpu: Clarify meaning of cachePorts variable in lsq_unit.hh of O3 2016-12-21 15:04:06 -06:00
mem_dep_unit.cc clang: Enable compiling gem5 using clang 2.9 and 3.0 2012-01-31 12:05:52 -05:00
mem_dep_unit.hh misc: Remove redundant compiler-specific defines 2015-10-12 04:07:59 -04:00
mem_dep_unit_impl.hh cpu: Add drain check functionality to IEW 2014-10-29 23:18:26 -05:00
O3Checker.py cpu: Make checker CPUs inherit from CheckerCPU in the Python hierarchy 2013-02-15 17:40:08 -05:00
O3CPU.py cpu: Clarify meaning of cachePorts variable in lsq_unit.hh of O3 2016-12-21 15:04:06 -06:00
regfile.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
regfile.hh revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
rename.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rename.hh probe: Add probe in Fetch, IEW, Rename and Commit 2015-12-07 16:42:15 -06:00
rename_impl.hh cpu: Fix the O3 CPU Drain 2016-09-22 10:49:10 +01:00
rename_map.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
rename_map.hh revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
rob.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rob.hh cpu: Construct ROB with cpu params struct instead of each variable 2013-10-31 13:41:13 -05:00
rob_impl.hh style: eliminate equality tests with true and false 2014-05-31 18:00:23 -07:00
SConscript cpu: Remove Ozone CPU from the source tree 2014-10-09 17:51:58 -04:00
SConsopts arch, cpu: Factor out the ExecContext into a proper base class 2014-09-03 07:42:22 -04:00
scoreboard.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
scoreboard.hh scons: Fixes uninitialized warnings issued by clang 2014-03-07 15:56:23 -05:00
store_set.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
store_set.hh LSQ: Set store predictor to periodically clear itself as recommended in the storesets paper. 2011-08-19 15:08:07 -05:00
thread_context.cc style: [patch 1/22] use /r/3648/ to reorganize includes 2016-11-09 14:27:37 -06:00
thread_context.hh base: Declare a type for context IDs 2015-08-07 09:59:13 +01:00
thread_context_impl.hh revert 5af8f40d8f2c 2015-07-28 01:58:04 -05:00
thread_state.hh base: Add support for changing output directories 2015-11-27 14:41:59 +00:00