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Author SHA1 Message Date
Gabe Black
03880cf828 X86: Make cpuid actually consider the eax parameter and return different values. 
--HG--
extra : convert_revision : 527c1cacdd20ab162859bba7f9a6bed33afa2d4f
 2007-08-26 20:38:42 -07:00
Gabe Black
9c99f5f825 X86: Fix the sign extension microop so it extends zeros correctly. 
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extra : convert_revision : 9d7ca286ba7709175fa75226320601acce4ced98
 2007-08-26 20:37:41 -07:00
Gabe Black
506bf83595 X86: Implement cmps (string compare) 
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extra : convert_revision : 0d6b783b2246b8ad8d91e4c63e407307ee11c651
 2007-08-26 20:36:46 -07:00
Gabe Black
00d9036c62 X86: Make shift instructions set some of the flags they're supposed to. 
The flag mechanism for microops needs to be fleshd out a little more to allow
for custom flag calculation methods for certain microops. Shift is an example
where the rules for calculating OF and CF are unique.

--HG--
extra : convert_revision : 91981a00c1efd05db702fffa9cea51f912583013
 2007-08-26 20:35:48 -07:00
Gabe Black
9b49a78cfd Address translation: Make the page table more flexible. 
The page table now stores actual page table entries. It is still a templated
class here, but this will be corrected in the near future.

--HG--
extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d
 2007-08-26 20:33:57 -07:00
Gabe Black
80d51650c8 O3 CPU: Remove alignment check from dynamic instruction read/write functions. 
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extra : convert_revision : e5d415b4bf79353ef3c9f4dc5af09ab4102c55fb
 2007-08-26 20:31:30 -07:00
Gabe Black
fcd04f953c X86: Remove x86 code that attempted to fix misaligned accesses. 
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extra : convert_revision : 42f68010e6498aceb7ed25da278093e99150e4df
 2007-08-26 20:30:36 -07:00
Gabe Black
24bfda0fdf Simple CPU: Don't trace instructions that fault. Otherwise they show up twice. 
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extra : convert_revision : 4446d9544d58bdadbd24d8322bb63016a32aa2b8
 2007-08-26 20:29:09 -07:00
Gabe Black
a51e2fd8bd Stats: Update the stats. 
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extra : convert_revision : 888b6e3bcd432a9318d4b8741a8b274c6f37f1a8
 2007-08-26 20:27:53 -07:00
Gabe Black
e7e2d5ce90 Simple CPU: Added code that will split requests that cross block boundaries into multiple memory access. 
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extra : convert_revision : 600f79f32ef30a6e1db951503bcfe8cd332858d1
 2007-08-26 20:27:11 -07:00
Gabe Black
e056e49c45 Simple CPU: Make sure only instructions which complete without faulting are counted. 
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extra : convert_revision : 01019c7129ed762d8826c3e6519989aa3fc3b5fd
 2007-08-26 20:25:42 -07:00
Gabe Black
537239b278 Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. 
--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
 2007-08-26 20:24:18 -07:00
Gabe Black
f738afb865 SPARC: Make sure unaligned access are caught on cached translations as well. 
--HG--
extra : convert_revision : 5c1f3f585817a19a771164f809dfc2fdc1ab3fb2
 2007-08-26 20:15:29 -07:00
Ali Saidi
9791b0f927 IGbE: Some fixes to the intel nic model. 
--HG--
extra : convert_revision : 1c1275a9fb99966398b3add09da04bd53399ed2b
 2007-08-25 01:38:01 -04:00
Ali Saidi
4e89518817 Mem: Make errors in the memory system be responses, not requests. Fixes cache handling of error responses. 
--HG--
extra : convert_revision : 22309fc61bd1be0f8d31a3926f290290789a37e5
 2007-08-24 16:39:24 -04:00
Gabe Black
20e0a3792a Merge with head. 
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extra : convert_revision : 9ef81afcfabd86c9c069204998c987344f03f33e
 2007-08-21 16:19:46 -07:00
Kevin Lim
e1054170b5 o3: Fix for retry ID bug. 
It should be cleared prior to the call to recvRetry.
Add extra DPRINTF statement for clearer debugging output.

--HG--
extra : convert_revision : e2332754743f42d60e159ac89f6fb0fd8b7f57f8
 2007-08-21 16:16:56 -07:00
Nathan Binkert
3555b2aecc style: fix style hook when run from a repo subdir. 
Before this fix, the style hook would blow up when you did a qrefresh to add
a new file, but executed the qrefresh from a repository sub directory.

--HG--
extra : convert_revision : 851b0421dfa5c5b23d0f49441c4ba2e0ac579c5d
 2007-08-21 16:15:14 -07:00
Gabe Black
a874cb40ab Merge with head. 
--HG--
extra : convert_revision : 6ce77b5bd4f43ddecd51ea8c66759e4b70d4ad82
 2007-08-18 19:41:08 -07:00
Ali Saidi
464a51e29e Ports: Only try to do EthPort stuff in full system. 
--HG--
extra : convert_revision : 9ea093ea7c9ab22f8467c5cd5d55b66c71eb3427
 2007-08-17 04:20:02 -04:00
Ali Saidi
bba265ccd8 PCI: Move PCI Configuration data into devices now that we can inherit parameters. 
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extra : convert_revision : bd2214b28fb46a9a9e9e204e0539be33acb548ad
 2007-08-16 16:49:05 -04:00
Ali Saidi
773cb77656 Devices: Make EtherInts connect in the same way memory ports currently do. 
--HG--
extra : convert_revision : 765b096785a77df9adc4791c9101b90696bd7be2
 2007-08-16 16:49:02 -04:00
Nathan Binkert
a9e4daf574 style: Don't try to fix files that should be ignored. 
The style hook was ignoring new files, but processing all modified
files.

--HG--
extra : convert_revision : 97400c24a12103d7ac3d4f69b026853816c39d72
 2007-08-14 18:21:23 -07:00
Gabe Black
4bce50340f Merge with head. 
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extra : convert_revision : e02b606752bf1305d3609051b42a9adba009b7df
 2007-08-14 16:12:11 -07:00
Ali Saidi
0cb32aadb1 Regression: Update EIO simple-timing test for new cache. 
--HG--
extra : convert_revision : b64f407f7735706b1162f6a0e7676590bda3ba5d
 2007-08-14 14:02:22 -04:00
Ali Saidi
b634e81496 Regression: Update insttest regressions for new cache. 
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extra : convert_revision : 100478b2ae00d9d3464c41d940276843a226422f
 2007-08-14 00:16:08 -04:00
Ali Saidi
51ac4d1fb5 Regression: Use test-progs in /dist instead of tests/test-progs since they all aren't there. 
--HG--
extra : convert_revision : 558b970f522f95e3492b7225f227c96cd5e003c3
 2007-08-14 00:14:03 -04:00
Ali Saidi
546fbfb47c fixup bad hand merge 
--HG--
extra : convert_revision : 71db222856a811f2724bbc9bbe4069c1f61754ed
 2007-08-13 23:45:07 -04:00
Ali Saidi
27ddf0b40e Merge IGNORE_STYLE change and my change. 
--HG--
extra : convert_revision : 13880ec6df17b0317d4097243bb24add753a098a
 2007-08-13 23:44:26 -04:00
Ali Saidi
b069b81acf Regression: See if using subprocess instead of os.system and erroring immediately will stop regression randomly hanging. 
--HG--
extra : convert_revision : a663ae935edd1b6e8f0bb5b08583a5b9761d0939
 2007-08-13 23:40:43 -04:00
Gabe Black
ca84d953b9 SPARC: Make nops have the IsNop flag set. 
In O3, a nop is used to carry faults down the pipeline that didn't originate
from an instruction. If the instruction doesn't do anything, that is just
returns NoFault, but doesn't have IsNop set, the NoFault will overwrite the
fault that's being sent down and nothing will happen.

--HG--
extra : convert_revision : 54d99002b550ca0e1cf14603f588dc1038e3e535
 2007-08-13 16:11:27 -07:00
Gabe Black
92a57edff1 O3: Set up the predicted npc and nnpc for a fault carrying noop so that it doesn't cause a false branch mispredict. 
--HG--
extra : convert_revision : 2820597cc966cd7b128cef0dab48fe05089533d7
 2007-08-13 16:08:58 -07:00
Gabe Black
e99c56f971 SPARC: Move tlb state into the tlb. 
Each "strand" may need to have a private copy of this state, but I couldn't
find anywhere in the spec that said that after looking briefly.
This prevents writes to the thread context in o3 which was causing the
pipeline to be flushed and stopping any forward progress. The other ASI
accessible state will probably need to be accessed differently if/when we get
O3 full system up and running.

--HG--
extra : convert_revision : fa7fba812d7f76564ef4a23818e60f536710d557
 2007-08-13 16:06:50 -07:00
Gabe Black
26853e11c0 SPARC: Make the spill and fill handlers use the correct ASI, and let No_Fault ASI accesses work. 
--HG--
extra : convert_revision : 3321bb91da02c1bec27fa34d0ba945cc976b6491
 2007-08-13 16:02:47 -07:00
Gabe Black
82f78ebd39 Move the "translate" member functions back into the base o3 class. 
--HG--
extra : convert_revision : 3c480537bf38f74f0f1d72e75c70aa46ba91b759
 2007-08-13 16:01:09 -07:00
Nathan Binkert
9b4be65327 python: make the DictImporter's unload() work in any context. 
import sys since sys may not be defined in whatever context the DictImporter
is used.  Also reset self.installed after an unload since the same DictImporter
could be used again

--HG--
extra : convert_revision : 988ed7ad8cd41b69e8fc583e618b1b4a146216da
 2007-08-13 13:39:22 -07:00
Ali Saidi
ce219738b9 Style: fix IGNORE_STYLE so it isn't required on the command line. 
--HG--
extra : convert_revision : 42ff16a2ae0316cc4b70ade961a50d5d4a5eb950
 2007-08-12 22:44:14 -04:00
Ali Saidi
e9ddc7fbca Regression: fix configuration for SPARC_FS 
--HG--
extra : convert_revision : 88aa9649cc1b4d8165616e98880d3d6cd2a75762
 2007-08-12 19:44:04 -04:00
Ali Saidi
d114e5fae6 Regression: Update stats for cache changes. 
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extra : convert_revision : 005672e722dec00cb4c38501b5189b4eb7515ca1
 2007-08-12 19:43:55 -04:00
Ali Saidi
02353a60ee MemorySystem: Fix the use of ?: to produce correct results. 
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extra : convert_revision : 31aad7170b35556a4c984f4ebc013137d55d85eb
 2007-08-12 19:43:54 -04:00
Nathan Binkert
64295b800f merge 
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extra : convert_revision : 5866eaa4008c4fa5da7fbb443132b8326955f71d
 2007-08-12 09:56:37 -07:00
Nathan Binkert
b92594dd90 style: If IGNORE_STYLE=True is set on the scons command line, ignore style. 
Use this in the regress script to avoid issues with the checker.

--HG--
extra : convert_revision : 562b6a6d73dc46e412d00ba2588af2793335274e
 2007-08-12 09:56:05 -07:00
Vincentius Robby
ec4000e0e2 Added fastmem option. 
Lets CPU accesses to physical memory bypass Bus.

--HG--
extra : convert_revision : e56e3879de47ee10951a19bfcd8b62b6acdfb30c
 2007-08-08 18:43:12 -04:00
Vincentius Robby
1caed14654 alpha: Quick fix for things related to TLB MRU cache. 
simple-timing test for ALPHA_FS breaks.

--HG--
extra : convert_revision : 5a1b05cddd480849913da81a3b3931fec16485a8
 2007-08-08 18:38:19 -04:00
Ali Saidi
9493501fdb Regression: Add an I/O Cache to the full system regressions that have a cache. 
--HG--
extra : convert_revision : 8ba96e21be2f602eed8258d410038dbe998ef176
 2007-08-10 16:14:02 -04:00
Ali Saidi
06a9f58c68 DMA: Add IOCache and fix bus bridge to optionally only send requests one 
way so a cache can handle partial block requests for i/o devices.

--HG--
extra : convert_revision : a68b5ae826731bc87ed93eb7ef326a2393053964
 2007-08-10 16:14:01 -04:00
Ali Saidi
5c38668ed6 Bus: Only call end() on an stl object once in a loop 
--HG--
extra : convert_revision : 238dcd6da7577b533e52ada2107591c4e9168ebd
 2007-08-10 16:14:01 -04:00
Vincentius Robby
3d40cba8d4 Port, StaticInst: Revert unnecessary changes. 
--HG--
extra : convert_revision : e6ef262bbbc5ad53498e55caac1897e6cc2a61e6
 2007-08-08 14:54:02 -04:00
Vincentius Robby
13d10e844c alpha: Make the TLB cache to actually work. 
Improve MRU checking for StaticInst, Bus, TLB

--HG--
extra : convert_revision : 9116b5655cd2986aeb4205438aad4a0f5a440006
 2007-08-08 14:18:09 -04:00
Gabe Black
ef32494e72 Alpha: Fix an off by one error with the tlb caching mechanism. 
--HG--
extra : convert_revision : e17f7a0d58a2e59b2e270f0827db33d0a29365e0
 2007-08-07 21:51:12 -07:00