Commit graph

282 commits

Author SHA1 Message Date
Gabe Black
531216e9f3 Got rid of some commented out code.
--HG--
extra : convert_revision : 7de82ed72650d877cdb2ecb66c61ae41117658d9
2006-03-07 09:11:00 -05:00
Gabe Black
ab67095b2a Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

--HG--
extra : convert_revision : ead388289742233b5e4f0b37d979e54852cc99b2
2006-03-07 04:42:06 -05:00
Gabe Black
b511128507 Some clean up work with faults.
arch/alpha/faults.cc:
    Renamed the _stat stat to a more descriptive _count, got rid of some old commented out code, and moved common fault handling code, ie recording that the fault happend and that it wasn't mispeculated, into the FaultBase class.
arch/alpha/faults.hh:
    Renamed the _stat stat to the more descriptive _count, and renamed the appropriate accessor functions.
kern/kernel_stats.cc:
kern/kernel_stats.hh:
    The fault statistics are now handled by the fault classes themselves.
sim/faults.cc:
    The default implementation of the "invoke" method now does what all faults should do first, ie record that the fault happened, and make sure the fault isn't being executed on a mispeculated execution path.
sim/faults.hh:
    There is now a default implementation of invoke, and the stat function is taken care of in the architecture specific fault classes.

--HG--
extra : convert_revision : f6656fbea991df9addf85cad740ac37b1036b71a
2006-03-07 04:31:38 -05:00
Gabe Black
b7ebc2d97f Moved where some alpha specific source files were mentioned to be in the alpha specific Sconscript, and took advantage of the os specific directories for the process files.
arch/sparc/faults.cc:
    Remove fake fault, fix to have normal m5 line length limit, and change pointers to be const pointers so that the default faults aren't changed accidentally.
arch/sparc/faults.hh:
    Fix to have normal m5 line length limit, change pointers to const pointers.
arch/sparc/faults.hh:
    Added a typedef for the Addr type, and changed the formatting of the faults slightly.
arch/sparc/faults.hh:
    ur
    Using cleaned up fault class deiffinitions
arch/sparc/faults.hh:
    Added typedef for Addr
arch/sparc/faults.hh:
    Made Addr a global type
arch/sparc/faults.cc:
arch/sparc/faults.hh:
    Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old Fault class renamed.
arch/sparc/faults.cc:
arch/sparc/faults.hh:
    Changed Fault to be a RefCountingPtr
arch/sparc/faults.cc:
arch/sparc/faults.hh:
    MachineCheckFaults and AlignmentFaults are now generated by the ISA, rather than being created directly.
arch/sparc/faults.cc:
arch/sparc/faults.hh:
    Put the Alpha faults into the AlphaISA namespace
arch/sparc/faults.cc:
arch/sparc/faults.hh:
    Moved the _stat for MachineCheckFault and AlignmentFault into the isa specific classes to prevent instantiation of the generic classes.
arch/sparc/faults.cc:
arch/sparc/faults.hh:
    Changed ev5_trap from a function of the execution context to a function of the fault. The actual function still resides in the execution context.
arch/sparc/faults.cc:
    AlphaFault is now an abstract class.
arch/sparc/faults.hh:
    AlphaFault is now an abstract class. Also, AlphaMachineCheckFault and AlphaAlignmentFault multiply inherit from both AlphaFault and from MachineCheckFault and AlignmentFault respectively. These classes get their name from the generic classes.
arch/sparc/faults.cc:
arch/sparc/faults.hh:
    moved ev5_trap fully into the fault class.
arch/sparc/faults.cc:
arch/sparc/faults.hh:
    Changed the name of the fault's invocation method from ev5_trap to invoke.
arch/sparc/faults.cc:
arch/sparc/faults.hh:
    Moved the fault invocation code into the fault class fully, and got rid of the need for isA.
arch/sparc/faults.cc:
arch/sparc/faults.hh:
    Got rid of the multiple inheritance in the Fault classes, and the base MachineCheck and Alignment faults.
arch/sparc/faults.cc:
    bk cp ../alpha/faults.cc faults.cc
arch/sparc/faults.hh:
    bk cp ../alpha/faults.hh faults.hh
SConscript:
    Moved the alpha specific source files into the alpha specific SConscript
arch/alpha/SConscript:
    Moved the alpha specific source files into the alpha specific SConscript, and moved the process files into the new os specific subfolders.
arch/alpha/linux/process.cc:
arch/alpha/process.hh:
arch/sparc/process.hh:
arch/alpha/tru64/process.cc:
    Changed the include paths to use the new os specific directories.

--HG--
rename : arch/alpha/linux_process.cc => arch/alpha/linux/process.cc
rename : arch/alpha/linux_process.hh => arch/alpha/linux/process.hh
rename : arch/alpha/tru64_process.cc => arch/alpha/tru64/process.cc
rename : arch/alpha/tru64_process.hh => arch/alpha/tru64/process.hh
rename : arch/sparc/linux_process.cc => arch/sparc/linux/process.cc
rename : arch/sparc/linux_process.hh => arch/sparc/linux/process.hh
extra : convert_revision : dc7eed7994b9c5e7308c771f43758292e78ce3e3
2006-03-07 04:25:42 -05:00
Kevin Lim
9358681756 Remove call to swap_palshadow that is no longer needed.
arch/alpha/faults.cc:
    Remove call to swap_palshadow.

--HG--
extra : convert_revision : 10282c11080379fc4e8a166ff35d18d728f0d5a4
2006-03-05 00:13:32 -05:00
Kevin Lim
5d67efd217 Merge ktlim@zizzer:/bk/m5
into  zamp.eecs.umich.edu:/z/ktlim2/m5-shadowregs

--HG--
extra : convert_revision : 31c1bcc2c52d88bd5133a2007f9feefa2c04b6aa
2006-03-04 23:37:45 -05:00
Gabe Black
bc619f37ae Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

arch/alpha/system.cc:
    Hand merged

--HG--
extra : convert_revision : 34d7608d21dc6dee3a3feed5e5671f5de6ebfa26
2006-03-04 22:32:13 -05:00
Gabe Black
ebd28075ab Changed targetarch to arch
--HG--
extra : convert_revision : f54d8afd2c7eb338133046e612cddc1d5689a55c
2006-03-04 22:30:09 -05:00
Ali Saidi
f7e6bfbe78 Merge zizzer:/bk/m5
into  zeep.eecs.umich.edu:/z/saidi/work/m5.head

--HG--
extra : convert_revision : 405920a23690089a02a5b75cfe947885d8749dc4
2006-03-04 20:45:13 -05:00
Ali Saidi
d01a593433 move alpha specific code into arch/alpha
System -> AlphaSystem

SConscript:
    Move some more files around
arch/alpha/freebsd/system.cc:
arch/alpha/freebsd/system.hh:
    System -> AlphaSystem
arch/alpha/linux/aligned.hh:
arch/alpha/linux/hwrpb.hh:
arch/alpha/linux/system.cc:
arch/alpha/linux/thread_info.hh:
arch/alpha/linux/threadinfo.hh:
    move alpha specific code into arch/alpha
python/m5/objects/System.py:
    Split off arch specific parts of system into AlphaSystem

--HG--
rename : kern/freebsd/freebsd_system.cc => arch/alpha/freebsd/system.cc
rename : kern/freebsd/freebsd_system.hh => arch/alpha/freebsd/system.hh
rename : kern/linux/aligned.hh => arch/alpha/linux/aligned.hh
rename : kern/linux/hwrpb.hh => arch/alpha/linux/hwrpb.hh
rename : kern/linux/linux_system.cc => arch/alpha/linux/system.cc
rename : kern/linux/linux_system.hh => arch/alpha/linux/system.hh
rename : kern/linux/thread_info.hh => arch/alpha/linux/thread_info.hh
rename : kern/linux/linux_threadinfo.hh => arch/alpha/linux/threadinfo.hh
rename : kern/tru64/tru64_system.cc => arch/alpha/tru64/system.cc
rename : kern/tru64/tru64_system.hh => arch/alpha/tru64/system.hh
extra : convert_revision : 1c496efb823326a4b629574bd9b5f30e99a0aa40
2006-03-04 20:45:01 -05:00
Kevin Lim
5790e295a9 Merge ktlim@zizzer:/bk/m5
into  zamp.eecs.umich.edu:/z/ktlim2/m5-shadowregs

arch/alpha/ev5.cc:
    Remove intr_post, it is no longer used.
arch/alpha/isa_traits.hh:
    Hand merge.

--HG--
extra : convert_revision : 94f14539a9e5646f8c368b15b2dff18ab2f492cf
2006-03-04 13:06:24 -05:00
Ali Saidi
1e071c9f5f we REALLY don't want to use system headers for libelf...
use "" not <>

targetarch->arch

arch/alpha/system.cc:
    targetarch -> arch
base/loader/elf_object.cc:
    we REALLY don't want to use system headers  for libelf...
    use "" not <>

--HG--
extra : convert_revision : d0e1672dc655dca3081e36b2158e7b19ef54af40
2006-03-04 12:35:13 -05:00
Gabe Black
1e3b221fe3 Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

--HG--
extra : convert_revision : cb6de8d050ac5abb8f61eb5780deeb06e93b1a0c
2006-03-04 03:19:58 -05:00
Gabe Black
890eb2432d Removed the commented out declaration of the Addr type.
--HG--
extra : convert_revision : 70612a3efc877febbff0c8fb9065dea7e1d12cd8
2006-03-04 03:10:34 -05:00
Gabe Black
7c4c623302 Filled out the object file loader so it can load object files for several OSs and architectures.
SConscript:
    Added ./libelf as an include search directory. There might be a better spot for this than where I put it.
arch/SConscript:
    Combined the linux_process.h and tru64_process.h into process.h. This allows each ISA to support processes from arbitrary OSs.
arch/alpha/SConscript:
    Added process.cc as a source file. It provides an implementation of createProcess, which takes an object_file object and creates the appropriate process object, or dies.
base/loader/elf_object.cc:
    Actually extract the OS and architecture from the elf file, rather than always guessing Alpha and Linux.
base/loader/object_file.hh:
    Added constants for SPARC, MIPS, and Solaris, and changed the include for the Addr type.
sim/process.cc:
    Pushed creation of specific process objects into the ISA specific code.

--HG--
extra : convert_revision : b4754e7ca8328672d07e1394c4d162e199606b53
2006-03-04 03:09:23 -05:00
Kevin Lim
fc664f7ca6 Merge ktlim@zizzer:/bk/m5
into  zamp.eecs.umich.edu:/z/ktlim2/m5-shadowregs

--HG--
extra : convert_revision : 979ab1fc4e1ea4d6a78ac9a2ec894f0be4feb01d
2006-03-03 16:04:34 -05:00
Kevin Lim
14b6cd39aa Remove intr_post function. No longer being used.
--HG--
extra : convert_revision : 1dc1d691244fd2edbd21d5cbf0764622d8f95fbb
2006-03-03 15:41:57 -05:00
Kevin Lim
e7825aab59 Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included.
The shadow registers are folded into the normal integer registers to ease renaming indexing.

Include the removed Opcdec class of instructions for faulting when a pal mode only instruction is decoded in non-pal mode.

arch/alpha/ev5.cc:
    Changes to automatically map the shadow registers if the instruction is in PAL mode.
arch/alpha/isa/branch.isa:
arch/alpha/isa/decoder.isa:
arch/alpha/isa/fp.isa:
arch/alpha/isa/int.isa:
arch/alpha/isa/mem.isa:
arch/alpha/isa/pal.isa:
arch/alpha/isa/unimp.isa:
    Changes for automatically using the shadow registers.  Now instructions must decode based on an ExtMachInst, which is a MachInst with any decode context information concatenated onto the higher order bits.
arch/alpha/isa/main.isa:
    Changes for automatically using the shadow registers.  Now instructions must decode based on an ExtMachInst, which is a MachInst with any decode context information concatenated onto the higher order bits.

    The decoder (for Alpha) uses the 32nd bit in order to determine if the machine is in PAL mode.  If it is, then it refers to the reg_redir table to determine the true index of the register it is using.

    Also include the opcdec instruction definition.
arch/alpha/isa_traits.hh:
    Define ExtMachInst type that is used by the static inst in order to decode the instruction, given the context of being in pal mode or not.

    Redefine the number of Int registers, splitting it into NumIntArchRegs (32) and NumIntRegs (32 + 8 shadow registers).

    Change the dependence tags to reflect the integer registers include the 8 shadow registers.

    Define function to make an ExtMachInst.  Currently it is somewhat specific to Alpha; in the future it must be decided to make this more generic and possibly slower, or leave it specific to each architecture and ifdef it within the CPU.
arch/isa_parser.py:
    Have static insts decode on the ExtMachInst.
base/remote_gdb.cc:
    Support the automatic remapping of shadow registers.  Remote GDB must now look at the PC being read in order to tell if it should use the normal register indices or the shadow register indices.
cpu/o3/regfile.hh:
    Comment out the pal registers; they are now a part of the integer registers.
cpu/simple/cpu.cc:
    Create an ExtMachInst to decode on, based on the normal MachInst and the PC of the instructoin.
cpu/static_inst.hh:
    Change from MachInst to ExtMachInst to support shadow register renaming.

--HG--
extra : convert_revision : 1d23eabf735e297068e1917445a6348e9f8c88d5
2006-03-03 15:28:25 -05:00
Ali Saidi
9ad9178587 Merge zizzer:/bk/m5
into  zeep.eecs.umich.edu:/z/saidi/work/m5.head

--HG--
extra : convert_revision : 8f463682e32a457cd9171c63dcec5209cb850b56
2006-03-03 14:25:26 -05:00
Ali Saidi
0bf25c5953 First cut at moving alpha specefic stuff out of /sim/system* into
arch/alpha/system*.

SConscript:
dev/alpha_console.cc:
dev/alpha_console.hh:
kern/freebsd/freebsd_system.cc:
kern/freebsd/freebsd_system.hh:
kern/kernel_stats.cc:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/pseudo_inst.cc:
sim/system.cc:
sim/system.hh:
    First cut at moving alpha specefic stuff out of /sim/system*

--HG--
extra : convert_revision : eba58f537fc04e605af4fc216e184b074a44c8a0
2006-03-03 14:24:15 -05:00
Gabe Black
dd0d8e6287 Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

--HG--
extra : convert_revision : f6db244a66431dd6b8c5ba251ed02d76cd509cff
2006-03-02 21:44:43 -05:00
Gabe Black
6b7d627903 Got rid of the multiple inheritance in the Fault classes, and the base MachineCheck and Alignment faults.
--HG--
extra : convert_revision : 4b1429ef5c7a11c25e28f2bc868cc1481a08c5d1
2006-03-01 19:03:42 -05:00
Ali Saidi
1624d9e545 Merge zizzer:/bk/m5
into  zeep.eecs.umich.edu:/z/saidi/work/m5.q

--HG--
extra : convert_revision : 4855ecfb3de652456a8be413c9e538c91709dcb6
2006-03-01 12:43:04 -05:00
Gabe Black
2eff368dd0 Cleaned up some of the Fault system.
arch/alpha/ev5.cc:
    Commented out the intr_post function since it's not used. If this really -is- needed, it should be moved into the fault class.
arch/alpha/faults.cc:
arch/alpha/faults.hh:
    Moved the fault invocation code into the fault class fully, and got rid of the need for isA.
cpu/exec_context.cc:
cpu/exec_context.hh:
    Removed the trap function from the ExecContext. The faults will execute normally in full system mode, but always panic in syscall emulation mode.
cpu/ozone/cpu.hh:
cpu/simple/cpu.hh:
    Changed the execution context executing a fault to a fault executing on the execution context.
sim/faults.cc:
    If not in full system mode, trying to invoke a fault causes a panic.
sim/faults.hh:
    Removed the isA function.

--HG--
extra : convert_revision : 894dc8f0755c8efc4b7ef5a09fb2cf7373042395
2006-03-01 05:26:08 -05:00
Gabe Black
e08cf8fee0 Changed the name of the fault's invocation method from ev5_trap to invoke.
--HG--
extra : convert_revision : b7ab14ac644f6a38c69aaa5372b3002b21f34af0
2006-03-01 01:23:10 -05:00
Gabe Black
69e91d7617 moved ev5_trap fully into the fault class.
--HG--
extra : convert_revision : 182cdec9a4e05f55edff0c6a114844b9ad2ca8db
2006-03-01 00:09:08 -05:00
Ali Saidi
26d7b5a4d1 Add quiesceNs, quiesceTime, quiesceCycles, and m5panic pseudo ops.
This changeset removes a check that prevents quiescing when an
interrupt is pending. *** You should only call quiesce if that
isn't a problem. ***

arch/alpha/isa/decoder.isa:
sim/pseudo_inst.cc:
sim/pseudo_inst.hh:
    Add quiesceNs, quiesceCycles, quisceTime and m5panic pseudo ops.
    These quiesce for a number of ns, cycles, report how long
    we were quiesced for, and panic the simulator respectively.
    The latter is added to the panic() function in the console and linux
    kernel instead of executing an infinite loop until someone notices.
cpu/exec_context.cc:
cpu/exec_context.hh:
    Add a quiesce end event to the execution contexted which upon
    executing wakes up a CPU for quiesceCycles/quiesceNs.
util/m5/Makefile:
    Make the makefile more reasonable
util/m5/m5.c:
    update the m5op executable to use the files from the linux tree
util/m5/m5op.S:
    update m5op.S from linux tree
util/m5/m5op.h:
    update m5op.h from linux tree

--HG--
rename : util/m5/m5op.s => util/m5/m5op.S
extra : convert_revision : 3be18525e811405b112e33f24a8c4e772d15462d
2006-02-28 18:41:04 -05:00
Kevin Lim
34da58a698 Merge ktlim@zizzer:/bk/m5
into  zamp.eecs.umich.edu:/z/ktlim2/clean/m5-clean

arch/alpha/ev5.cc:
cpu/o3/regfile.hh:
    Hand merge.

--HG--
rename : arch/alpha/alpha_memory.cc => arch/alpha/tlb.cc
extra : convert_revision : c941dd2198851398820b38a66471372ed8454891
2006-02-28 15:16:24 -05:00
Gabe Black
299efffaf5 Cleaned up and slightly reorganized the Fault class heirarchy.
arch/alpha/ev5.cc:
    Changed c style casts of Faults to dynamic_casts
arch/alpha/faults.cc:
    AlphaFault is now an abstract class.
arch/alpha/faults.hh:
    AlphaFault is now an abstract class. Also, AlphaMachineCheckFault and AlphaAlignmentFault multiply inherit from both AlphaFault and from MachineCheckFault and AlignmentFault respectively. These classes get their name from the generic classes.
cpu/o3/alpha_cpu_impl.hh:
    Changed a c style cast to a dynamic_cast for a Fault
sim/faults.hh:
    All generic Fault classes are now abstract. Also, MachineCheckFault and AlignmentFault inherit FaultBase as a virtual base class to help resolve ambiguities when they are multiply inherited in ISA specific classes. The override the isMachineCheckFault and isAlignmentFault functions appropriately, and provide a standard name for these faults.

--HG--
extra : convert_revision : 2cb906708e3eaec4a12587484c09e50ed6ef88fc
2006-02-28 06:02:18 -05:00
Gabe Black
6165419d35 Changed ev5_trap from a function of the execution context to a function of the fault. The actual function still resides in the execution context.
--HG--
extra : convert_revision : 56e33536cdd9079ace03896b85ea3c84b6eb4e57
2006-02-27 23:26:13 -05:00
Gabe Black
36b2d9815e Moved the _stat for MachineCheckFault and AlignmentFault into the isa specific classes to prevent instantiation of the generic classes.
--HG--
extra : convert_revision : 0378261342df008c2bf6d260295ef21b15f119a8
2006-02-27 16:46:00 -05:00
Gabe Black
2f7b8ab1ec Got rid of the fault_addr function.
--HG--
extra : convert_revision : deb54cd82db47abb6d9bac76e072f2a4b1c883b2
2006-02-27 16:27:01 -05:00
Kevin Lim
70b35bab57 Changes to put all the misc regs within the misc reg file. This includes the FPCR, Uniq, lock flag, lock addr, and IPRs.
They are now accessed by calling readMiscReg()/setMiscReg() on the XC.  Old IPR accesses are supported by using readMiscRegWithEffect() and setMiscRegWithEffect() (names may change in the future).

arch/alpha/alpha_memory.cc:
    Change accesses to IPR to go through the XC.
arch/alpha/ev5.cc:
    Change accesses for IPRs to go through the misc regs.
arch/alpha/isa/decoder.isa:
    Change accesses to IPRs to go through the misc regs.  readIpr() and setIpr() are now changed to calls to readMiscRegWithEffect() and setMiscRegWithEffect().
arch/alpha/isa/fp.isa:
    Change accesses to IPRs and Fpcr to go through the misc regs.
arch/alpha/isa/main.isa:
    Add support for all misc regs being accessed through readMiscReg() and setMiscReg().  Instead of readUniq and readFpcr, they are replaced by calls with Uniq_DepTag and Fpcr_DepTag passed in as the register index.
arch/alpha/isa_traits.hh:
    Change the MiscRegFile to a class that handles all accesses to MiscRegs, which in Alpha include the FPCR, Uniq, Lock Addr, Lock Flag, and IPRs.
    Two flavors of accesses are supported: normal register reads/writes, and reads/writes with effect.  The latter are basically the original read/write IPR functions, while the former are normal reads/writes.

    The lock flag and lock addr registers are added to the dependence tags in order to support being accessed through the misc regs.
arch/alpha/stacktrace.cc:
cpu/simple/cpu.cc:
dev/sinic.cc:
    Change accesses to the IPRs to go through the XC.
arch/alpha/vtophys.cc:
    Change access to the IPR to go through the XC.
arch/isa_parser.py:
    Change generation of code for control registers to use the readMiscReg and setMiscReg functions.
base/remote_gdb.cc:
    Change accesses to the IPR to go through the XC.
cpu/exec_context.hh:
    Use the miscRegs to access the lock addr, lock flag, and other misc registers.
cpu/o3/alpha_cpu.hh:
cpu/simple/cpu.hh:
    Support interface for reading and writing misc registers, which replaces readUniq, readFpcr, readIpr, and their set functions.
cpu/o3/alpha_cpu_impl.hh:
    Change accesses to the IPRs to go through the miscRegs.
    For now comment out some of the accesses to the misc regs until the proxy exec context is completed.
cpu/o3/alpha_dyn_inst.hh:
    Change accesses to misc regs to use readMiscReg and setMiscReg.
cpu/o3/alpha_dyn_inst_impl.hh:
    Remove old misc reg accessors.
cpu/o3/cpu.cc:
    Comment out old misc reg accesses until the proxy exec context is completed.
cpu/o3/cpu.hh:
    Change accesses to the misc regs.
cpu/o3/regfile.hh:
    Remove old access methods for the misc regs, replace them with readMiscReg and setMiscReg.  They are dummy functions for now until the proxy exec context is completed.
kern/kernel_stats.cc:
kern/system_events.cc:
    Have accesses to the IPRs go through the XC.
kern/tru64/tru64.hh:
    Have accesses to the misc regs use the new access methods.

--HG--
extra : convert_revision : e32e0a3fe99522e17294bbe106ff5591cb1a9d76
2006-02-27 11:44:35 -05:00
Gabe Black
f1ef4a8f06 Renamed arch files to remove alpha prefix, and changed alpha_memory.hh and cc to a more accurate tlb.hh and cc
--HG--
rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux_process.cc
rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux_process.hh
rename : arch/alpha/alpha_memory.cc => arch/alpha/tlb.cc
rename : arch/alpha/alpha_memory.hh => arch/alpha/tlb.hh
rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64_process.cc
rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64_process.hh
extra : convert_revision : 9fe6863cc37347d2a6bd716c529b0a4a50b36ea7
2006-02-27 06:05:10 -05:00
Gabe Black
07cd7e966e Added isMachineCheckFault and isAlignmentFault virtual functions to the fault base class, and replaced the isA templated function with them where appropriate.
arch/alpha/ev5.cc:
cpu/simple/cpu.cc:
    Changed from the isA templated function to isMachineCheckFault and isAlignmentFault
sim/faults.hh:
    Added isMachineCheckFault and isAlignmentFault virtual functions to the fault base class.

--HG--
extra : convert_revision : 3bf3a4369bc24a039648ee4f2a9c1663362ff2e2
2006-02-27 04:02:45 -05:00
Gabe Black
f9c2b9e74f Put the Alpha faults into the AlphaISA namespace
--HG--
extra : convert_revision : d9586bb8ffaab74673aa0b3d17bb676b949ff212
2006-02-27 04:00:24 -05:00
Gabe Black
444f520f7e MachineCheckFaults and AlignmentFaults are now generated by the ISA, rather than being created directly.
arch/alpha/alpha_memory.cc:
cpu/base_dyn_inst.cc:
dev/alpha_console.cc:
dev/pcidev.hh:
dev/sinic.cc:
    MachineCheckFaults are now generated by the ISA, rather than being created directly.

--HG--
extra : convert_revision : 34a7da41639e93be21ed70dac681b27480008d19
2006-02-27 03:57:15 -05:00
Gabe Black
e66f521d5b Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

SConscript:
arch/alpha/ev5.cc:
dev/alpha_console.cc:
    Hand merged

--HG--
extra : convert_revision : 318a671e6803400d3ed086a90e70d6790e4f6b19
2006-02-24 18:45:28 -05:00
Gabe Black
08637efadc Changed Fault from a FaultBase * to a RefCountingPtr, added "new"s where appropriate, and took away the constant examples of each fault which where for comparing to a fault to determine its type.
arch/alpha/alpha_memory.cc:
arch/alpha/isa/decoder.isa:
    Added news where faults are created.
arch/alpha/ev5.cc:
    Changed places where a fault was compared to a fault type to use isA rather than ==
arch/alpha/faults.cc:
arch/alpha/faults.hh:
    Changed Fault to be a RefCountingPtr
arch/alpha/isa/fp.isa:
    Added a new where a FloatEnableFault was created.
arch/alpha/isa/unimp.isa:
arch/alpha/isa/unknown.isa:
    Added a new where an UnimplementedFault is created.
base/refcnt.hh:
    Added include of stddef.h for the NULL macro
cpu/base_dyn_inst.cc:
    Added a new where an UnimplementedOpcodeFault is created.
cpu/o3/alpha_cpu_impl.hh:
    Changed places where a fault was compared to a fault type to use isA rather than ==. Also changed fault->name to fault->name()
cpu/o3/regfile.hh:
    Added new where UnimplementedOpcodeFaults are created.
cpu/simple/cpu.cc:
    Changed places where a fault was compared to a fault type to use isA rather than ==. Also added a new where an Interrupt fault is created.
dev/alpha_console.cc:
    Added news where MachineCheckFaults are created.
dev/pcidev.hh:
    Added news where MachineCheckFaults are generated.
dev/sinic.cc:
    Changed places where a fault was compared to a fault type to use isA rather than ==. Added news where MachineCheckFaults are created. Fixed a problem where m5.fast had unused variables.
kern/kernel_stats.cc:
    Commented out where _faults is initialized. This statistic will probably be moved elsewhere in the future.
kern/kernel_stats.hh:
    Commented out the declaration of _fault. when fault() is called, the fault increments its own stat.
sim/faults.cc:
sim/faults.hh:
    Changed Fault from a FaultBase * to a RefCountingPtr.

--HG--
extra : convert_revision : b40ccfc42482d5a115e111dd897fa378d23c6c7d
2006-02-24 01:51:45 -05:00
Korey Sewell
f6cac25dcf name changes ...
SConscript:
    change to alpha_memory.hh

--HG--
rename : arch/alpha/memory.cc => arch/alpha/alpha_memory.cc
rename : arch/alpha/memory.hh => arch/alpha/alpha_memory.hh
extra : convert_revision : 62b1a41de22701160f04cb7a78242746cfcde819
2006-02-23 18:46:12 -05:00
Ali Saidi
4f831bc561 ev5.cc:
SCCS merged

arch/alpha/ev5.cc:
    SCCS merged

--HG--
extra : convert_revision : 9d70c1d461dab0ec016fd0616d74a49942aac659
2006-02-23 15:08:08 -05:00
Ali Saidi
e1c3acd91c Merge zizzer:/bk/m5
into  zeep.eecs.umich.edu:/z/saidi/work/m5.head

cpu/simple/cpu.cc:
    remove initCPU from constructor
dev/alpha_console.cc:
    we are panicing, so no need to return a fault

--HG--
extra : convert_revision : 72389ea0c96e91a55f35b884200325224bfb6ed9
2006-02-23 15:06:06 -05:00
Ali Saidi
1166d4f0bf Get rid of the xc from the alphaAccess/alphaConsole backdoor device.
Now allocate an array of stacks indexed by cpu number which specify
cpu stacks and are initialized by cpu 0. Othe cpus spin waiting for
their stacks before continuing. This change *REQUIRES* a the new
console code to operate correctly.

arch/alpha/ev5.cc:
    Add cpuId to initCPU/initIPR functions
cpu/o3/cpu.cc:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Move the cpu initilization into an init() function since it now needs
    the CPU id which isn't known at construction
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
    instead of the bootstrap variables, add space for 64 cpu stacks in the
    alpha access structure.
sim/system.cc:
    start all cpus immediately rather than just the first one

--HG--
extra : convert_revision : 28c218af49d885a0f203ada419f16f25d5a3f37b
2006-02-23 14:50:16 -05:00
Steve Reinhardt
99484cfae8 Create a Builder object for .isa files in arch/SConscript.
Start using SCons File objects to avoid fixed paths in
subordinate SConscripts.

SConscript:
    Push isa_parser stuff (including .isa scanner) down into
    arch/SConscript.
arch/SConscript:
    Create a Builder object for .isa files, including existing scanner.
    Return file objects generated by isa-specific SConscript
    back up to parent.
arch/alpha/SConscript:
arch/mips/SConscript:
arch/sparc/SConscript:
    Convert sources to scons File objects, so file names can be specified
    relative to the current directory.
    Invoke new builder for isa description, and get generated sources from
    there (instead of listing them explicitly).
arch/isa_parser.py:
    Get rid of third argument ("include_path").
    It was a pain to generate this from scons, and it turned out
    it's not needed anyway, since the only included file
    (decoder.hh) will be in the same directory as the sources.

--HG--
extra : convert_revision : 36861bcef36763f229704d8cb7a642b4486a3581
2006-02-23 14:31:15 -05:00
Steve Reinhardt
c13ea339dc Add pipe() syscall to Alpha Linux emulation.
arch/alpha/alpha_linux_process.cc:
    Add pipeFunc.

--HG--
extra : convert_revision : c094d2dff993d5e60bc43b7cd4b9586c15c634a3
2006-02-23 08:16:59 -05:00
Gabe Black
5ecaaa0fb0 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into  zizzer.eecs.umich.edu:/z/m5/Bitkeeper/multiarch

--HG--
extra : convert_revision : 850077a56aead260aa4bbd3df60b672a931d57ed
2006-02-23 04:08:55 -05:00
Steve Reinhardt
9a4c0f12ef Clean excess comments out of SConscripts.
SConscript:
arch/alpha/SConscript:
    Clean out excess comments.

--HG--
extra : convert_revision : 7aae68d36f9fce5f236d117d803b5e3cd4a3769d
2006-02-22 21:11:45 -05:00
Korey Sewell
9bc7f13eeb make sure alpha still compiles , rename files back to original naming ...
Now that we have decoder.do, add new files so we can start compiling other files
needed for MIPS syscall emulation mode

arch/mips/linux_process.cc:
arch/mips/linux_process.hh:
    New MIPS-specific file

--HG--
rename : arch/alpha/linux_process.cc => arch/alpha/alpha_linux_process.cc
rename : arch/alpha/linux_process.hh => arch/alpha/alpha_linux_process.hh
rename : arch/alpha/tru64_process.cc => arch/alpha/alpha_tru64_process.cc
rename : arch/alpha/tru64_process.hh => arch/alpha/alpha_tru64_process.hh
extra : convert_revision : 2bfc27e8772523cbeb95f40684f9a32fe5554f87
2006-02-22 04:08:08 -05:00
Korey Sewell
37cd6695eb Merge zizzer:/bk/multiarch
into  zazzer.eecs.umich.edu:/z/ksewell/research/m5-sim/multiarch

--HG--
rename : arch/alpha/alpha_memory.cc => arch/alpha/memory.cc
rename : arch/alpha/alpha_memory.hh => arch/alpha/memory.hh
extra : convert_revision : c641ba3c1009829b7276279b2dca441be1da5b30
2006-02-21 22:06:18 -05:00
Korey Sewell
a4799a89de Renaming alpha files and changing some MIPS stuff to be more like Alpha version
SConscript:
    changed the alpha_memory.hh to memory.hh in SConscript
arch/isa_parser.py:
    temporarily comment out o3 model
arch/mips/isa/base.isa:
arch/mips/isa_traits.cc:
arch/mips/isa_traits.hh:
    Fix Up Base Class to mirror how Alpha generates StaticInsts
arch/mips/faults.cc:
    MIPS fault.cc file
arch/mips/faults.hh:
    MIPS fault.hh file

--HG--
rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux_process.cc
rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux_process.hh
rename : arch/alpha/alpha_memory.cc => arch/alpha/memory.cc
rename : arch/alpha/alpha_memory.hh => arch/alpha/memory.hh
rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64_process.cc
rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64_process.hh
extra : convert_revision : f92d6e765ca96a8b952aef79ed119fa29464563b
2006-02-21 22:02:05 -05:00