sanchayanmaity/gem5
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109 commits

Author SHA1 Message Date
Stephen Hines
b7af65f414 SCons: Fixing SCons bug 2006 issues for non-alpha ISAs 
--HG--
extra : convert_revision : 26e3edef06d6f82aaf162825c151d18faadd6e72
 2008-05-20 14:04:53 -04:00
Gabe Black
8b4796a367 TLB: Make a TLB base class and put a virtual demapPage function in it. 
--HG--
extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f
 2008-02-26 23:38:51 -05:00
Stephen Hines
6cc1573923 Make the Event::description() a const function 
--HG--
extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
 2008-02-06 16:32:40 -05:00
Korey Sewell
5d23f86e98 add back in clobbered MIPS fix for g++ 4.2 
--HG--
extra : convert_revision : 80ad1cc32c6e59925526abd274132e4f9e35f0c1
 2007-11-17 00:02:56 -05:00
Korey Sewell
f2fea63c65 go back and fix up MIPS copyright headers 
--HG--
extra : convert_revision : 886e762e13b7a05d6d8a14bde6c2a3567c32a4d1
 2007-11-16 21:32:22 -05:00
Korey Sewell
52e6aa6284 move initCPU, processInterrupts declaration to core_specific file. 
--HG--
extra : convert_revision : 9bc88380f05f86c68117280f555c77eb4c627d7b
 2007-11-16 21:31:37 -05:00
Korey Sewell
923c385b97 remove unnecessary namespace 
--HG--
extra : convert_revision : 8936fe2246ca659a6dfe0835f66aa8232ed427de
 2007-11-15 20:52:59 -05:00
Korey Sewell
3110b157e6 fix MIPS headers 
--HG--
extra : convert_revision : 2870a146a1be0e8c80878090f39c0eaa15d2eb13
 2007-11-15 14:21:01 -05:00
Korey Sewell
7ba65aecaa Add CoreSpecific type to all archs 
--HG--
extra : convert_revision : 659786bf6489ab6151e47fbf1f4c0a723262fce2
 2007-11-15 14:17:21 -05:00
Korey Sewell
789153dff6 Get MIPS simple regression working. Take out unecessary functions "setShadowSet", "CacheOp" 
--HG--
extra : convert_revision : a9ae8a7e62c27c2db16fd3cfa7a7f0bf5f0bf8ea
 2007-11-15 03:10:41 -05:00
Korey Sewell
2820a448e2 comment and spacing 
--HG--
extra : convert_revision : b3acde37bc11919700c257eae58ea9e0f66c9786
 2007-11-14 15:33:43 -05:00
Korey Sewell
5f7879a935 Get MIPS_SE actually working again by actually by fixing TLB stuff and running hello world 
--HG--
extra : convert_revision : 0944e7661934baddca1f1a895af0b75be2d96b10
 2007-11-14 06:24:47 -05:00
Korey Sewell
2692590049 Add in files from merge-bare-iron, get them compiling in FS and SE mode 
--HG--
extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
 2007-11-13 16:58:16 -05:00
Steve Reinhardt
4b49bd47f4 String constant const-ness changes to placate g++ 4.2. 
Also some bug fixes in MIPS ISA uncovered by g++ warnings
(Python string compares don't work in C++!).

--HG--
extra : convert_revision : b347cc0108f23890e9b73b3ee96059f0cea96cf6
 2007-10-31 18:04:22 -07:00
Ali Saidi
538fae951b Traceflags: Add SCons function to created a traceflag instead of having one file with them all. 
--HG--
extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
 2007-10-31 01:21:54 -04:00
Gabe Black
fddfa71658 TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system. 
--HG--
extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8
 2007-10-25 19:04:44 -07:00
Ali Saidi
0711f4f17a SE: Fix page table and system serialization, don't reinit process if this is a checkpoint restore. 
--HG--
extra : convert_revision : 03dcf3c088e57b7abab60efe700d947117888306
 2007-10-25 20:13:35 -04:00
Gabe Black
54466a31c3 Make the process objects use the Params structs in their constructors, and use a limit to check if access are on the stack. 
--HG--
extra : convert_revision : af40a7acf424c4c4f62d0d76db1001a714ae0474
 2007-10-16 18:04:01 -07:00
Gabe Black
50e2d20cb8 Merge with head. 
--HG--
extra : convert_revision : 1aa0e4569a7c10e6a395c2c951ac29275b5bcf59
 2007-10-02 23:03:38 -07:00
Gabe Black
a56c651980 Predecoder: Clear out predecoder state on an ITLB fault. 
--HG--
extra : convert_revision : 68f8ff778dbd28ade5070edf5a7d662e7bf0045a
 2007-10-02 22:21:38 -07:00
Ali Saidi
d325f49b70 Rename cycles() function to ticks() 
--HG--
extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
 2007-09-28 13:21:52 -04:00
Gabe Black
f3f3747431 X86: Put in the foundation for x87 stack based fp registers. 
--HG--
extra : convert_revision : 940f92efd4a9dc59106e991cc6d9836861ab69de
 2007-09-19 18:26:42 -07:00
Miles Kaufmann
54cc0053f0 params: Deprecate old-style constructors; update most SimObject constructors. 
SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses

The SimObject(const std::string &name) constructor was removed.  Subclasses
that still rely on that behavior must call the parent initializer as
  : SimObject(makeParams(name))

--HG--
extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
 2007-08-30 15:16:59 -04:00
Gabe Black
a3367adaff Address translation: De-templatize the GenericTLB class. 
--HG--
extra : convert_revision : b605a90a4a1071e39f49085a839fdcd175e09fdb
 2007-08-28 14:30:50 -07:00
Gabe Black
8253ff2ba9 MIPS: Fixes to get mips to compile. 
--HG--
extra : convert_revision : 23561eda853a51046ae56c23a88466230c3e83f2
 2007-08-27 18:29:15 -07:00
Gabe Black
9b49a78cfd Address translation: Make the page table more flexible. 
The page table now stores actual page table entries. It is still a templated
class here, but this will be corrected in the near future.

--HG--
extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d
 2007-08-26 20:33:57 -07:00
Gabe Black
537239b278 Address Translation: Make SE mode use an actual TLB/MMU for translation like FS. 
--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
 2007-08-26 20:24:18 -07:00
Nathan Binkert
f20ba92a76 merge: mips fix to getArgument 
--HG--
extra : convert_revision : 0e97c80ca9bdd354f537bf5d036e024da0081306
 2007-08-01 16:58:22 -07:00
Nathan Binkert
a3e70f4957 mips: make getArgument inline so mips will link properly 
--HG--
extra : convert_revision : 7fdbf1f35a5fcbd8704bf02aafcb3ea069626ce3
 2007-08-01 16:57:29 -07:00
Gabe Black
baa1182513 Merge with head. 
--HG--
extra : convert_revision : 646d559a10706521b1918d2378d0f99ab5255c77
 2007-08-01 16:00:33 -07:00
Gabe Black
458dfc8b3e Merge with head. 
--HG--
extra : convert_revision : f677debfd636d79bc5097eb45331601d3253743d
 2007-08-01 15:54:25 -07:00
Gabe Black
c032a535ab MIPS: Files which are needed for the MIPS fix. 
--HG--
extra : convert_revision : ae710fa8e4e9f57c19cd7277b1b59efd0af40b6a
 2007-08-01 15:53:39 -07:00
Gabe Black
8da3e0548e Merge with head. 
--HG--
extra : convert_revision : 444901221e9a0b991213fbcd555f2f5cca67e91b
 2007-08-01 15:12:07 -07:00
Ali Saidi
84cd78e96f Merge Gabe and my changes to arch/mips/utility.hh 
--HG--
extra : convert_revision : d5a9d74ee6edf71524ba5c03fb7f054cf9722213
 2007-08-01 17:05:03 -04:00
Ali Saidi
fae60c164e Arguments: Get rid of duplicate code for the Arguments class in each architecture. 
Move the argument files to src/sim and add a utility.cc file with a function
getArguments() that returns the given argument in the architecture specific fashion.
getArguments() was getArg() is the architecture specific Argument class and has had
all magic numbers replaced with meaningful constants. Also add a function to the
Argument class for testing if an argument is NULL.

--HG--
rename : src/arch/alpha/arguments.cc => src/sim/arguments.cc
rename : src/arch/alpha/arguments.hh => src/sim/arguments.hh
extra : convert_revision : 8b93667bafaa03b52aadb64d669adfe835266b8e
 2007-08-01 16:59:14 -04:00
Gabe Black
239d124e83 MIPS: Cleaned up includes to break loops, and got rid of isa_traits.cc 
Loops of header files including each other was causing compilation to fail. To fix it, a bunch of unnecessary includes were removed, and the code in isa_traits.cc which brought a bunch of include chains together was broken up and put in proximity to the header files that delcared it.

--HG--
extra : convert_revision : 66ef7762024b72bb91147a5589a0779e279521e0
 2007-08-01 13:55:47 -07:00
Gabe Black
4bdabe1254 Add a flag to indicate an instruction triggers a syscall in SE mode. 
--HG--
extra : convert_revision : 1d0b3afdd8254f5b2fb4bbff1fa4a0536f78bb06
 2007-07-31 17:34:08 -07:00
Nathan Binkert
f0fef8f850 Merge python and x86 changes with cache branch 
--HG--
extra : convert_revision : e06a950964286604274fba81dcca362d75847233
 2007-07-26 23:15:49 -07:00
Gabe Black
d1e533a1e2 X86: Fix argument register indexing. 
Code was assuming that all argument registers followed in order from ArgumentReg0. There is now an ArgumentReg array which is indexed to find the right index. There is a constant, NumArgumentRegs, which can be used to protect against using an invalid ArgumentReg.

--HG--
extra : convert_revision : f448a3ca4d6adc3fc3323562870f70eec05a8a1f
 2007-07-26 22:13:14 -07:00
Steve Reinhardt
d5c74657c9 Merge more changes in from head. 
--HG--
extra : convert_revision : 8f170f2754eccdb424a35b5b077225abcf6eee72
 2007-07-22 08:10:59 -07:00
Gabe Black
6fbcb225af Make name, isMachineCheckFault, and isAlignmentFault const. 
--HG--
extra : convert_revision : a27e0cbdfcb2a5fdc5979686f887cec7d106542b
 2007-07-18 16:09:00 -07:00
Steve Reinhardt
ee54ad318a Event descriptions should not end in "event" 
(they function as adjectives not nouns)

--HG--
extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
 2007-06-30 17:45:58 -07:00
Korey Sewell
738ecc495b fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions... 
src/arch/mips/isa/decoder.isa:
    commment out deret instruction for now...
src/arch/mips/isa/formats/fp.isa:
    edit fp format
src/arch/mips/isa/formats/mem.isa:
    fix for basic store instructions

--HG--
extra : convert_revision : 30cb5a474e78ac9292b6ab37d433db947a177731
 2007-06-29 15:13:50 -04:00
Korey Sewell
e28cbc98a0 o3cpu build for mips 
--HG--
extra : convert_revision : 2c0be7a8c0a54ba5b1b2b69468f788d20abc8452
 2007-06-28 05:30:46 -04:00
Korey Sewell
753adb38d5 mips import pt. 1 
src/arch/mips/SConscript:
    "mips import pt.1".

--HG--
extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1
 2007-06-22 19:03:42 -04:00
Gabe Black
ea70e6d6da Make branches work by repopulating the predecoder every time through. This is probably fine as far as the predecoder goes, but the simple cpu might want to not refetch something it already has. That reintroduces the self modifying code problem though. 
--HG--
extra : convert_revision : 802197e65f8dc1ad657c6b346091e03cb563b0c0
 2007-06-19 18:17:34 +00:00
Gabe Black
cd8f604cc9 Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. 
src/arch/x86/predecoder.cc:
    Seperate the pc-pc and the pc of the incoming bytes, and get rid of the "moreBytes" which just takes a MachInst. Also make the "opSize" field describe the number of bytes and not the log of the number of bytes.

--HG--
extra : convert_revision : 3a5ec7053ec69c5cba738a475d8b7fd9e6e6ccc0
 2007-06-13 20:09:03 +00:00
Gabe Black
32368a2bd6 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

src/arch/mips/utility.hh:
src/arch/x86/SConscript:
    Hand merge

--HG--
extra : convert_revision : 0ba457aab52bf6ffc9191fd1fe1006ca7704b5b0
 2007-03-15 02:52:51 +00:00
Gabe Black
a2b56088fb Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86. 
src/arch/SConscript:
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/cpu/base.hh:
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/static_inst.hh:
src/arch/alpha/predecoder.hh:
src/arch/mips/predecoder.hh:
src/arch/sparc/predecoder.hh:
    Make the predecoder an object with it's own switched header file.

--HG--
extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
 2007-03-15 02:47:42 +00:00
Gabe Black
ce18d900a1 Replaced makeExtMI with predecode. 
Removed the getOpcode function from StaticInst which only made sense for Alpha.
Started implementing the x86 predecoder.

--HG--
extra : convert_revision : a13ea257c8943ef25e9bc573024a99abacf4a70d
 2007-03-13 16:13:21 +00:00