dev/ns_gige.cc:
transmit side checksum offloading doesn't need pseudo header generation, it just takes the pseudo header checksum and uses it.
--HG--
extra : convert_revision : 9741bd650415c18ed37b06a453b23610d028135b
Both rx/tx interrupts are now scheduled for the future to give the
linux kernel time to get out of its loop.
--HG--
extra : convert_revision : 8fee0a25fde0ce0545c924f8547bed460602e006
base/loader/elf_object.cc:
EM_ALPHA value isn't official, so perhaps we shouldn't use it
dev/alpha_console.cc:
dev/alpha_console.hh:
this change allows the use of old console code
--HG--
extra : convert_revision : cfacd64ae7fd2595158ca1a83ebcdb66ee7e119b
base/traceflags.py:
removed TsunamiUart/TlaserUart and added a plain Uart
dev/alpha_console.cc:
updated for new simconsole
dev/platform.hh:
added a uart member to platform
dev/simconsole.cc:
dev/simconsole.hh:
removed lots of legacy code, it should all be ours now.
converted tabs to 8 spaces
added our copyright
dev/tsunami.cc:
uses simconsole.hh rather than console.hh
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
never needed console.hh
dev/tsunami_io.hh:
this does need eventq.hh and it just happend to be working whenn console.hh was
included everywhere
dev/tsunamireg.h:
added a couple more 8250/16550 uart defines
dev/uart.cc:
new uart code, rewritten to support both tlaser and tsunami (both a 8250 and 8530
uart).
dev/uart.hh:
updated for new uart, legacy code removed
--HG--
rename : dev/console.cc => dev/simconsole.cc
rename : dev/console.hh => dev/simconsole.hh
rename : dev/tsunami_uart.cc => dev/uart.cc
rename : dev/tsunami_uart.hh => dev/uart.hh
extra : convert_revision : e663352d49d4c2d3c95643030cf73c0e85ba2f08
base/intmath.hh:
only need FloorLog2(size_t) on a mac, so ifdefed for this
dev/alpha_console.cc:
Actually allocate the alphaAccess struct.
--HG--
extra : convert_revision : 1f50b1a025c8ee728a9f3d2c603ea38347234f54
dev/alpha_console.cc:
rather than acessing a byte array for alpha access, access the members
**this requires an updated console**
dev/pcidev.cc:
correctly type all the pci data and store in in little endian no
matter what system we are on
dev/tsunami_uart.cc:
correct a bug with the data type.
kern/linux/linux_system.cc:
system type in hwprb needs to be endian happy as well.
--HG--
extra : convert_revision : 8de9bb69365b5d30fceaf4fa342a1639f92d7a83
base/traceflags.py:
added some more traceflags for ethernet to break it up better
dev/etherpkt.hh:
since we are not network host order, must reverse bytes for these typechecks.
also, overload isTcp/UdpPkt to take an argument so you don't have to reget the ip header if you've already got one.
dev/ns_gige.cc:
1) add some functions that reverse Endianness so we can generate adn evaluate checksum adn dprintf data accurately/more understandably
2) forget about the implementation of fifo fill/drain thresholds, it's not used by the driver much, nor does it matter with use sending/receiving in whole packets anyway.
get rid of teh associated variables.
3) get rid of txFifoCnt the variable, it's redundant and unnecessary, just use txFifoAvail.
4) change io_enable to ioEnable, just to be picky.
5) modify some DPRINTF's to be clearer, also added a lot, and spread them into better traceflag categories
6) fix the device bug! it's the intrTick = 0 at teh beginning of cpuInterrupt().
7) clear some bools in regsReset() so they don't holdover wrong state
8) fix pseudo header generation for Tcp checksumming to account for network order
dev/ns_gige.hh:
change io_enable to ioEnable, get rid of fill/drain thresh related variables and txFifoCnt, which is redundant
--HG--
extra : convert_revision : c538b75731f3c9e04354f57e6df9a40aeca5096d
base/inifile.cc:
Added mac os support and fixed a bug, on error we need to exit the
child process not return
base/intmath.hh:
gcc on macos wanted a seperate function for the size_t type
base/loader/elf_object.cc:
I'm not sure why this works under linux because it seems to return
the wrong value.
base/stats/text.cc:
added define/include for mac os x
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.cc:
added endian conversion code
dev/alpha_console.cc:
rather than accessing a charecter array of varying size depending on
the access, lets actually do this properly.
dev/alpha_console.hh:
get rid of now nolonger used consoleData
dev/disk_image.cc:
We have to byte swap the data is some cases, added function to do that
dev/ethertap.cc:
added preproc directive for mac os
--HG--
extra : convert_revision : 2b5685765cfa2844926d7397f363d2788e3d640a
tests
dev/ide_ctrl.cc:
Formatting
dev/ide_disk.cc:
Remove some junk, add an assert to serialize, and add missing serialize
for command register.
--HG--
extra : convert_revision : 8f99857e32f278dd4e6f23deffc8047c6411d5b2
dev/ide_ctrl.cc:
generalize these #defs
dev/ide_ctrl.hh:
put these in pcireg.h
dev/ns_gige.cc:
do i need io_enable? and assert will fail if i actually need to implement it, which may give clue as to wehtehr i need to implmeent the mem_enable and bm_enable stuff.
dev/ns_gige.hh:
implement this in case it's needed
dev/pcireg.h:
put these defs in pcireg instead
--HG--
extra : convert_revision : 5e3581b5da17410f943907139bd479f15d2231e8
dev/ns_gige.cc:
fix serialization and move regsReset into the cc file
dev/ns_gige.hh:
put regsReset into cc instead of here in hh
--HG--
extra : convert_revision : 3a8796fa583e0765503104a9dbe28cc69f1a8fa9
busbridges. Also small fix for gcc 3.3.3.
dev/etherpkt.hh:
Gcc 3.3.3 wants assert.h to be include in this file.
dev/ide_ctrl.cc:
after unserialization we need to tell the busbridges what addresses to
respond to.
--HG--
extra : convert_revision : a421197a5be07761bdef571d0a9406d77788e270
3) add some new functions to etherpkt. 4) checkin the nice ping_linux.ini that i've been using.
dev/etherpkt.hh:
remove the packet headers nate hated so much.
also add some new functionality regarding packets, like isIpHdr(), etc.
dev/ns_gige.cc:
improve the code given the nice new functions offered in etherpkt
--HG--
extra : convert_revision : 2e27f5a8dca5323c0fa22d3c51af44a35f6be1a2
and started cleaning up config files.
arch/alpha/isa_desc:
Made implementation of cttz and ctlz more compact
base/remote_gdb.cc:
Added comment about PALcode debugger accesses
dev/baddev.cc:
dev/baddev.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
Cleaned up includes and changed device from FunctionalMemory to
PioDevice for detailed boot
dev/ns_gige.cc:
The ethernet dev uses two BARs, and the first bars size was being set
incorrectly.
dev/tsunamireg.h:
I don't know why we were using the superpage as the PCI memory addr.
Changed and works correctly with detailed boot.
--HG--
extra : convert_revision : b535e76612cb90b544305dc1aa8c5e0e774564bd
dev/tsunami_io.cc:
Timers don't need to be rescheduled cause they aren't scheduled by
the default constructor
--HG--
extra : convert_revision : afb68e4f0c4e2a2c98f0037e061752690080a503
dev/ide_ctrl.cc:
Properly serialize/unserialize the PciDev base class to get it to remap
the MMU
dev/ns_gige.cc:
dev/ns_gige.hh:
Remove the "addr" paramter from the constructor and change the device
to use PCI based MMU mappings only
dev/pciconfigall.cc:
Change comments
dev/pcidev.cc:
Properly setup the MMU after a serialize
--HG--
extra : convert_revision : 4b2e7ba58e3c24fac1ff6f80635e704d6ecc0eff
Linux 2.6 with DMA support
dev/ide_disk.cc:
Add debug infomation for DMA transfers and fix handling of PRD pointer
values
dev/ide_disk.hh:
Reduce buffer (MAX_DMA) size to 64K
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
Add handling of PCTL register and also fix the translate from PCI to DMA
addresses which was incorrect
--HG--
extra : convert_revision : 562f55fa1c7099ad0f5a23f59dec2c8ec7601d43
virtual function in alphaaccess.cc
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_io.hh:
Removed dynamic cast to get interrupt frequency and replaced with a
virtual function
--HG--
extra : convert_revision : 01f514a33d8f76c6527ab25a713d5c86f9fd646e
PIO writes. This was mainly related to not shadowing the status register
properly, and also not setting some of the status bits expected by the
operating system for the PIO write protocol.
--HG--
extra : convert_revision : fcdfd588be6e4f237aa6057889f0b3bdf4ea7631
dev/tsunami_cchip.hh:
clean up some comments
kern/linux/linux_syscalls.cc:
Cleaned up spacing of syscall numbers
kern/linux/linux_system.hh:
Added doxygen comments
--HG--
extra : convert_revision : 23ecdaa92a208458dd5c5d3c68ac9012ce2690da
dev/baddev.hh:
dev/pcidev.hh:
dev/tsunami.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
Added doxygen comments
dev/pciconfigall.hh:
Added doxygen comments. Made the hlist of devices private and provided
members to modify the data.
dev/pcidev.cc:
updated for change in pciconfigall
dev/tsunami_pchip.cc:
Deleted commented out code we don't need
kern/linux/linux_syscalls.cc:
Simplified the number -> name conversion.
kern/linux/linux_syscalls.hh:
Removed StandardNumber and replaced with Number.
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
LinuxSkipIdeDelay50msEvent was simply the same as the SkipFunc event,
so I removed it. Same with with LinuxSkipFuncEvent.
--HG--
extra : convert_revision : 1508c335f87d90373f5772f3a0407ea13e858d7e
Removed bootloader and just wrote command line into linux kernel
base/inifile.cc:
the forked process should not return, it should exit.
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
The serial port in reality has some delay and linux expects it. This
schedules an interrupt 300 cycles after the transmit instead of
immediately
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
removed boot loader and stuck boot command line in the kernel manually
--HG--
extra : convert_revision : 68aa54f8ca4e8391789f7a4c1ae227e6f8b94e13
dev/ns_gige.cc:
remove some useless DPRINTF's and add some useful ones. fix the missing RXDESC interrupt.
--HG--
extra : convert_revision : 17142480db1eaafa24f88640f8c7b8e7e077de1a
dev/ide_disk.cc:
Fix to PIO writes and also add command needed for shutdown
dev/pcidev.cc:
Change the panic on write to read-only registers to a debug print. The
kernel tries to write back over all of the PCI registers to restore
the saved SRM state, so we need to let it do this without panicing.
sim/system.cc:
Add back increment of number of running systems to allow trap of halt
work correctly.
--HG--
extra : convert_revision : 84aba4effbec14545f3610c19a8e321d7e7f7cf2
doesn't conflict with the old ethernet driver name.
Added config file to try to boot Tru64 with Tsunami
Cleaned up kern/linux a bit more and fixed bug where we were using
Tru64 system calls
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/tsunami.hh:
Changed name of lisa's device to NSgigE instead of Etherdev so it
doesn't conflict with the old ethernet driver name.
kern/linux/linux_syscalls.hh:
the Syscalls still used the Tru64 calls, oops.. fixed.
--HG--
extra : convert_revision : dedd20686cc367ed37f31920f753566afbc69045
if Tru64 is to continue to be supported on Turbolaser) and fixed
translation of physical addresses by clearing PA<42:35> when the real
uncachable bit (43) is set
arch/alpha/ev5.hh:
Change to support 256 ASNs and seperate VA_SPACE checks for EV5 and EV6
also add support proper translation of uncacheable physical addresses
dev/ide_ctrl.cc:
Fix to work with real address translation
--HG--
extra : convert_revision : aa3d1c284b8271d4763a8da2509c91bbcf83189a
dev/ns_gige.cc:
clear the device interrupts
dev/ns_gige_reg.h:
Add a new mask
--HG--
extra : convert_revision : ce3617315677cbee577ed8893821a8abc5a1a10d
dev/console.cc:
commented out code that checks if an interrupt is happening before issuing one
because they can get lost when linux boots
dev/console.hh:
added a setPlatform function to set the platform to interrupt
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
Added virtual functions to post console interrupts
dev/tsunami_io.cc:
allowed a 64bit read of the PIC since we can't do a physical byte read
dev/tsunami_uart.cc:
moved TsunamiUart to PioDevice
various little fixes to make linux work
dev/tsunami_uart.hh:
Made Tsunami_Uart a PIO device
dev/tsunamireg.h:
added some UART defines and used the ULL macros
kern/linux/linux_system.cc:
commented out waiting for gdb
--HG--
extra : convert_revision : 8cfd0700f3812ab349a6d7f132f85f4f421c5c5e
dev/ide_ctrl.cc:
Added serialize/unserialize functions and move some inlined functions
to regular functions
dev/ide_ctrl.hh:
Change inlined functions to regular functions
dev/ide_disk.cc:
Changes to dmaWrite and also add serialize/unserialize functions
dev/ide_disk.hh:
Support for serializing/unserializing
--HG--
extra : convert_revision : 40e016dc7f6637b033fe33409338437c985a05f4
mappings (writes still unverified, and read could probably be looked over
a bit more too)
dev/ide_disk.cc:
dev/ide_disk.hh:
Major changes to fix bogus handling of dma transfers. The read seems to
work pretty well, but the write is unverfied until we can get a disk
image that actually tries to write.
dev/tsunami_pchip.cc:
Change mask to properly mask 13 bits not 12
--HG--
extra : convert_revision : 08fe9bc32970e449cd045de479553a96a4e389d6
Added function to skip determine_cpu_caches(). We may have to update this in the
future: see note below.
arch/alpha/alpha_memory.cc:
dev/ide_ctrl.cc:
dev/tsunamireg.h:
Added ULL for 64bit ints
kern/linux/linux_system.cc:
Added a function to skip determine_cpu_caches, right now it is only used for
printing in proc, however in the future we may either want to implement the SC_CTL
IPR register or manually set alpha_l1i_cacheshape, alpha_l1d_cacheshape,
alpha_l2_cacheshape, alpha_l3_cacheshape to ((size << 10) | (linesize>>1)<<4 | way)
kern/linux/linux_system.hh:
added event to skip determine_cpu_caches()
--HG--
extra : convert_revision : 1065f2091bbe6832b730af490f5b4672c2afedce
arch/alpha/vtophys.cc:
Removed buggy code that tries to fix PAL addresses (may cause problems
while trying to debug in PAL code, but that should do this fix outside
of vtophys)
base/loader/symtab.cc:
base/loader/symtab.hh:
cpu/exetrace.cc:
Changed InstExec traces to always print a symbol name
dev/ide_ctrl.cc:
dev/ide_disk.cc:
Tabs
dev/ide_disk.hh:
Change buffer size
dev/tsunami_pchip.cc:
Fix translatePciToDma to support scatter gather mapping
kern/linux/linux_system.cc:
Force simulator to wait until remote debugger attaches (should be removed
or turned on/off with a flag)
--HG--
extra : convert_revision : 1d08aebe3f448c87a963dd613de3e2e0cff0d48d
Turbolaser)
base/range.hh:
Change semantics of range to be inclusive of the end value, may need to
check other users of range to make sure they are semantically correct.
This was needed for access of last byte in range of address on IDE and
makes sense for case of range from 0 to all f
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
Whole mess of changes.. at current state simulator will boot and read
partition table and then have a bunch of errors and panic
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/platform.hh:
Changes to work with platform separation
dev/tsunami.cc:
dev/tsunami.hh:
Change to work with platform separation
--HG--
extra : convert_revision : e1de22b54df7fdcf391efc2a8555ada93f46beab
base/range.hh:
andrew thought this might be a bug.
dev/etherpkt.cc:
don't need std:: since there is a using directive
dev/ns_gige.cc:
update to new PIO and PCI system
dev/ns_gige.hh:
update to deal with new PIO and PCI setup
dev/ns_gige_reg.h:
Add some new #defines that I ended up needing
dev/pcidev.cc:
some changes to the debugging printfs of pci device
--HG--
extra : convert_revision : 955ba8e8e1c418cfe1c6549dc3451ea091541556
configuration unnecessarily awkward. Biggest changes are:
- External and internal object names now match in all cases. The
macros still allow them to be different; the only reason I didn't
get rid of that is that the macros themselves should be going away
soon. In the few conflicting cases, I sometimes renamed the C++ object
and sometimes renamed the config object. The latter sets of substitions
are:
s/BaseBus/Bus/;
s/MemoryObject/FunctionalMemory/;
s/MemoryControl/MemoryController/;
s/FUPool/FuncUnitPool/;
- SamplingCPU is temporarily broken... we need to change the model
of how this works in the .ini file. Having it as a CPU proxy is
really awkward.
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
cpu/simple_cpu/simple_cpu.cc:
sim/process.cc:
Rename objects to match config name.
cpu/base_cpu.cc:
Uncomment SimObject define since SamplingCPU no longer
does this for us.
dev/ethertap.cc:
Use unsigned instead of uint16_t for params.
kern/tru64/tru64_system.cc:
Use unsigned instead of uint64_t for init_param param.
test/paramtest.cc:
Fix old SimObjectParam.
--HG--
extra : convert_revision : 378ebbc6a71ad0694501d09979a44d111a59e8dc
assumes that all PCI devices are DmaDevices, and if not, they can just
ignore the DMA stuff)
--HG--
extra : convert_revision : aa58b658370696674ca4c32b265bc0400e5dda5a
dev/pcidev.cc:
member variables should begin with lowercase so they don't get confused with types.
dev/pcidev.hh:
member variables must begin with lowercase so they don't get confused with types.
--HG--
extra : convert_revision : f083baa60d0fbf64d858d684ff70ee06e7b7765d
sim object(depends on which platform tsunami/tlaser is being used)
dev/alpha_console.cc:
Use dynamice casting once during build to get at the proper device to calculate the frequency.
It is either a tsunami_IO or a tlaser_clock depending on platform (tsunami/tlaser).
If the simobject is not of either of those types then panic
dev/alpha_console.hh:
Pass in a SimObject * that is to either a tlaser_clock or a tsunami_IO
sim/sim_object.cc:
Make it so that you can have a SimObjectParam of type SimObject:
example:
SimObjectParam<SimObject *> so;
--HG--
extra : convert_revision : 08239ef23762b8ea11311630b73fe885d939402e
dev/alpha_console.cc:
missed this >>>> after i merged
kern/linux/linux_system.cc:
get rid of FS_MEASURES and change FnEvent to LinuxFnEvent
kern/linux/linux_system.hh:
get rid of FS_MEASURE
--HG--
extra : convert_revision : 210f46573bba0c772a224ce110af9a9230fabf6a
delay is more or less folded into the packet time, but an additional
delay is possible representing crossing a long haul link, or some
switches, etc.
--HG--
extra : convert_revision : 8fd689c2a7e3051e77f47a4cd5f51c6999d92c8f
and a physical memory address for DMA
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
Changed registers to array and added mapping function to translate between
PCI bus space and physical address space
--HG--
extra : convert_revision : e9dc4de4e7effe8e8e2365298843d6f767b5a289
of faking it. Renamed stuff to follow our style. Lots of
general cleanup.
dev/etherpkt.hh:
fix up includes
--HG--
extra : convert_revision : fb3a21466cdae00f8747d6e3027c9f2c63569c48
are present
dev/tsunami_cchip.cc:
Only need to interrupt processors that are there
Move RTC interrupt code into a function
dev/tsunami_cchip.hh:
Make a RTC interrupt function, move variables out of public scope
dev/tsunami_io.cc:
Make a call to the RTC interrupt routine instead
--HG--
extra : convert_revision : 88113664d0e54a7dddc00ec11ff9b9d088232b31
make it so that pio devices must respond with some delay.
dev/io_device.cc:
don't forget to include dma_interface.hh so we could use it.
dev/io_device.hh:
the generic BusInterface isn't enough for doing DMA
we need the actual DMAInterface
--HG--
extra : convert_revision : 70298d33c8520a3f4ad11aa600825a8cec7e44bf
dev/etherdump.cc:
now that init is automatically called by the framework, don't
init twice.
--HG--
extra : convert_revision : 16dcdef67aa193ed71ff546e7b255d60f39bf13d
dev/tsunami_cchip.cc:
Add support for IPI, making changes to read/write to MISC register
Particularly the IPREQ, IPINTR, and ITINTR subfields
dev/tsunami_cchip.hh:
Make an array to keep track of the number of outstanding IPI's,
Extend RTC to interrupt all processors, not just cpu0
dev/tsunami_io.cc:
Extend RTC to interrupt all present proccessors, not just cpu0
--HG--
extra : convert_revision : 0715cbf0abb06002c0fb0b05ef369304cdf75001
dev/tsunami_cchip.cc:
fixed another problem with the interrupt code, should all work now
--HG--
extra : convert_revision : 1d9fe6081b6391e3e09f1c4a9380a30240fac6dc
interrupt to use a different subnumber since both devices could
interrupt at the same time and we don't want to loose one.
dev/tsunami_cchip.cc:
rewrote interrupt code to handle interrupt mask clearing correctly
dev/tsunami_cchip.hh:
changed (post/clear)DRIR to use a interrupt number rather than a vecotr
dev/tsunami_io.cc:
updated for new post/clearDRIR calls
--HG--
extra : convert_revision : 5b39f5e15a66d5eb6e689e6ece62f99b5fa735ab
arch/alpha/vtophys.cc:
base/remote_gdb.cc:
Fix to remote debugger while in PAL code
dev/pcidev.cc:
Remove extra debug printf
--HG--
extra : convert_revision : e64988846ad05cd3ddf47034d72d99dae3501591
In the future, this can be used for actual data, but for now, it's
so that devices can respond to timing accesses properly. This way,
an uncached access on a bus further away will take longer to respond.
dev/alpha_console.cc:
dev/alpha_console.hh:
suport the separate IO bus
--HG--
extra : convert_revision : ececb70f5febfd00231f6e406f93b2a79be01261
Changed base_linux.ini file to use physical addresses
dev/alpha_console.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Fix masking of read/write address to get read/write offset
dev/tsunami_uart.cc:
Fix masking of read/write address to get read/write offset
Also added add_child call that was missed
dev/tsunami_uart.hh:
Changed size to 0x8
--HG--
extra : convert_revision : 1468ca43167bfb28b28c4510401a1ebad683e102
some sundry problems with new interface
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
Fixed to use new FunctionalMemory interface
--HG--
extra : convert_revision : bee98e6285d92f28fafacf919ab06eaf333a9b56
