fix serialization
dev/ns_gige.cc:
fix serialization and move regsReset into the cc file
dev/ns_gige.hh:
put regsReset into cc instead of here in hh
--HG--
extra : convert_revision : 3a8796fa583e0765503104a9dbe28cc69f1a8fa9
This commit is contained in:
Lisa Hsu
parent
30ece6cf78
commit
e5dba1642b
2 changed files with 129 additions and 84 deletions
194
dev/ns_gige.cc
194
dev/ns_gige.cc
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@ -99,7 +99,7 @@ NSGigE::NSGigE(const std::string &name, IntrControl *i, Tick intr_delay,
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PciConfigData *cd, Tsunami *t, uint32_t bus, uint32_t dev,
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uint32_t func, bool rx_filter, const int eaddr[6])
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: PciDev(name, mmu, cf, cd, bus, dev, func), tsunami(t),
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txPacketBufPtr(NULL), rxPacketBufPtr(NULL),
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txPacket(0), rxPacket(0), txPacketBufPtr(NULL), rxPacketBufPtr(NULL),
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txXferLen(0), rxXferLen(0), txPktXmitted(0), txState(txIdle), CTDD(false),
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txFifoCnt(0), txFifoAvail(MAX_TX_FIFO_SIZE), txHalt(false),
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txFragPtr(0), txDescCnt(0), txDmaState(dmaIdle), rxState(rxIdle),
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@ -1050,6 +1050,20 @@ NSGigE::rxReset()
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rxState = rxIdle;
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}
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void NSGigE::regsReset()
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{
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memset(®s, 0, sizeof(regs));
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regs.config = 0x80000000;
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regs.mear = 0x12;
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regs.isr = 0x00608000;
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regs.txcfg = 0x120;
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regs.rxcfg = 0x4;
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regs.srr = 0x0103;
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regs.mibc = 0x2;
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regs.vdr = 0x81;
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regs.tesr = 0xc000;
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}
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void
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NSGigE::rxDmaReadCopy()
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{
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@ -2071,22 +2085,52 @@ NSGigE::serialize(ostream &os)
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SERIALIZE_ARRAY(rom.perfectMatch, EADDR_LEN);
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/*
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* Serialize the data Fifos
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*/
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int txNumPkts = txFifo.size();
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SERIALIZE_SCALAR(txNumPkts);
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int i = 0;
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pktiter_t end = txFifo.end();
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for (pktiter_t p = txFifo.begin(); p != end; ++p) {
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nameOut(os, csprintf("%s.txFifo%d", name(), i++));
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(*p)->serialize(os);
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}
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int rxNumPkts = rxFifo.size();
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SERIALIZE_SCALAR(rxNumPkts);
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i = 0;
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end = rxFifo.end();
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for (pktiter_t p = rxFifo.begin(); p != end; ++p) {
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nameOut(os, csprintf("%s.rxFifo%d", name(), i++));
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(*p)->serialize(os);
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}
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/*
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* Serialize the various helper variables
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*/
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uint32_t txPktBufPtr = (uint32_t) txPacketBufPtr;
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SERIALIZE_SCALAR(txPktBufPtr);
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uint32_t rxPktBufPtr = (uint32_t) rxPktBufPtr;
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SERIALIZE_SCALAR(rxPktBufPtr);
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bool txPacketExists = txPacket;
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SERIALIZE_SCALAR(txPacketExists);
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if (txPacketExists) {
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nameOut(os, csprintf("%s.txPacket", name()));
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txPacket->serialize(os);
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uint32_t txPktBufPtr = (uint32_t) (txPacketBufPtr - txPacket->data);
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SERIALIZE_SCALAR(txPktBufPtr);
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}
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bool rxPacketExists = rxPacket;
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SERIALIZE_SCALAR(rxPacketExists);
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if (rxPacketExists) {
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nameOut(os, csprintf("%s.rxPacket", name()));
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rxPacket->serialize(os);
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uint32_t rxPktBufPtr = (uint32_t) (rxPacketBufPtr - rxPacket->data);
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SERIALIZE_SCALAR(rxPktBufPtr);
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}
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SERIALIZE_SCALAR(txXferLen);
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SERIALIZE_SCALAR(rxXferLen);
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SERIALIZE_SCALAR(txPktXmitted);
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bool txPacketExists = txPacket;
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SERIALIZE_SCALAR(txPacketExists);
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bool rxPacketExists = rxPacket;
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SERIALIZE_SCALAR(rxPacketExists);
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/*
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* Serialize DescCaches
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*/
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@ -2102,8 +2146,6 @@ NSGigE::serialize(ostream &os)
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/*
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* Serialize tx state machine
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*/
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int txNumPkts = txFifo.size();
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SERIALIZE_SCALAR(txNumPkts);
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int txState = this->txState;
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SERIALIZE_SCALAR(txState);
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SERIALIZE_SCALAR(CTDD);
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@ -2118,8 +2160,6 @@ NSGigE::serialize(ostream &os)
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/*
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* Serialize rx state machine
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*/
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int rxNumPkts = rxFifo.size();
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SERIALIZE_SCALAR(rxNumPkts);
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int rxState = this->rxState;
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SERIALIZE_SCALAR(rxState);
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SERIALIZE_SCALAR(CRDD);
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@ -2132,13 +2172,23 @@ NSGigE::serialize(ostream &os)
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SERIALIZE_SCALAR(extstsEnable);
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/*
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/*
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* If there's a pending transmit, store the time so we can
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* reschedule it later
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*/
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Tick transmitTick = txEvent.scheduled() ? txEvent.when() - curTick : 0;
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SERIALIZE_SCALAR(transmitTick);
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/*
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* receive address filter settings
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*/
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SERIALIZE_SCALAR(rxFilterEnable);
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SERIALIZE_SCALAR(acceptBroadcast);
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SERIALIZE_SCALAR(acceptMulticast);
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SERIALIZE_SCALAR(acceptUnicast);
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SERIALIZE_SCALAR(acceptPerfect);
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SERIALIZE_SCALAR(acceptArp);
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/*
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* Keep track of pending interrupt status.
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*/
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@ -2149,24 +2199,6 @@ NSGigE::serialize(ostream &os)
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intrEventTick = intrEvent->when();
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SERIALIZE_SCALAR(intrEventTick);
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int i = 0;
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for (pktiter_t p = rxFifo.begin(); p != rxFifo.end(); ++p) {
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nameOut(os, csprintf("%s.rxFifo%d", name(), i++));
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(*p)->serialize(os);
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}
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if (rxPacketExists) {
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nameOut(os, csprintf("%s.rxPacket", name()));
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rxPacket->serialize(os);
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}
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i = 0;
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for (pktiter_t p = txFifo.begin(); p != txFifo.end(); ++p) {
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nameOut(os, csprintf("%s.txFifo%d", name(), i++));
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(*p)->serialize(os);
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}
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if (txPacketExists) {
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nameOut(os, csprintf("%s.txPacket", name()));
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txPacket->serialize(os);
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}
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}
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void
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@ -2210,24 +2242,56 @@ NSGigE::unserialize(Checkpoint *cp, const std::string §ion)
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UNSERIALIZE_ARRAY(rom.perfectMatch, EADDR_LEN);
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/*
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* unserialize the data fifos
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*/
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int txNumPkts;
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UNSERIALIZE_SCALAR(txNumPkts);
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int i;
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for (i = 0; i < txNumPkts; ++i) {
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PacketPtr p = new EtherPacket;
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p->unserialize(cp, csprintf("%s.rxFifo%d", section, i));
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txFifo.push_back(p);
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}
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int rxNumPkts;
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UNSERIALIZE_SCALAR(rxNumPkts);
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for (i = 0; i < rxNumPkts; ++i) {
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PacketPtr p = new EtherPacket;
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p->unserialize(cp, csprintf("%s.rxFifo%d", section, i));
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rxFifo.push_back(p);
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}
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/*
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* unserialize the various helper variables
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*/
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uint32_t txPktBufPtr;
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UNSERIALIZE_SCALAR(txPktBufPtr);
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txPacketBufPtr = (uint8_t *) txPktBufPtr;
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uint32_t rxPktBufPtr;
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UNSERIALIZE_SCALAR(rxPktBufPtr);
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rxPacketBufPtr = (uint8_t *) rxPktBufPtr;
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bool txPacketExists;
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UNSERIALIZE_SCALAR(txPacketExists);
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if (txPacketExists) {
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txPacket = new EtherPacket;
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txPacket->unserialize(cp, csprintf("%s.txPacket", section));
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uint32_t txPktBufPtr;
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UNSERIALIZE_SCALAR(txPktBufPtr);
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txPacketBufPtr = (uint8_t *) txPacket->data + txPktBufPtr;
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} else
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txPacket = 0;
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bool rxPacketExists;
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UNSERIALIZE_SCALAR(rxPacketExists);
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rxPacket = 0;
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if (rxPacketExists) {
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rxPacket = new EtherPacket;
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rxPacket->unserialize(cp, csprintf("%s.rxPacket", section));
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uint32_t rxPktBufPtr;
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UNSERIALIZE_SCALAR(rxPktBufPtr);
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rxPacketBufPtr = (uint8_t *) rxPacket->data + rxPktBufPtr;
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} else
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rxPacket = 0;
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UNSERIALIZE_SCALAR(txXferLen);
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UNSERIALIZE_SCALAR(rxXferLen);
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UNSERIALIZE_SCALAR(txPktXmitted);
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bool txPacketExists;
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UNSERIALIZE_SCALAR(txPacketExists);
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bool rxPacketExists;
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UNSERIALIZE_SCALAR(rxPacketExists);
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/*
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* Unserialize DescCaches
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*/
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@ -2243,8 +2307,6 @@ NSGigE::unserialize(Checkpoint *cp, const std::string §ion)
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/*
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* unserialize tx state machine
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*/
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int txNumPkts;
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UNSERIALIZE_SCALAR(txNumPkts);
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int txState;
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UNSERIALIZE_SCALAR(txState);
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this->txState = (TxState) txState;
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@ -2261,8 +2323,6 @@ NSGigE::unserialize(Checkpoint *cp, const std::string §ion)
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/*
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* unserialize rx state machine
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*/
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int rxNumPkts;
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UNSERIALIZE_SCALAR(rxNumPkts);
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int rxState;
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UNSERIALIZE_SCALAR(rxState);
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this->rxState = (RxState) rxState;
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@ -2278,14 +2338,23 @@ NSGigE::unserialize(Checkpoint *cp, const std::string §ion)
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UNSERIALIZE_SCALAR(extstsEnable);
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/*
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* If there's a pending transmit, store the time so we can
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* reschedule it later
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* If there's a pending transmit, reschedule it now
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*/
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Tick transmitTick;
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UNSERIALIZE_SCALAR(transmitTick);
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if (transmitTick)
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txEvent.schedule(curTick + transmitTick);
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/*
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* unserialize receive address filter settings
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*/
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UNSERIALIZE_SCALAR(rxFilterEnable);
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UNSERIALIZE_SCALAR(acceptBroadcast);
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UNSERIALIZE_SCALAR(acceptMulticast);
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UNSERIALIZE_SCALAR(acceptUnicast);
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UNSERIALIZE_SCALAR(acceptPerfect);
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UNSERIALIZE_SCALAR(acceptArp);
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/*
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* Keep track of pending interrupt status.
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*/
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@ -2298,28 +2367,15 @@ NSGigE::unserialize(Checkpoint *cp, const std::string §ion)
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intrEvent->schedule(intrEventTick);
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}
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for (int i = 0; i < rxNumPkts; ++i) {
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PacketPtr p = new EtherPacket;
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p->unserialize(cp, csprintf("%s.rxFifo%d", section, i));
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rxFifo.push_back(p);
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}
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rxPacket = NULL;
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if (rxPacketExists) {
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rxPacket = new EtherPacket;
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rxPacket->unserialize(cp, csprintf("%s.rxPacket", section));
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}
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for (int i = 0; i < txNumPkts; ++i) {
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PacketPtr p = new EtherPacket;
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p->unserialize(cp, csprintf("%s.rxFifo%d", section, i));
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txFifo.push_back(p);
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}
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if (txPacketExists) {
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txPacket = new EtherPacket;
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txPacket->unserialize(cp, csprintf("%s.txPacket", section));
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/*
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* re-add addrRanges to bus bridges
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*/
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if (pioInterface) {
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pioInterface->addAddrRange(BARAddrs[0], BARAddrs[0] + BARSize[0] - 1);
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pioInterface->addAddrRange(BARAddrs[1], BARAddrs[1] + BARSize[1] - 1);
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}
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}
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Tick
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NSGigE::cacheAccess(MemReqPtr &req)
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{
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@ -158,12 +158,14 @@ class NSGigE : public PciDev
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dp_regs regs;
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dp_rom rom;
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/*** BASIC STRUCTURES FOR TX/RX ***/
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/*** BASIC STRUCTURES FOR TX/RX ***/
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/* Data FIFOs */
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pktbuf_t txFifo;
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pktbuf_t rxFifo;
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/** various helper vars */
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PacketPtr txPacket;
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PacketPtr rxPacket;
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uint8_t *txPacketBufPtr;
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uint8_t *rxPacketBufPtr;
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uint32_t txXferLen;
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@ -171,8 +173,6 @@ class NSGigE : public PciDev
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uint32_t txPktXmitted;
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bool rxDmaFree;
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bool txDmaFree;
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PacketPtr txPacket;
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PacketPtr rxPacket;
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/** DescCaches */
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ns_desc txDescCache;
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@ -261,18 +261,7 @@ class NSGigE : public PciDev
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void txReset();
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void rxReset();
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void regsReset() {
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memset(®s, 0, sizeof(regs));
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regs.config = 0x80000000;
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regs.mear = 0x12;
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regs.isr = 0x00608000;
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regs.txcfg = 0x120;
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regs.rxcfg = 0x4;
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regs.srr = 0x0103;
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regs.mibc = 0x2;
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regs.vdr = 0x81;
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regs.tesr = 0xc000;
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}
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void regsReset();
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void rxKick();
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Tick rxKickTick;
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