Gabe Black
|
358fdc2a40
|
ARM: Decode to specialized conditional/unconditional versions of instructions.
This is to avoid condition code based dependences from effectively serializing
instructions when the instruction doesn't actually use them.
|
2010-06-02 12:58:17 -05:00 |
|
|
Gabe Black
|
6e39288be0
|
ARM: Implement the bkpt instruction.
|
2010-06-02 12:58:16 -05:00 |
|
|
Gabe Black
|
05bd3eb4ec
|
ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.
|
2010-06-02 12:58:16 -05:00 |
|
|
Gabe Black
|
4491170df6
|
ARM: Make integer division by zero return a fault.
|
2010-06-02 12:58:13 -05:00 |
|
Ali Saidi
|
556ea0ee57
|
ARM: Add some support for wfi/wfe/yield/etc
|
2010-06-02 12:58:13 -05:00 |
|
|
Gabe Black
|
abda50173c
|
ARM: Add fp operands to operands.isa.
|
2010-06-02 12:58:12 -05:00 |
|
|
Gabe Black
|
a5ea52bb45
|
ARM: Allow flattening into any mode.
|
2010-06-02 12:58:11 -05:00 |
|
|
Gabe Black
|
54ab07e636
|
ARM: Implement the strex instructions.
|
2010-06-02 12:58:10 -05:00 |
|
|
Gabe Black
|
3caa75d53a
|
ARM: Squash the low order bits of the PC when performing a regular branch.
|
2010-06-02 12:58:10 -05:00 |
|
|
Gabe Black
|
36eeee0133
|
ARM: When changing the CPSR and branching, make sure the branch is second.
|
2010-06-02 12:58:09 -05:00 |
|
|
Gabe Black
|
9d4a1bf2ba
|
ARM: Explicitly keep track of the second destination for double loads/stores.
|
2010-06-02 12:58:09 -05:00 |
|
|
Gabe Black
|
f9d1bba22a
|
ARM: Add a version of the Dest and Op1 operands for accessing the MiscRegs.
|
2010-06-02 12:58:08 -05:00 |
|
|
Gabe Black
|
c643b1c274
|
ARM: Add a base class to support usada8.
|
2010-06-02 12:58:07 -05:00 |
|
|
Gabe Black
|
57443a2144
|
ARM: Make LDM that loads the PC perform an interworking branch.
|
2010-06-02 12:58:05 -05:00 |
|
|
Gabe Black
|
28227440a7
|
ARM: Align the PC when using it as the base for a load.
|
2010-06-02 12:58:04 -05:00 |
|
|
Gabe Black
|
e92dc21fde
|
ARM: Add support for interworking branch ALU instructions.
|
2010-06-02 12:58:04 -05:00 |
|
|
Gabe Black
|
3a11412c99
|
ARM: Add an fp version of one of the microop indexed registers.
|
2010-06-02 12:58:04 -05:00 |
|
|
Gabe Black
|
a8eb9d521c
|
ARM: Eliminate the unused rhi and rlo operands.
|
2010-06-02 12:58:03 -05:00 |
|
|
Gabe Black
|
33da368e99
|
ARM: Implement all integer multiply instructions.
|
2010-06-02 12:58:03 -05:00 |
|
|
Gabe Black
|
9869343636
|
ARM: Implement branch instructions external to the decoder.
|
2010-06-02 12:58:02 -05:00 |
|
|
Gabe Black
|
769f3406fe
|
ARM: Replace the interworking branch base class with a special operand.
|
2010-06-02 12:58:02 -05:00 |
|
|
Gabe Black
|
b6e7029dd5
|
ARM: Fix PC operand handling.
|
2010-06-02 12:58:02 -05:00 |
|
|
Gabe Black
|
c02f9cdddf
|
ARM: Add new base classes for data processing instructions.
|
2010-06-02 12:58:02 -05:00 |
|
|
Gabe Black
|
81fdced83f
|
ARM: Define the load instructions from outside the decoder.
|
2010-06-02 12:58:01 -05:00 |
|
|
Gabe Black
|
292b8a3c91
|
ARM: Add an operand for accessing the current PC.
|
2010-06-02 12:58:00 -05:00 |
|
|
Gabe Black
|
9ef82c0bc4
|
ARM: Track the current ISA mode using the PC.
|
2010-06-02 12:57:59 -05:00 |
|
|
Gabe Black
|
4b87bc887a
|
ARM: Remove IsControl from operands that don't imply control transfers.
Also remove IsInteger from CondCodes.
|
2010-06-02 12:57:59 -05:00 |
|
|
Gabe Black
|
1df0025e28
|
ARM: More accurately describe the effects of using the control operands.
|
2009-11-14 19:22:29 -08:00 |
|
|
Gabe Black
|
50b9149c75
|
ARM: Hook up the moded versions of the SPSR.
These registers can be accessed directly, or through MISCREG_SPSR which will
act as whichever SPSR is appropriate for the current mode.
|
2009-11-14 19:22:29 -08:00 |
|
|
Gabe Black
|
5524af83ef
|
ARM: Fix some bugs in the ISA desc and fill out some instructions.
|
2009-11-10 23:44:05 -08:00 |
|
|
Gabe Black
|
48525f581c
|
ARM: Split the condition codes out of the CPSR.
This allows those bits to be renamed while allowing the other fields to
control the behavior of the processor.
|
2009-11-08 02:08:40 -08:00 |
|
|
Gabe Black
|
78bd8fe44f
|
ARM: Add back in spots for Rhi and Rlo, and use a named constant for LR.
|
2009-11-08 01:59:20 -08:00 |
|
|
Gabe Black
|
f63c260d89
|
ARM: Get rid of the Raddr operand.
|
2009-11-08 01:57:34 -08:00 |
|
|
Gabe Black
|
4079792f2b
|
ARM: Add in spots for the VFP control registers.
|
2009-07-27 00:53:10 -07:00 |
|
Ali Saidi
|
99831ed938
|
ARM: Handle register indexed system calls.
|
2009-07-27 00:51:01 -07:00 |
|
|
Gabe Black
|
3e2cad8370
|
ARM: Use custom read/write code to alias R15 with the PC.
|
2009-07-08 23:02:20 -07:00 |
|
|
Gabe Black
|
70a75ceb84
|
ARM: Move the integer microops out of the decoder and into the ISA desc.
|
2009-07-08 23:02:19 -07:00 |
|
|
Gabe Black
|
1ca0688c4c
|
ARM: Add operands for the load/store double instructions.
|
2009-07-08 23:02:01 -07:00 |
|
|
Gabe Black
|
7e4f132369
|
ARM: Get rid of a few more unused operands.
|
2009-06-21 09:48:51 -07:00 |
|
|
Gabe Black
|
4415e2dcd6
|
ARM: Get rid of unnecessary Re operand.
|
2009-06-21 09:48:44 -07:00 |
|
|
Gabe Black
|
71e0d1ded2
|
ARM: Pull some static code out of the isa desc and create miscregs.hh.
|
2009-06-21 09:21:07 -07:00 |
|
Stephen Hines
|
7a7c4c5fca
|
arm: add ARM support to M5
|
2009-04-05 18:53:15 -07:00 |
|