Commit graph

324 commits

Author SHA1 Message Date
Nathan Binkert
4826610d86 We're using the static keyword improperly in some cases. 2008-09-19 09:42:54 -07:00
Nathan Binkert
befae3c0b0 Use the proper version of C++ headers 2008-09-19 09:11:43 -07:00
Ali Saidi
3a3e356f4e style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
Nathan Binkert
9cf8ad3a17 params: Get rid of the remnants of the old style parameter configuration stuff. 2008-08-11 12:22:17 -07:00
Nathan Binkert
ee62a0fec8 params: Convert the CPU objects to use the auto generated param structs.
A whole bunch of stuff has been converted to use the new params stuff, but
the CPU wasn't one of them.  While we're at it, make some things a bit
more stylish. Most of the work was done by Gabe, I just cleaned stuff up
a bit more at the end.
2008-08-11 12:22:16 -07:00
Steve Reinhardt
58c63ea8b1 Get rid of outputStream... wasn't really being used
(except for warn()) and new -r/-e options make it
not worth fixing.
2008-08-04 01:45:12 -04:00
Nathan Binkert
ede89c2d54 libm5: Create a libm5 static library for embedding m5.
This should allow m5 to be more easily embedded into other simulators.
The m5 binary adds a simple main function which then calls into the m5
libarary to start the simulation. In order to make this work
correctly, it was necessary embed python code directly into the
library instead of the zipfile hack.  This is because you can't just
append the zipfile to the end of a library the way you can a binary.
As a result, Python files that are part of the m5 simulator are now
compile, marshalled, compressed, and then inserted into the library's
data section with a certain symbol name.  Additionally, a new Importer
was needed to allow python to get at the embedded python code.

Small additional changes include:
- Get rid of the PYTHONHOME stuff since I don't think anyone ever used
it, and it just confuses things.  Easy enough to add back if I'm wrong.
- Create a few new functions that are key to initializing and running
the simulator: initSignals, initM5Python, m5Main.

The original code for creating libm5 was inspired by a patch Michael
Adler, though the code here was done by me.
2008-08-03 18:19:54 -07:00
Nathan Binkert
678abbc364 syscall: Avoid a compiler warning which turns into a bug.
Simply cast the result to an int and life is good.
2008-08-03 18:19:53 -07:00
Michael Adler
f3a3ab7f2c syscall: Fix TTY emulation in fstat() user-mode simulation for fd 1 (stdout).
The code didn't set S_IFCHR in the st_mode
2008-07-24 16:31:33 -07:00
Michael Adler
5f42bfcd56 process: separate stderr from stdout
- Add the option of redirecting stderr to a file. With the old
behaviour, stderr would follow stdout if stdout was to a file, but
stderr went to the host stderr if stdout went to the host stdout.  The
new default maintains stdout and stderr going to the host.  Now the
two can specify different files, but they will share a file descriptor
if the name of the files is the same.
- Add --output and --errout options to se.py to go with --input.
2008-07-23 14:41:34 -07:00
Michael Adler
2cd04fd6da syscalls: Add a bunch of missing system calls.
readlink, umask, truncate, ftruncate, mkdir, and getcwd.
2008-07-23 14:41:33 -07:00
Michael Adler
8c4f18f6f5 RemoteGDB: add an m5 command line option for setting or disabling remote gdb. 2008-07-23 14:41:33 -07:00
Nathan Binkert
f9a597ddf3 m5ops: clean up the m5ops stuff.
- insert warnings for deprecated m5ops
- reserve opcodes for Ali's stuff
- remove code for stuff that has been deprecated forever
- simplify m5op_alpha
2008-07-11 08:52:50 -07:00
Nathan Binkert
88766f7c71 style: fix indentation and formatting of the pseudo insts. 2008-07-11 08:52:50 -07:00
Nathan Binkert
f90b08a5cc eventq: change the event datastructure back to LIFO.
The status quo is preferred since it is less likely that people will
rely on LIFO than FIFO, and when we move to a parallelized M5, no
ordering between events of the same time/priority will be guaranteed.
2008-07-11 08:48:50 -07:00
Nathan Binkert
10df68dd72 eventq: new eventq data structure. The new data structure is singly
linked list sorted by time and priority.  For things of the same time
and priority, a second, circularly linked list maintains the data
structure.  Events of the same time and priority are now inserted in
FIFO order instead of LIFO order.  This dramatically improves the
performance of systems that schedule multiple events at the same time.

The FIFO order version is not preferred to LIFO (because it may cause
people to rely on it), but I'm going to commit it anyway and
immediately commit the preferred LIFO version on top.
2008-07-11 08:38:31 -07:00
Nathan Binkert
93517dd90c eventq: Clean up the Event class so that it uses fewer bytes. This
will hopefullly allow it to fit in a cache line.
2008-07-10 21:35:42 -07:00
Ali Saidi
a4a7a09e96 Remove delVirtPort() and make getVirtPort() only return cached version. 2008-07-01 10:25:07 -04:00
Ali Saidi
c5fbbf376a Change everything to use the cached virtPort rather than created their own each time.
This appears to work, but I don't want to commit it until it gets tested a lot more.
I haven't deleted the functionality in this patch that will come later, but one question
is how to enforce encourage objects that call getVirtPort() to not cache the virtual port
since if the CPU changes out from under them it will be worse than useless. Perhaps a null
function like delVirtPort() is still useful in that case.
2008-07-01 10:24:19 -04:00
Gabe Black
18c83be507 SimObject: Add in missing includes of <string> and fix minor style problem. 2008-06-21 14:23:58 -04:00
Nathan Binkert
c1584e4227 imported patch sim_object_params.diff 2008-06-18 12:07:15 -07:00
Nathan Binkert
6dedc645f7 add compile flags to m5 2008-06-15 20:56:35 -07:00
Rick Strong
fcfc8b8c4f Configs: Make using Simpoints easier with some config files that support them easily
--HG--
extra : convert_revision : 0f21829306eb68b332f03da410e6c341c8595bdd
2008-02-27 00:35:09 -05:00
Gabe Black
8b4796a367 TLB: Make a TLB base class and put a virtual demapPage function in it.
--HG--
extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f
2008-02-26 23:38:51 -05:00
Stephen Hines
6cc1573923 Make the Event::description() a const function
--HG--
extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
2008-02-06 16:32:40 -05:00
Stephen Hines
0ccf9a2c37 Add base ARM code to M5
--HG--
extra : convert_revision : d811bf87d1a0bfc712942ecd3db1b48fc75257af
2008-02-05 23:44:13 -05:00
Steve Reinhardt
cde5a79eab Additional comments and helper functions for PrintReq.
--HG--
extra : convert_revision : 7eadf9b7db8c0289480f771271b6efe2400006d4
2008-01-02 13:46:22 -08:00
Steve Reinhardt
3952e41ab1 Add functional PrintReq command for memory-system debugging.
--HG--
extra : convert_revision : 73b753e57c355b7e6873f047ddc8cb371c3136b7
2008-01-02 12:20:15 -08:00
Rick Strong
376c7285ee Serialization: Fix serialization of file descriptors. Make sure open
file descriptors are reopened and the file pointer is in the same
place as when the checkpoint occured.

Signed-off by: Ali Saidi

--HG--
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2007-11-29 00:22:46 -05:00
Korey Sewell
8f8e7fe08e put the flattenIndex stuff back in O3 AND put fatal() back in faults
--HG--
extra : convert_revision : 16fb8d7f3fbc5f8f1fc3ed34427c3d90a3125ad0
2007-11-15 16:38:09 -05:00
Korey Sewell
5f7879a935 Get MIPS_SE actually working again by actually by fixing TLB stuff and running hello world
--HG--
extra : convert_revision : 0944e7661934baddca1f1a895af0b75be2d96b10
2007-11-14 06:24:47 -05:00
Korey Sewell
2692590049 Add in files from merge-bare-iron, get them compiling in FS and SE mode
--HG--
extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
2007-11-13 16:58:16 -05:00
Ali Saidi
710f3ca3e1 SE: fix stat64 syscall on os x
--HG--
extra : convert_revision : 40b62ef73d8e408cdd35b22147860f33533db57f
2007-11-02 02:11:15 -04:00
Steve Reinhardt
4b49bd47f4 String constant const-ness changes to placate g++ 4.2.
Also some bug fixes in MIPS ISA uncovered by g++ warnings
(Python string compares don't work in C++!).

--HG--
extra : convert_revision : b347cc0108f23890e9b73b3ee96059f0cea96cf6
2007-10-31 18:04:22 -07:00
Ali Saidi
538fae951b Traceflags: Add SCons function to created a traceflag instead of having one file with them all.
--HG--
extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
2007-10-31 01:21:54 -04:00
Ali Saidi
8ce31ea471 Linux Support: Finally update vptr for new memory system.
--HG--
extra : convert_revision : 8b4927431189abc12201d13428a31b746cdb7dee
2007-10-31 01:21:54 -04:00
Gabe Black
fddfa71658 TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system.
--HG--
extra : convert_revision : 2421af11f62f60fb48faeee6bddadac2987df0e8
2007-10-25 19:04:44 -07:00
Ali Saidi
0711f4f17a SE: Fix page table and system serialization, don't reinit process if this is a checkpoint restore.
--HG--
extra : convert_revision : 03dcf3c088e57b7abab60efe700d947117888306
2007-10-25 20:13:35 -04:00
Gabe Black
54466a31c3 Make the process objects use the Params structs in their constructors, and use a limit to check if access are on the stack.
--HG--
extra : convert_revision : af40a7acf424c4c4f62d0d76db1001a714ae0474
2007-10-16 18:04:01 -07:00
Gabe Black
8ca7feb726 Remote GDB: Turn on remote gdb in SE mode.
--HG--
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2007-10-02 18:26:27 -07:00
Ali Saidi
d325f49b70 Rename cycles() function to ticks()
--HG--
extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
2007-09-28 13:21:52 -04:00
Gabe Black
85d46ce470 Loader: Only complain about TLS sections if you're using Alpha.
--HG--
extra : convert_revision : 125d19ad3fa1847752e455fa248ca3b2a55a2067
2007-09-25 20:02:30 -07:00
Ali Saidi
e282d9601c Syscall Emulation: Add stat64 syscall.
Patch submitted by: Jonas Diemer [diemer (a) ida.ing.tu-bs.de]

--HG--
extra : convert_revision : 07638c05bb3f79aacce49457bbb8c17d0a3a7238
2007-09-13 12:30:12 -04:00
Ali Saidi
19fbdcd30b Loader: Error if a TLS section is found in the binary.
--HG--
extra : convert_revision : d763c0382f3cbcc9786510f5a8e521ec9d55eff1
2007-09-11 00:01:24 -04:00
Miles Kaufmann
54cc0053f0 params: Deprecate old-style constructors; update most SimObject constructors.
SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses

The SimObject(const std::string &name) constructor was removed.  Subclasses
that still rely on that behavior must call the parent initializer as
  : SimObject(makeParams(name))

--HG--
extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
2007-08-30 15:16:59 -04:00
Gabe Black
a3367adaff Address translation: De-templatize the GenericTLB class.
--HG--
extra : convert_revision : b605a90a4a1071e39f49085a839fdcd175e09fdb
2007-08-28 14:30:50 -07:00
Gabe Black
13b1f7231c Address Translation: Make the Generic TLB only compile in SE mode.
--HG--
extra : convert_revision : 7eb9a78480174f754f51f75983ee5a1b31280bd3
2007-08-27 18:30:58 -07:00
Gabe Black
9b49a78cfd Address translation: Make the page table more flexible.
The page table now stores actual page table entries. It is still a templated
class here, but this will be corrected in the near future.

--HG--
extra : convert_revision : 804dcc6320414c2b3ab76a74a15295bd24e1d13d
2007-08-26 20:33:57 -07:00
Gabe Black
537239b278 Address Translation: Make SE mode use an actual TLB/MMU for translation like FS.
--HG--
extra : convert_revision : a04a30df0b6246e877a1cea35420dbac94b506b1
2007-08-26 20:24:18 -07:00
Nathan Binkert
d8900d8478 main: return an an exit code of 1 when we exit due to a python exception.
This requires us to not use PyRun_SimpleString, but PyRun_String since the
latter actually returns a result

--HG--
extra : convert_revision : 3e3916ddd7eef9957569d8e72e73ba4c3160ce20
2007-08-04 16:00:36 -07:00
Nathan Binkert
0536d0cde9 python: Improve support for python calling back to C++ member functions.
Add support for declaring SimObjects to swig so their members can be wrapped.
Make sim_object.i only contain declarations for SimObject.
Create system.i to contain declarations for System.
Update python code to properly call the C++ given the new changes.

--HG--
extra : convert_revision : 82076ee69e8122d56e91b92d6767e356baae420a
2007-08-02 22:50:02 -07:00
Ali Saidi
50bceeae14 Serialize: This shouldn't have been commited, I got a little bit carried away it seems.
--HG--
extra : convert_revision : f8d4d9f3d395d2d3db020cd016c7840876097791
2007-08-02 22:08:33 -04:00
Ali Saidi
da5f62af7b Serialization: Provide array serialization methods that work on std::vector
--HG--
extra : convert_revision : aecdf1a7e50edbb12921991cc81df1b431ce8b38
2007-08-02 14:43:27 -04:00
Ali Saidi
970261f9ce debugSymbolTable is a global variable and only needs to be created once, not once per system
--HG--
extra : convert_revision : 43cbfd1a58d7d728898cbfae0d7f7d9960eba178
2007-08-02 14:32:20 -04:00
Ali Saidi
84cd78e96f Merge Gabe and my changes to arch/mips/utility.hh
--HG--
extra : convert_revision : d5a9d74ee6edf71524ba5c03fb7f054cf9722213
2007-08-01 17:05:03 -04:00
Ali Saidi
fae60c164e Arguments: Get rid of duplicate code for the Arguments class in each architecture.
Move the argument files to src/sim and add a utility.cc file with a function
getArguments() that returns the given argument in the architecture specific fashion.
getArguments() was getArg() is the architecture specific Argument class and has had
all magic numbers replaced with meaningful constants. Also add a function to the
Argument class for testing if an argument is NULL.

--HG--
rename : src/arch/alpha/arguments.cc => src/sim/arguments.cc
rename : src/arch/alpha/arguments.hh => src/sim/arguments.hh
extra : convert_revision : 8b93667bafaa03b52aadb64d669adfe835266b8e
2007-08-01 16:59:14 -04:00
Nathan Binkert
a4a5e6bc2e Twin64_t is in base/bigint.hh
--HG--
extra : convert_revision : 827a89c203235aea08d184cdc720d9c6fb08e4c7
2007-08-01 11:48:32 -07:00
Gabe Black
5e34c62b3b X86: Initial stack frame fixes and constant shuffling.
The initial stack frame for x86 is now substantially more correct. The fixes made here can be back ported to SPARC and possible the other ISAs as well. The auxiliary vector types were moved to the LiveProcess base class because they are independent of ISA. Some of the types may only apply to Linux, though, so they may have to be moved.

--HG--
extra : convert_revision : 89ace35fcc8eb9586d2fee8eeccbc3686499ef24
2007-07-29 01:33:06 -07:00
Gabe Black
8dd7700482 Turn the instruction tracing code into pluggable sim objects.
These need to be refined a little still and given parameters.

--HG--
extra : convert_revision : 9a8f5a7bd9dacbebbbd2c235cd890c49a81040d7
2007-07-28 20:30:43 -07:00
Gabe Black
d1e533a1e2 X86: Fix argument register indexing.
Code was assuming that all argument registers followed in order from ArgumentReg0. There is now an ArgumentReg array which is indexed to find the right index. There is a constant, NumArgumentRegs, which can be used to protect against using an invalid ArgumentReg.

--HG--
extra : convert_revision : f448a3ca4d6adc3fc3323562870f70eec05a8a1f
2007-07-26 22:13:14 -07:00
Nathan Binkert
abc76f20cb Major changes to how SimObjects are created and initialized. Almost all
creation and initialization now happens in python.  Parameter objects
are generated and initialized by python.  The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.

--HG--
extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-07-23 21:51:38 -07:00
Gabe Black
6fbcb225af Make name, isMachineCheckFault, and isAlignmentFault const.
--HG--
extra : convert_revision : a27e0cbdfcb2a5fdc5979686f887cec7d106542b
2007-07-18 16:09:00 -07:00
Nathan Binkert
b47737dde7 Make sure all parameters have default values if they're
supposed to and make sure parameters have the right type.
Also make sure that any object that should be an intermediate
type has the right options set.

--HG--
extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93
2007-06-20 08:14:11 -07:00
Nathan Binkert
35147170f9 Move SimObject python files alongside the C++ and fix
the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-05-27 19:21:17 -07:00
Steve Reinhardt
05d14cf3e2 Add new EventWrapper constructor that takes a Tick value
and schedules the event immediately.

--HG--
extra : convert_revision : a84e729a5ef3632cbe6cff858c453c782707d983
2007-05-20 21:43:01 -07:00
Ali Saidi
9dfbea68a2 update for new reschedule semantics
--HG--
extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
2007-05-09 22:34:54 -04:00
Ali Saidi
37b45e3c8c fix the translating ports so it can add a page on a fault
--HG--
extra : convert_revision : 56f6f2cbf4e92b7f2dd8c9453831fab86d83ef80
2007-05-09 15:37:46 -04:00
Nathan Binkert
d92fff858b fix SIGUSR1 and SIGUSR2 by clearing the variables after
they're used

--HG--
extra : convert_revision : ed5351f291d45d585bf811a062e162e16b86e886
2007-04-18 08:04:46 -07:00
Gabe Black
d54b8b73ed Comment out the remote gdb object for SE mode.
--HG--
extra : convert_revision : a582684f3a2dd1d1d0d8b93a9e213d9108491535
2007-04-09 18:30:50 +00:00
Ali Saidi
8d38dd3231 remove the extern C around gdb helper functions. It's need needed for any new version of gdb to work and it causes at least mine to segfault
--HG--
extra : convert_revision : 5e4c2ec753372fd0569734d3ddb0c8690409ca16
2007-03-12 17:23:08 -04:00
Nathan Binkert
1aef5c06a3 Rework the way SCons recurses into subdirectories, making it
automatic.  The point is that now a subdirectory can be added
to the build process just by creating a SConscript file in it.
The process has two passes.  On the first pass, all subdirs
of the root of the tree are searched for SConsopts files.
These files contain any command line options that ought to be
added for a particular subdirectory.  On the second pass,
all subdirs of the src directory are searched for SConscript
files.  These files describe how to build any given subdirectory.
I have added a Source() function.  Any file (relative to the
directory in which the SConscript resides) passed to that
function is added to the build.  Clean up everything to take
advantage of Source().
function is added to the list of files to be built.

--HG--
extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2007-03-10 23:00:54 -08:00
Gabe Black
df1ea2cf05 Merge zizzer.eecs.umich.edu:/bk/newmem
into  zower.eecs.umich.edu:/home/gblack/m5/newmem-statetrace

--HG--
extra : convert_revision : 82a956ffc1bedb2c0d05c4ea3469f843f559a475
2007-03-09 18:32:13 -05:00
Gabe Black
f1e3e1c305 Use the TheISA namespace in case we're coming from a file that doesn't do that for us. This should be contained in the scope of the function and not leak elsewhere.
--HG--
extra : convert_revision : 0bb0e1457011505a99a871c443bc45f4365e9c7e
2007-03-09 22:14:25 +00:00
Ali Saidi
58f69391ca implement ipi stufff for SPARC
src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/arch/x86/utility.hh:
    add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi
src/arch/sparc/isa/decoder.isa:
    handle writable bits of strandstatus register in miscregfile
src/arch/sparc/miscregfile.hh:
    some constants for the strand status register
src/arch/sparc/ua2005.cc:
    properly implement the strand status register
src/dev/sparc/iob.cc:
    implement ipi generation properly
src/sim/system.cc:
    call into the ISA to start the CPU (or not)

--HG--
extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
2007-03-09 16:56:39 -05:00
Ali Saidi
2f7a4e1d1b fix compiling of FS after Gabe's last compile
--HG--
extra : convert_revision : a93fa5ad61aa2b8c18bf6c513b617f3425ffb220
2007-03-07 21:50:09 -05:00
Gabe Black
54fc750924 Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same across all architectures.
--HG--
extra : convert_revision : 18d441eb7ac44df4df41771bfe3dec69f7fa70ec
2007-03-07 20:04:46 +00:00
Gabe Black
b7ea19760a Make byteswap work correctly on Twin??_t types.
--HG--
extra : convert_revision : a8a14078d62c24e480ffa69591edfc775d1d76cc
2007-03-07 17:46:04 +00:00
Gabe Black
44f91bb444 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86

--HG--
extra : convert_revision : 0822fbcc377781b53d2de9ba40ab9d985ccbc039
2007-03-06 20:58:44 +00:00
Nathan Binkert
d55b25cde6 Move all of the parameters of the Root SimObject so they are
directly configured by python.  Move stuff from root.(cc|hh) to
core.(cc|hh) since it really belogs there now.
In the process, simplify how ticks are used in the python code.

--HG--
extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3
2007-03-06 11:13:43 -08:00
Gabe Black
05c86ec0d7 Get X86 to load an elf and start a process for it.
src/arch/x86/SConscript:
    Add in process source files.
src/arch/x86/isa_traits.hh:
    Replace magic constant numbers with the x86 register names.
src/arch/x86/miscregfile.cc:
    Make clear the miscreg file succeed. There aren't any misc regs, so clearing them is very easy.
src/arch/x86/process.hh:
    An X86 process class.
src/base/loader/elf_object.cc:
    Add in code to recognize x86 as an architecture.
src/base/traceflags.py:
    Add an x86 traceflag
src/sim/process.cc:
    Add in code to create an x86 process.
src/arch/x86/intregs.hh:
    A file which declares names for the integer register indices.
src/arch/x86/linux/linux.cc:
src/arch/x86/linux/linux.hh:
    A very simple translation of SPARC's linux.cc and linux.hh. It's probably not correct for x86, but it might not be correct for SPARC either.
src/arch/x86/linux/process.cc:
src/arch/x86/linux/process.hh:
    An x86 linux process. The syscall table is split out into it's own file.
src/arch/x86/linux/syscalls.cc:
    The x86 Linux syscall table and the uname function.
src/arch/x86/process.cc:
    The x86 process base class.
tests/test-progs/hello/bin/x86/linux/hello:
    An x86 hello world test binary.

--HG--
extra : convert_revision : f22919e010c07aeaf5757dca054d9877a537fd08
2007-03-06 15:42:30 +00:00
Gabe Black
82235b8240 Add stub for x86 process creation
--HG--
extra : convert_revision : 3bdbc415a73c6bb4d723f68714a96c9f922ba5e6
2007-03-05 16:15:13 +00:00
Nathan Binkert
ba042842c6 Don't use the exact same name as a system header #define
--HG--
extra : convert_revision : 099e380395fc1fdaef993b019d3d4e596e8076c2
2007-03-04 19:26:49 -08:00
Nathan Binkert
61178c8de2 include signal.h
--HG--
extra : convert_revision : 9b5ad2704dfd63a1aa8ad0e4275fd0e3a7d32d6d
2007-03-03 12:26:14 -05:00
Gabe Black
68ad153309 Merge zizzer.eecs.umich.edu:/bk/newmem
into  ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-sparc32

--HG--
extra : convert_revision : bbd0def502e423e64e2c4f6415a4b043b60c7f90
2007-03-03 06:24:01 +00:00
Nathan Binkert
ffe6bebb05 Factor code out of main.cc and main.i into a bunch of files
so things are organized in a more sensible manner.  Take apart
finalInit and expose the individual functions which are now
called from python.  Make checkpointing a bit easier to use.

--HG--
extra : convert_revision : f470ddabbb47103e7b4734ef753c40089f2dcd9d
2007-03-02 22:24:00 -08:00
Gabe Black
23dc5099a4 Implement the _llseek syscall. It's Linux only, so we'll actually use the lseek syscall.
--HG--
extra : convert_revision : cccfd5efddbba527c6fb4e07ad2ab235a2670918
2007-03-03 03:34:55 +00:00
Gabe Black
477afcaf5b Fix some issues with 32 bit processes.
--HG--
extra : convert_revision : b01b38bbf185f2279134db4976a9bdb3e381a670
2007-03-03 03:34:54 +00:00
Gabe Black
29e5df890d Make trap instructions always generate TrapInstruction Fault objects which call into the Process object to handle system calls. Refactored the Process objects, and move the handler code into it's own file, and add some syscalls which are used in a natively compiled hello world. Software traps with trap number 3 (not syscall number 3) are supposed to cause the register windows to be flushed but are ignored right now. Finally, made uname for SPARC report a 2.6.12 kernel which is what m22-018.pool happens to be running.
--HG--
extra : convert_revision : ea873f01c62234c0542f310cc143c6a7c76ade94
2007-02-28 16:36:38 +00:00
Nathan Binkert
c003dda793 Make it easier to turn off the remote debugger
--HG--
extra : convert_revision : d88784736df5f9b498770fb7e98f52715669c0e1
2007-02-21 22:25:48 -08:00
Ali Saidi
7a2ecf9e26 add pseduo instruction support for sparc
util/m5/Makefile.alpha:
    Clean up to make it a bit easier to muck with
util/m5/Makefile.alpha:
    Make the makefile more reasonable
util/m5/Makefile.alpha:
    Remove authors from copyright.
util/m5/Makefile.alpha:
    Updated Authors from bk prs info
util/m5/Makefile.alpha:
    bk cp Makefile Makefile.alpha
src/arch/sparc/tlb.cc:
    Clean up the cache code a little bit and make sure the uncacbale bit is set when appropriate
src/arch/alpha/isa/decoder.isa:
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
    Rename AlphaPseudo -> PseudoInst since it's all generic
src/arch/sparc/isa/bitfields.isa:
src/arch/sparc/isa/decoder.isa:
src/arch/sparc/isa/includes.isa:
src/arch/sparc/isa/operands.isa:
    Add support for pseudo instructions in sparc
util/m5/Makefile.alpha:
util/m5/Makefile.sparc:
    split off alpha make file and sparc make file for m5 app
util/m5/m5.c:
    ivle and ivlb aren't used anymore
util/m5/m5op.h:
    stdint seems like a more generic better fit here
util/m5/m5op_alpha.S:
    move the op ids into their own header file since we can share them between sparc and alpha

--HG--
rename : util/m5/Makefile => util/m5/Makefile.sparc
rename : util/m5/m5op.S => util/m5/m5op_alpha.S
extra : convert_revision : 490ba2e8b8bc6e28bfc009cedec6b686b28e7834
2007-02-21 21:06:17 -05:00
Nathan Binkert
4e7f8c0885 Get rid of the stand alone ParamContext since all of the
relevant stuff has now been moved to python.

--HG--
extra : convert_revision : 608e5ffd0e2b33949a2b183117216f136cfa4484
2007-02-18 09:31:25 -08:00
Nathan Binkert
e94103397c Get rid of the Statistics and Statreset ParamContexts, and
expose all of the relevant functionality to python.  Clean
up the mysql code while we're at it.

--HG--
extra : convert_revision : 5b711202a5a452b8875ebefb136a156b65c24279
2007-02-17 22:52:32 -08:00
Nathan Binkert
01f32efa4b Check that there is a param context list before trying
to loop through it.  This is more important as we get rid
of param contexts

--HG--
extra : convert_revision : 5a24048b5c3d609285da83dfcb106910afad6919
2007-02-17 22:36:39 -08:00
Nathan Binkert
a41f17b40e Remove the event_ignore stuff since it was never really used
--HG--
extra : convert_revision : ef5f3492e8232d08af7e1eae64ba96c79ca14b6f
2007-02-17 22:11:21 -08:00
Nathan Binkert
8c1c68a31e Give the progress event its own priority
--HG--
extra : convert_revision : 6357ade64deb42fae68b2766545b1c4cdc673fc9
2007-02-17 22:07:50 -08:00
Nathan Binkert
18e245ad0b Pass an exception from a python event through the event queue
back into python so we don't just silently ignore those errors

--HG--
extra : convert_revision : e2f5566a4681f1b8ea80af50071119118afa7d8a
2007-02-17 20:27:11 -08:00
Gabe Black
276e52cdec Force the st_blksize field of a stat call to be 8k.
--HG--
extra : convert_revision : 6cd2dc622ca95cc1ea89bd5e5cbf33d9510c351c
2007-02-14 12:58:28 -05:00
Nathan Binkert
184decd196 Clean up tracing stuff more, get rid of the trace log since
its not all that useful. Fix a few bugs with python/C++
integration.

--HG--
extra : convert_revision : a706512f7dc8b0c88f1ff96fe35ab8fbf9548b78
2007-02-10 15:14:50 -08:00
Steve Reinhardt
572addee5d Fix for previous commit: need to ifdef NDEBUG on the
definition as well as the declaration.

--HG--
extra : convert_revision : 4f073fa6b47bf21abf58d92cb1c9eed699c9c89e
2007-02-06 10:04:44 -08:00
Steve Reinhardt
f5a803f56e Use an instance counter to give Events repeatable IDs
in debugging mode (especially valuable for tracediff).

--HG--
extra : convert_revision : 227434a06b5271a8300f2f6861bd06c4ac19e6c4
2007-02-05 22:05:00 -08:00
Ali Saidi
fc79ace502 Make SPARC checkpointing work
src/arch/sparc/floatregfile.cc:
    Fix serialization for fpreg
src/arch/sparc/intregfile.cc:
    fix serialization for intreg
src/arch/sparc/miscregfile.cc:
    fix serialization from miscreg
src/arch/sparc/pagetable.cc:
    fix serialization for page table
src/arch/sparc/regfile.cc:
    need to serialize nnpc
src/arch/sparc/tlb.cc:
    write serialization code for tlb
src/cpu/base.cc:
    provide a way to find the thread number a context is
    serialize the instruction counter
src/cpu/base.hh:
    provide a way to find the thread number a context is
    and given a thread number find a context pointer
src/cpu/cpuevent.hh:
    provide method to get thread context from a cpu event for serialization
src/dev/sparc/t1000.cc:
src/dev/sparc/t1000.hh:
    nothing to serialize in t1000
src/sim/serialize.cc:
src/sim/serialize.hh:
    Make findObj() work (it hasn't since we did the python conversion stuff)

--HG--
extra : convert_revision : a95bc4e3c3354304171efbe3797556fdb146bea2
2007-01-30 18:25:39 -05:00
Gabe Black
91ca1b48e2 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : 2398e48722dd71ddf270e93bd7b387078fb30e6b
2007-01-28 14:46:56 -05:00
Nathan Binkert
37795b104d Stick the conversion of python to unix time with all of
the other param code so that other functions can use it
as well.

--HG--
extra : convert_revision : a8becdeadc70af0b64bff5b0770788dfba6e1857
2007-01-28 10:26:59 -08:00
Ali Saidi
02bd40d552 While I'm waiting for legion to run make m5 compile with a few more compilers
SConstruct:
src/SConscript:
    Add flags for Intel CC while i'm at it
src/base/compiler.hh:
    the _Pragma stuff needst to be called this way unless someone happens to have a cleaner way
src/base/cprintf_formats.hh:
    add std:: where appropriate
src/base/statistics.hh:
    use this->map since icc was getting confused about std::map vs the locally defined map
src/cpu/static_inst.hh:
    Add some more dummy returns where needed
src/mem/packet.hh:
    add more dummy returns where needed
src/sim/host.hh:
    use limits to come up with max tick

--HG--
extra : convert_revision : 08e9f7898b29fb9d063136529afb9b6abceab60c
2007-01-27 15:38:04 -05:00
Gabe Black
0358ccee23 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

src/arch/sparc/isa/formats/mem/util.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/system.cc:
    Hand Merge

--HG--
extra : convert_revision : d5e0c97caebb616493e2f642e915969d7028109c
2007-01-27 01:59:20 -05:00
Ali Saidi
fd8a4ff5a8 Merge zeep.pool:/z/saidi/work/m5.newmem
into  zeep.pool:/z/saidi/work/m5.suncc

--HG--
extra : convert_revision : 20f61a524a3b53fc0afcf53a24b5a1fe1d96f579
2007-01-26 18:49:40 -05:00
Ali Saidi
63fdabf191 make our code a little more standards compliant
pretty close to compiling w/ suns compiler

briefly:
add dummy return after panic()/fatal()
split out flags by compiler vendor
include cstring and cmath where appropriate
use std namespace for string ops

SConstruct:
    Add code to detect compiler and choose cflags based on detected compiler
    Fix zlib check to work with suncc
src/SConscript:
    split out flags by compiler vendor
src/arch/sparc/isa/decoder.isa:
    use correct namespace for sqrt
src/arch/sparc/isa/formats/basic.isa:
    add dummy return around panic
src/arch/sparc/isa/formats/integerop.isa:
    use correct namespace for stringops
src/arch/sparc/isa/includes.isa:
    include cstring and cmath where appropriate
src/arch/sparc/isa_traits.hh:
    remove dangling comma
src/arch/sparc/system.cc:
    dummy return to make sun cc front end happy
src/arch/sparc/tlb.cc:
src/base/compression/lzss_compression.cc:
    use std namespace for string ops
src/arch/sparc/utility.hh:
    no reason to say something is unsigned unsigned int
src/base/compression/null_compression.hh:
    dummy returns to for suncc front end
src/base/cprintf.hh:
    use standard variadic argument syntax instead of gnuc specefic renaming
src/base/hashmap.hh:
    don't need to define hash for suncc
src/base/hostinfo.cc:
    need stdio.h for sprintf
src/base/loader/object_file.cc:
    munmap is in std namespace not null
src/base/misc.hh:
    use M5 generic noreturn macros
    use standard variadic macro __VA_ARGS__
src/base/pollevent.cc:
    we need file.h for file flags
src/base/random.cc:
    mess with include files to make suncc happy
src/base/remote_gdb.cc:
    malloc memory for function instead of having a non-constant in an array size
src/base/statistics.hh:
    use std namespace for floor
src/base/stats/text.cc:
    include math.h for rint (cmath won't work)
src/base/time.cc:
    use suncc version of ctime_r
src/base/time.hh:
    change macro to work with both gcc and suncc
src/base/timebuf.hh:
    include cstring from memset and use std::
src/base/trace.hh:
    change variadic macros to be normal format
src/cpu/SConscript:
    add dummy returns where appropriate
src/cpu/activity.cc:
    include cstring for memset
src/cpu/exetrace.hh:
    include cstring fro memcpy
src/cpu/simple/base.hh:
    add dummy return for panic
src/dev/baddev.cc:
src/dev/pciconfigall.cc:
src/dev/platform.cc:
src/dev/sparc/t1000.cc:
    add dummy return where appropriate
src/dev/ide_atareg.h:
    make define work for both gnuc and suncc
src/dev/io_device.hh:
    add dummy returns where approirate
src/dev/pcidev.hh:
src/mem/cache/cache_impl.hh:
src/mem/cache/miss/blocking_buffer.cc:
src/mem/cache/tags/lru.hh:
src/mem/cache/tags/split.hh:
src/mem/cache/tags/split_lifo.hh:
src/mem/cache/tags/split_lru.hh:
src/mem/dram.cc:
src/mem/packet.cc:
src/mem/port.cc:
    include cstring for string ops
src/dev/sparc/mm_disk.cc:
    add dummy return where appropriate
    include cstring for string ops
src/mem/cache/miss/blocking_buffer.hh:
src/mem/port.hh:
    Add dummy return where appropriate
src/mem/cache/tags/iic.cc:
    cast hastSets to double for log() call
src/mem/physical.cc:
    cast pmemAddr to char* for munmap
src/sim/byteswap.hh:
    make define work for suncc and gnuc

--HG--
extra : convert_revision : ef8a1f1064e43b6c39838a85c01aee4f795497bd
2007-01-26 18:48:51 -05:00
Gabe Black
1352e55ceb Merge zizzer.eecs.umich.edu:/bk/newmem
into  ewok.(none):/home/gblack/m5/newmemo3

src/sim/byteswap.hh:
    Hand Merge

--HG--
extra : convert_revision : 640d33ad0c416934e8a5107768e7f1dce6709ca8
2007-01-22 22:31:48 -08:00
Gabe Black
45c3f1747c Added remote gdb objects to each process
--HG--
extra : convert_revision : 1b5c1470ffc52b2f7719e469153702dec694f9a3
2007-01-22 22:22:09 -08:00
Ali Saidi
60eaa03d72 fix compiling on x86/Solaris
--HG--
extra : convert_revision : f7d21fc277dd7172c244d83fb012883dc8b67895
2007-01-22 21:57:01 -05:00
Ali Saidi
5c1d631f36 check if an executable is dynamic and die if it is
Only implemented for ELf. Someone might want to implement it for ecoff and some point

src/base/loader/elf_object.cc:
src/base/loader/elf_object.hh:
src/base/loader/object_file.cc:
src/base/loader/object_file.hh:
    add a function to check if an executable is dynamic
src/sim/process.cc:
    check if an executable is dynamic and die if it is

--HG--
extra : convert_revision : 830b1b50b08a5abaf895ce6251bbc702c986eebf
2007-01-22 16:14:06 -05:00
Gabe Black
8840ebcb00 Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

--HG--
extra : convert_revision : f4a05accb8fa24d425dd818b1b7f268378180e99
2007-01-03 00:52:30 -05:00
Nathan Binkert
2cb2b50802 move the swig initialization calls from src/sim/main.cc to
src/python/swig/init.cc so that it's not as easy to forget
about it when you add a new swig module.

--HG--
extra : convert_revision : 5cc4ec0838e636aa761901effb8986de58d23e03
2006-12-21 15:49:16 -08:00
Gabe Black
f13155393d Initial work to make remote gdb available in SE mode. This is completely untested.
--HG--
extra : convert_revision : 3ad9a3368961d5e9e71f702da84ffe293fe8adc8
2006-12-20 18:39:40 -05:00
Gabe Black
9d0ca61b7e Merge zizzer:/bk/newmem
into  zower.eecs.umich.edu:/eecshome/m5/newmem

src/arch/isa_parser.py:
src/arch/sparc/isa/formats/mem/basicmem.isa:
src/arch/sparc/isa/formats/mem/blockmem.isa:
src/arch/sparc/isa/formats/mem/util.isa:
src/arch/sparc/miscregfile.cc:
src/arch/sparc/miscregfile.hh:
src/cpu/o3/iew_impl.hh:
    Hand Merge

--HG--
extra : convert_revision : ae1b25cde85ab8ec275a09d554acd372887d4d47
2006-12-16 11:35:40 -05:00
Gabe Black
569e0e883b Add in constants which let you explicitly check if endian conversion would do anything. This was needed for a case where a piece of data was within a larger data type. When the larger data type was swapped, the location of the smaller data type would move.
--HG--
extra : convert_revision : 4c904c964678529c72b8f1044dfcb400604f6654
2006-12-16 07:37:33 -05:00
Gabe Black
12c5bd2305 Move the SyscallReturn class into sim/syscallreturn.hh. Also move some miscregs into the integer register file so they get renamed.
src/arch/alpha/syscallreturn.hh:
src/arch/mips/syscallreturn.hh:
src/sim/syscallreturn.hh:
    Move the SyscallReturn class into sim/syscallreturn.hh
src/arch/sparc/faults.cc:
src/arch/sparc/isa/operands.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/miscregfile.cc:
src/arch/sparc/miscregfile.hh:
src/arch/sparc/process.cc:
src/arch/sparc/sparc_traits.hh:
    Move some miscregs into the integer register file so they get renamed.

--HG--
extra : convert_revision : df5b94fa1e7fdca34816084e0a423d6fdf86c79b
2006-12-05 01:55:02 -05:00
Ali Saidi
8c4f7a0404 Load the hypervisor symbols twice, once with an address mask so that we can get symbols for where it's copied to in memory
Add the ability to use an address mask for symbol loading
Rather then silently failing on platform accesses panic
Move BadAddr/IsaFake no Device from Tsunami
Let the system kernel be none, but warn about it

configs/common/FSConfig.py:
    We don't have a kernel for sparc yet
src/arch/sparc/system.cc:
    Load the hypervisor symbols twice, once with an address mask so that we can get symbols for where it's copied to in memory
src/base/loader/aout_object.cc:
src/base/loader/aout_object.hh:
src/base/loader/ecoff_object.cc:
src/base/loader/ecoff_object.hh:
src/base/loader/elf_object.cc:
src/base/loader/elf_object.hh:
src/base/loader/object_file.hh:
src/base/loader/raw_object.cc:
src/base/loader/raw_object.hh:
    Add the ability to use an address mask for symbol loading
src/dev/sparc/t1000.cc:
    Rather then silently failing on platform accesses panic
src/dev/sparc/t1000.hh:
    fix up a couple of platform comments
src/python/m5/objects/Bus.py:
src/python/m5/objects/Device.py:
src/python/m5/objects/T1000.py:
src/python/m5/objects/Tsunami.py:
    Move BadAddr/IsaFake no Device from Tsunami
src/python/m5/objects/System.py:
    Let kernel be none
src/sim/system.cc:
    Let the system kernel be none, but warn about it

--HG--
extra : convert_revision : 92f6afef599a3d3c7c5026d03434102c41c7b5f4
2006-11-30 15:51:54 -05:00
Ali Saidi
6e9cf9411f Merge zizzer:/bk/sparcfs
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : f540987901994fe9dc023587fd555efb2dbf24bf
2006-11-23 01:44:49 -05:00
Ali Saidi
271b9a5435 first cut at a sparc tlb
src/arch/sparc/SConscript:
    Add code to serialize/unserialze tlb entries
src/arch/sparc/asi.cc:
src/arch/sparc/asi.hh:
    update asi names for how they're listed in the supplement
    add asis
    add more asi functions
src/arch/sparc/isa_traits.hh:
    move the interrupt stuff and some basic address space stuff into isa traits
src/arch/sparc/miscregfile.cc:
src/arch/sparc/miscregfile.hh:
    add mmu registers to tlb
    get rid of implicit asi stuff... the tlb will handle it
src/arch/sparc/regfile.hh:
    make isnt/dataAsid return ints not asis
src/arch/sparc/tlb.cc:
src/arch/sparc/tlb.hh:
    first cut at sparc tlb
src/arch/sparc/vtophys.hh:
    pagatable nedes to be included here
src/mem/request.hh:
    add asi and if the request is a memory mapped register to the requset object
src/sim/host.hh:
    fix incorrect definition of LL

--HG--
extra : convert_revision : 6c85cd1681c62c8cd8eab04f70b1f15a034b0aa3
2006-11-23 01:42:57 -05:00
Nathan Binkert
4c2e65c94e implement RUSAGE_CHILDREN for getrusage since it's trivial
--HG--
extra : convert_revision : bc12b3b2e9ee02f42c437cbc20680ea00e19a801
2006-11-16 13:08:29 -08:00
Nathan Binkert
31d829d388 Implement current working directory for LiveProcesses
--HG--
extra : convert_revision : a2d3cf29ab65c61af27d82a8c421a41a19fd5aeb
2006-11-16 12:43:11 -08:00
Nathan Binkert
afed455e77 Expose debugBreakCycle through swig and get rid of
the Debug param context

--HG--
extra : convert_revision : 40e9dcfa9faedbe0c90a43f908f20a7c14ded6a4
2006-11-13 12:20:08 -08:00
Nathan Binkert
d2d4431752 Create a module called internal where swigged stuff goes.
Rename cc_main to internal.main

--HG--
extra : convert_revision : e938005f600fbf8a43435e29426a948f4501f072
2006-11-12 18:49:16 -08:00
Nathan Binkert
b16e559177 Get rid of the ParamContext for pseudo instructions and move
the parameters to the BaseCPU object.

--HG--
extra : convert_revision : 557292cffb40918133647b0c9ac653ee5112df2e
2006-11-11 17:22:10 -08:00
Ali Saidi
aa19b2e7bc fix endian issues with condition codes
use memcpy instead of bcopy
s/u_int32_t/uint32_t/g
fixup endian code to work with solaris
hack to make sure htole() works... Nate, have a good idea to fix this?

src/arch/sparc/faults.cc:
    set the reset address to be 40 bits. Makes PC printing easier at least for now.
src/arch/sparc/isa/base.isa:
    fix endian issues with condition codes
src/arch/sparc/tlb.hh:
    add implemented physical addres constants
src/arch/sparc/utility.hh:
    add tlb.hh to utilities
src/base/loader/raw_object.cc:
    add a symbol <filename>_start to the symbol table for binaries files
src/base/remote_gdb.cc:
    use memcpy instead of bcopy
src/cpu/exetrace.cc:
    clean up printing a bit more
src/cpu/m5legion_interface.h:
    add tons to the shared interface
src/dev/ethertap.cc:
    s/u_int32_t/uint32_t/g
src/dev/ide_atareg.h:
    fixup endian code to work with solaris
src/dev/pcidev.cc:
src/sim/param.hh:
    hack to make sure htole() works...

--HG--
extra : convert_revision : 4579392184b40bcc1062671a953c6595c685e9b2
2006-11-10 20:17:42 -05:00
Gabe Black
f720029e97 Merge zizzer.eecs.umich.edu:/bk/newmem/
into  zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops

--HG--
extra : convert_revision : dc165840841bdd88e40111b98d1be493441703f0
2006-11-08 16:18:10 -05:00
Lisa Hsu
64c0d82dec simplify maxtick parsing in both the python and the c++.
configs/common/Simulation.py:
    simplify maxtick code a little bit - instead of checking for -1, just set it at MaxTick.
src/python/m5/__init__.py:
    make a new m5 param called MaxTick.
src/sim/host.hh:
    fix the M5 def. of MaxTick
src/sim/main.cc:
    Simplify the MaxTick/num_cycles parsing within main.cc

--HG--
extra : convert_revision : f800addfbc1323591c2e05b892276b439b671668
2006-11-08 15:05:23 -05:00
Gabe Black
c693c6ba9f Put kernel_stats back into arch.
--HG--
rename : src/kern/alpha/idle_event.cc => src/arch/alpha/idle_event.cc
rename : src/kern/alpha/idle_event.hh => src/arch/alpha/idle_event.hh
rename : src/kern/alpha/kernel_stats.cc => src/arch/alpha/kernel_stats.cc
rename : src/kern/alpha/kernel_stats.hh => src/arch/alpha/kernel_stats.hh
rename : src/kern/sparc/kernel_stats.hh => src/arch/sparc/kernel_stats.hh
rename : src/kern/base_kernel_stats.cc => src/kern/kernel_stats.cc
rename : src/kern/base_kernel_stats.hh => src/kern/kernel_stats.hh
extra : convert_revision : 42bd3e36b407edbd19b912c9218f4e5923a15966
2006-11-07 22:34:34 -05:00
Gabe Black
58f7ed2416 Cleaned up remnants of ivlb and ivle
--HG--
extra : convert_revision : 93b37dbcd3d9dd1eced0f829223f52b53fe58643
2006-11-06 20:49:48 -05:00
Gabe Black
02abca6b9e Merge zizzer.eecs.umich.edu:/bk/newmem/
into  zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops

src/SConscript:
    SCCS merged

--HG--
extra : convert_revision : f130c8a2d33f58d857e5d5a02bb9698c1bceb23b
2006-11-06 19:52:32 -05:00
Gabe Black
b04a2653f9 Got rid of obsolete ivlb and ivle psuedo instructions.
--HG--
extra : convert_revision : c3c2dd5a6e7181ad94194146d7fa2b33b21074fb
2006-11-06 19:09:23 -05:00
Gabe Black
85a6079db7 Remote GDB support has been changed to use inheritance. Alpha should work, but isn't tested. Other architectures will not.
--HG--
extra : convert_revision : fc7e1e73e2f3b1a4ab9905a1eb98c5f07c6c8707
2006-11-06 18:29:58 -05:00
Ali Saidi
21cf4a46b9 fixes so that M5 will compile under solaris
SConstruct:
    Add check to see if we need to include libsocket
src/arch/sparc/floatregfile.cc:
src/arch/sparc/intregfile.cc:
    use memset rather than bzero and include the appropriate headerfile
src/base/pollevent.cc:
    If we're compling under solaris we need sys/file.h
src/base/random.cc:
src/base/random.hh:
    solaris doesn't have random(), so use rint with the correct rounding mode
    if we're compiling on solaris
src/base/stats/flags.hh:
    u_int32_t??
src/base/time.hh:
    grab the timersub() define from freebsd since it doesn't exist in solaris
src/cpu/inst_seq.hh:
    we don't need to include stdint here
src/sim/byteswap.hh:
    the method to detect endianness on Solaris is a little more complex...

--HG--
extra : convert_revision : 6b7db0e900e7bccfc250d65c125065f27280dda1
2006-11-04 21:41:01 -05:00
Ali Saidi
17141a1be9 remove connectAll() and connect() code since it isn't used anymore. (The python does it all)
--HG--
extra : convert_revision : e16a1ff59d4522703b155c2e68379a3072e8f47f
2006-10-31 13:23:49 -05:00
Steve Reinhardt
06482e6eed Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
into  zizzer.eecs.umich.edu:/z/stever/bk/newmem-head

--HG--
extra : convert_revision : a077304e608753f50f4a12216901d156469eebe4
2006-10-24 11:50:20 -04:00
Gabe Black
466c387318 Merge zizzer.eecs.umich.edu:/bk/newmem
into  zeep.eecs.umich.edu:/home/gblack/m5/newmem

--HG--
extra : convert_revision : cb15101d24ef2969e1819d6bdeeb2dd1f23f02d1
2006-10-23 09:44:58 -04:00
Steve Reinhardt
199084b339 Add DPRINTF for non-timed quiesce.
--HG--
extra : convert_revision : 5487f4fc07dbea6e5a651c104ea1d2fe864fb057
2006-10-22 16:22:45 -07:00
Steve Reinhardt
0159529343 Add Quiesce trace flag to track CPU quiesce/wakeup events.
--HG--
extra : convert_revision : 23be99d0fe6e2184523efe5d9e0a1ac7bf19d087
2006-10-21 23:32:14 -07:00
Steve Reinhardt
3ac1ca8ff6 Tweak a few things for better page fault debugging.
src/sim/faults.cc:
    Fix fault message.
src/kern/tru64/tru64.hh:
    Add DPRINTF to see where new thread stacks are allocated.
src/arch/alpha/faults.cc:
    Add print statement so we know what the faulting address is in SE mode.

--HG--
extra : convert_revision : 6eb2b513c339496a0d013b7e914953a0a066c12d
2006-10-21 05:28:05 -04:00
Gabe Black
0b5cf4ba6e Merge zizzer.eecs.umich.edu:/bk/newmem
into  zeep.eecs.umich.edu:/home/gblack/m5/newmem

--HG--
extra : convert_revision : 2711fec2bf72801999b060e65f0bf744c18734fb
2006-10-20 16:39:47 -04:00
Nathan Binkert
6c6b78126a Construct a correct value of PYTHONHOME from the interpreter
running SCons, make it into a sticky option that can be
overridden at build time, and set it up before the interpreter
is started.  Also, fix the code that turns sticky options into
config/*.hh so that it works with types other than bool.

--HG--
extra : convert_revision : 602398b35d4da4e813f78865678ed348fdea7270
2006-10-20 11:37:59 -07:00
Steve Reinhardt
e78684fc6c Add new event priority for trace enable events so
that tracing gets turned on as the very first thing
in the selected cycle (tick).

--HG--
extra : convert_revision : c08f749ca42782af1b48e5aa5f0860bf7076bd3c
2006-10-19 10:21:23 -07:00
Ali Saidi
e51b075a27 add code to serialize se structures. Lisa is working on the python side of things and will test
src/mem/page_table.cc:
src/mem/page_table.hh:
    add code to serialize/unserialize page table
src/sim/process.cc:
src/sim/process.hh:
    add code to serialize/unserialize process

--HG--
extra : convert_revision : ee9eb5e2c38c5d317a2f381972c552d455e0db9e
2006-10-17 19:38:36 -04:00
Gabe Black
519d11bab3 Merge zizzer.eecs.umich.edu:/bk/newmem
into  zeep.eecs.umich.edu:/home/gblack/m5/newmem

--HG--
extra : convert_revision : 898976bbd322e55bc234035456df8090c6dcf72d
2006-10-16 15:56:53 -04:00
Gabe Black
67794ace5c Added in missing portions of the stat structure copying function.
--HG--
extra : convert_revision : cfabcb07b2c0c5655a757e8c98999ec3cf791e09
2006-10-15 21:54:59 -04:00
Lisa Hsu
8acecfef9b since memoryMode was put into the System (from SimObject), things got broken - this fixes it so that changeToTiming/changeToAtomic works.
src/python/m5/SimObject.py:
    now that setMemoryMode is a method in System, need to convert the SimObject * _ccObject into a system ptr to call setMemoryMode.
src/sim/main.cc:
    need this conversion now.
src/sim/sim_object.hh:
    put the enum back into SimObject.
src/sim/system.hh:
    memoryMode is now a part of SimObject, need the ::'s

--HG--
extra : convert_revision : 0ade06957fa57b497798e1f50c237ca1badc821d
2006-10-11 18:53:50 -04:00
Ali Saidi
c60c61b19e Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem.head

--HG--
extra : convert_revision : 326605820dce7641058eb0cdc0ddb2cc9602f67e
2006-10-06 21:46:04 -04:00
Ali Saidi
b7832555d5 system.cc:
Make new_page() check for an out of memory condition

src/sim/system.cc:
    Make new_page() check for an out of memory condition

--HG--
extra : convert_revision : daee82788464fca186eb24285b5f43c9fabc25b3
2006-10-06 21:45:34 -04:00
Lisa Hsu
9c901225f8 there are two main thrusts of this changeset.
1) return the periodicity of checkpoints back into the code (i.e. make m5 checkpoint n m meaningful again).
2) to do this, i had to much around with being able to repeatedly schedule and SimLoopExitEvent, which led to changes in how exit simloop events are handled to make this easier.

src/arch/alpha/isa/decoder.isa:
src/mem/cache/cache_impl.hh:
    modify arg. order for new calling convention of exitSimLoop.
src/cpu/base.cc:
src/sim/main.cc:
src/sim/pseudo_inst.cc:
src/sim/root.cc:
    now, instead of creating a new SimLoopExitEvent, call a wrapper schedExitSimLoop which handles all the default args.
src/sim/sim_events.cc:
src/sim/sim_events.hh:
src/sim/sim_exit.hh:
    add the periodicity of checkpointing back into the code.

    to facilitate this, there are now two wrappers (instead of just overloading exitSimLoop).  exitSimLoop is only for exiting NOW (i.e. at curTick), while schedExitSimLoop schedules and exit event for the future.

--HG--
extra : convert_revision : c61f4bf05517172edd2c83368fd10bb0f0678029
2006-10-06 01:27:02 -04:00