Gabe Black
483c3e96b7
X86: Calculate flags based on the actual result.
2009-02-01 00:08:16 -08:00
Gabe Black
953e4bba59
X86: Set/correct some default values for x86 parameters.
2009-02-01 16:59:34 -08:00
Gabe Black
52defeb4e7
X86: Implement the xadd instruction.
2009-01-25 20:33:27 -08:00
Gabe Black
3c5988b86c
X86: Implement the bswap instruction.
2009-01-25 20:32:43 -08:00
Gabe Black
0449fb2b7a
X86: Fix a bug in the iret microcode.
2009-01-25 20:31:17 -08:00
Gabe Black
389fbfdab1
X86: Make the interrupt object wake up the CPU when something becomes pending.
2009-01-25 20:30:51 -08:00
Gabe Black
d9794784ba
CPU: Add a setCPU function to the interrupt objects.
2009-01-25 20:29:03 -08:00
Nathan Binkert
c9d3113015
tracing: Add help strings for some of the trace flags
2009-01-19 09:59:14 -08:00
Nathan Binkert
8153790d00
SCons: centralize the Dir() workaround for newer versions of scons.
...
Scons bug id: 2006 M5 Bug id: 308
2009-01-13 14:17:50 -08:00
Gabe Black
b23633ad1b
X86: Hook in the M5 pseudo insts.
2009-01-06 23:55:46 -08:00
Gabe Black
115b1a7ed3
X86: Autogenerate macroop generateDisassemble function.
2009-01-06 22:55:27 -08:00
Gabe Black
8cab1805f9
X86: Move the function that prints memory args into the inst base class.
2009-01-06 22:46:28 -08:00
Gabe Black
9e24d8c599
X86: Move the macroop class out of the isa description into C++.
2009-01-06 22:44:59 -08:00
Gabe Black
7b7a72158a
X86: Change indentation on microop disassembly.
2009-01-06 22:40:41 -08:00
Lisa Hsu
993b7be4bb
imported patch aux-fix.patch
2008-12-07 15:07:42 -05:00
Gabe Black
e4790bcbe2
X86: Add add_entry back in.
2008-12-06 14:48:59 -08:00
Lisa Hsu
e2c7618e50
This patch pulls out the auxiliary vector struct from individual ISA
...
LiveProcesses to the base LiveProcess definition so anyone can use them.
2008-12-04 18:03:35 -05:00
Steve Reinhardt
4514f565e3
syscalls: fix latent brk/obreak bug.
...
Bogus calls to ChunkGenerator with negative size were triggering
a new assertion that was added there.
Also did a little renaming and cleanup in the process.
2008-11-15 09:30:10 -08:00
Nathan Binkert
9c49bc7b00
mem: update stuff for changes to Packet and Request
2008-11-10 11:51:17 -08:00
Gabe Black
8c15518f30
X86: Fix completeAcc get call.
2008-11-09 21:55:43 -08:00
Lisa Hsu
d857faf073
Add in Context IDs to the simulator. From now on, cpuId is almost never used,
...
the primary identifier for a hardware context should be contextId(). The
concept of threads within a CPU remains, in the form of threadId() because
sometimes you need to know which context within a cpu to manipulate.
2008-11-02 21:57:07 -05:00
Lisa Hsu
67fda02dda
Make it so that all thread contexts are registered with the System, even in
...
SE. Process still keeps track of the tc's it owns, but registration occurs
with the System, this eases the way for system-wide context Ids based on
registration.
2008-11-02 21:57:06 -05:00
Lisa Hsu
c55a467a06
make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered
...
across the subclasses. generally make it so that member data is _cpuId and
accessor functions are cpuId(). The ID val comes from the python (default -1 if
none provided), and if it is -1, the index of cpuList will be given. this has
passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard
switch.
2008-11-02 21:56:57 -05:00
Nathan Binkert
9836d81c2b
style: Use the correct m5 style for things relating to interrupts.
2008-10-21 07:12:53 -07:00
Ali Saidi
b760b99f4d
O3CPU: Undo Gabe's changes to remove hwrei and simpalcheck from O3 CPU. Removing hwrei causes
...
the instruction after the hwrei to be fetched before the ITB/DTB_CM register is updated in a call pal
call sys and thus the translation fails because the user is attempting to access a super page address.
Minimally, it seems as though some sort of fetch stall or refetch after a hwrei is required. I think
this works currently because the hwrei uses the exec context interface, and the o3 stalls when that occurs.
Additionally, these changes don't update the LOCK register and probably break ll/sc. Both o3 changes were
removed since a great deal of manual patching would be required to only remove the hwrei change.
2008-10-20 16:22:59 -04:00
Nathan Binkert
81f5da1e89
get rid of local variable that's only used in an assert so fast compiles
2008-10-16 22:22:17 -07:00
Gabe Black
3c4567f2a6
X86: Set the delayed commit flag in x86 microops appropriately.
2008-10-12 23:29:10 -07:00
Gabe Black
33ebd04474
X86: Make the local APIC timer event generate an interrupt.
2008-10-12 23:28:49 -07:00
Gabe Black
bdc28d793d
X86: Implement the EOI register in the local APIC.
2008-10-12 23:28:11 -07:00
Gabe Black
fd37688294
X86: Add some DPRINTFs to the local APIC.
2008-10-12 23:27:45 -07:00
Gabe Black
e3004c579f
X86: Fix the segment setting code in IRET, and make it restore the flags.
2008-10-12 23:05:22 -07:00
Gabe Black
349a155b6e
X86: Panic when an unimplemented fault is invoked, rather than spinning forever
2008-10-12 23:00:28 -07:00
Gabe Black
564eda827b
X86: Implement the swapgs instruction.
2008-10-12 23:00:07 -07:00
Gabe Black
a2e0d539d8
X86: Add wrval/rdval microops for reading significant miscregs.
2008-10-12 22:55:55 -07:00
Gabe Black
9e8e2f9ec6
X86: Make the x86 interrupt fault kick off the interrupt microcode.
2008-10-12 22:42:10 -07:00
Gabe Black
4c19c56a77
X86: Implement entering an interrupt in microcode.
2008-10-12 22:42:03 -07:00
Gabe Black
f813a4be49
X86: Make sure register microops set fault rather than returning one.
2008-10-12 22:24:06 -07:00
Gabe Black
961b40cdb5
X86: Implement an wrdh microop which loads bases/offsets from 16 byte descriptors.
2008-10-12 22:16:53 -07:00
Gabe Black
6074b1abf2
X86: Implement local labels for the ROM that actually refer into the ROM.
2008-10-12 20:44:11 -07:00
Gabe Black
6b46e5204d
X86: Implement the chks check of interrupt gate target code segments.
2008-10-12 20:38:22 -07:00
Gabe Black
30feb90c1c
X86: Add a check type for interrupt gates.
2008-10-12 20:33:37 -07:00
Gabe Black
15f5bb3055
X86: Fix chks checking the submode for stack segments.
2008-10-12 20:29:52 -07:00
Gabe Black
9e1fe2050a
X86: Let segment manipulation microops be conditional.
2008-10-12 20:25:06 -07:00
Gabe Black
e9158d763a
X86: Let the microassembler know about the microcode only H segment.
2008-10-12 20:17:38 -07:00
Gabe Black
223fc41c07
X86: Fix the rdbase microop
2008-10-12 20:07:46 -07:00
Gabe Black
f245358343
Get rid of old RegContext code.
2008-10-12 17:57:46 -07:00
Gabe Black
cefb768131
X86: Create a handy way to access labels from the ROM in microcode.
2008-10-12 17:52:51 -07:00
Gabe Black
e5f8092467
X86: Make X86's microcode ROM actually do something.
2008-10-12 17:48:44 -07:00
Gabe Black
2736086d7c
CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
2008-10-12 15:59:21 -07:00
Gabe Black
6fd4eff68f
X86: Create an eret microop which returns from ROM to combinational decoding.
2008-10-12 15:53:04 -07:00
