gem5/src/arch/x86
2009-01-06 23:55:46 -08:00
..
bios X86: Add add_entry back in. 2008-12-06 14:48:59 -08:00
insts X86: Autogenerate macroop generateDisassemble function. 2009-01-06 22:55:27 -08:00
isa X86: Hook in the M5 pseudo insts. 2009-01-06 23:55:46 -08:00
linux syscalls: fix latent brk/obreak bug. 2008-11-15 09:30:10 -08:00
apicregs.hh Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object. 2008-10-12 09:09:56 -07:00
arguments.hh Add build hooks for x86. 2007-03-03 16:01:48 +00:00
cpuid.cc X86: Implement CPUID with a magical function instead of microcode. 2008-10-12 15:31:28 -07:00
cpuid.hh X86: Implement CPUID with a magical function instead of microcode. 2008-10-12 15:31:28 -07:00
emulenv.cc misc: remove #include <cassert> from misc.hh since not everyone needs it. 2008-10-10 10:15:00 -07:00
emulenv.hh X86: Start implementing segmentation support. 2007-08-04 20:12:54 -07:00
faults.cc X86: Make the x86 interrupt fault kick off the interrupt microcode. 2008-10-12 22:42:10 -07:00
faults.hh X86: Panic when an unimplemented fault is invoked, rather than spinning forever 2008-10-12 23:00:28 -07:00
floatregfile.cc X86: Add tracing to the floating point register file. 2007-09-04 23:40:47 -07:00
floatregfile.hh X86: Put in the foundation for x87 stack based fp registers. 2007-09-19 18:26:42 -07:00
floatregs.hh X86: Fix x87 floating point stack register indexing. 2007-10-02 22:57:33 -07:00
interrupts.cc style: Use the correct m5 style for things relating to interrupts. 2008-10-21 07:12:53 -07:00
interrupts.hh style: Use the correct m5 style for things relating to interrupts. 2008-10-21 07:12:53 -07:00
intmessage.hh mem: update stuff for changes to Packet and Request 2008-11-10 11:51:17 -08:00
intregfile.cc Add some dprintfs 2007-06-12 16:22:35 +00:00
intregfile.hh X86: Rework the multiplication microops so that they work like they would in the patent. 2007-09-06 16:27:28 -07:00
intregs.hh X86: Rework the multiplication microops so that they work like they would in the patent. 2007-09-06 16:27:28 -07:00
isa_traits.hh ISA parser: Make the isa parser generate MaxInstSrcRegs and MaxInstDestRegs. 2007-11-08 18:51:50 -08:00
kernel_stats.hh X86: Get X86_FS to compile. 2007-09-24 17:39:56 -07:00
locked_mem.hh Stub implementation for x86 2007-03-05 16:08:18 +00:00
microcode_rom.hh X86: Make X86's microcode ROM actually do something. 2008-10-12 17:48:44 -07:00
miscregfile.cc X86: Make the local APIC accessible through the memory system directly, and make the timer work. 2008-10-12 11:08:00 -07:00
miscregfile.hh Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object. 2008-10-12 09:09:56 -07:00
miscregs.hh X86: Make the local APIC accessible through the memory system directly, and make the timer work. 2008-10-12 11:08:00 -07:00
mmaped_ipr.hh X86: Make the local APIC accessible through the memory system directly, and make the timer work. 2008-10-12 11:08:00 -07:00
pagetable.cc TLB: Fix serialization issues with the tlb entries and make the page table store the process, not the system. 2007-10-25 19:04:44 -07:00
pagetable.hh X86: Work on the page table walker, TLB, and related faults. 2007-11-12 14:38:31 -08:00
pagetable_walker.cc mem: update stuff for changes to Packet and Request 2008-11-10 11:51:17 -08:00
pagetable_walker.hh X86: Separate out the page table walker into it's own cc and hh. 2007-11-12 18:06:57 -08:00
predecoder.cc gcc: Add extra parens to quell warnings. 2008-09-27 21:03:49 -07:00
predecoder.hh misc: remove #include <cassert> from misc.hh since not everyone needs it. 2008-10-10 10:15:00 -07:00
predecoder_tables.cc X86: Hook in the M5 pseudo insts. 2009-01-06 23:55:46 -08:00
process.cc imported patch aux-fix.patch 2008-12-07 15:07:42 -05:00
process.hh This patch pulls out the auxiliary vector struct from individual ISA 2008-12-04 18:03:35 -05:00
regfile.cc Get rid of old RegContext code. 2008-10-12 17:57:46 -07:00
regfile.hh Get rid of old RegContext code. 2008-10-12 17:57:46 -07:00
remote_gdb.cc arch: TheISA shouldn't really ever be used in the arch directory. 2008-09-27 21:03:46 -07:00
remote_gdb.hh Add in NumGDBRegs so the constructor to the base class can get all it's arguments. 2007-03-05 17:58:15 +00:00
SConscript X86: Implement entering an interrupt in microcode. 2008-10-12 22:42:03 -07:00
SConsopts Rework the way SCons recurses into subdirectories, making it 2007-03-10 23:00:54 -08:00
segmentregs.hh X86: Reorganize segmentation and implement segment selector movs. 2007-12-01 23:03:39 -08:00
stacktrace.cc Remove delVirtPort() and make getVirtPort() only return cached version. 2008-07-01 10:25:07 -04:00
stacktrace.hh Filled in a stub header file for a stacktrace object. I'm still not sure what this is for, and it probably doesn't work on anything but Alpha. 2007-03-05 14:52:28 +00:00
syscallreturn.hh X86: Make x86 syscall return just stuff the return value in eax. 2007-08-29 20:29:18 -07:00
system.cc X86: Create SimObjects in python and C++ to represent the ACPI system description tables. 2008-10-10 23:43:33 -07:00
system.hh X86: Create SimObjects in python and C++ to represent the ACPI system description tables. 2008-10-10 23:43:33 -07:00
tlb.cc mem: update stuff for changes to Packet and Request 2008-11-10 11:51:17 -08:00
tlb.hh X86: Put in initial implementation of the local APIC. 2008-02-26 23:39:53 -05:00
types.hh Get rid of old RegContext code. 2008-10-12 17:57:46 -07:00
utility.cc X86: Make the local APIC accessible through the memory system directly, and make the timer work. 2008-10-12 11:08:00 -07:00
utility.hh X86: Make initCPU and startupCPU do something basic. 2007-10-07 18:10:42 -07:00
vtophys.cc X86: Get X86_FS to compile. 2007-09-24 17:39:56 -07:00
vtophys.hh X86: Start implementing the x86 tlb which will handle segmentation permission and limit checks and paging. 2007-10-02 23:00:37 -07:00
x86_traits.hh X86: Fix the ordering of special physical address ranges. 2008-10-12 14:01:06 -07:00
X86LocalApic.py X86: Make APICs communicate through the memory system. 2008-10-12 13:28:54 -07:00
X86System.py X86: Create SimObjects in python and C++ to represent the ACPI system description tables. 2008-10-10 23:43:33 -07:00
X86TLB.py TLB: Make all tlbs derive from a common base class in both python and C++. 2008-10-10 23:47:42 -07:00