Korey Sewell
1c8dfd9254
inorder-alpha-port: initial inorder support of ALPHA
...
Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions
* * *
Remove namespace from header file. Causes compiler issues that are hard to find
* * *
Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time
* * *
Expose memory access size and flags through instruction object
(temporarily memAccSize and memFlags to get TLB stuff working.)
2009-05-12 15:01:13 -04:00
Korey Sewell
63db33c4b1
isa-parser: made a few changes, but not author-worthy
2009-05-12 15:01:13 -04:00
Gabe Black
7146eb79f1
X86: Precompute the default and alternate address and operand size and the stack size.
2009-04-26 16:49:24 -07:00
Gabe Black
b6bfe8af26
X86: Split out the internal memory space from the regular translate() and precompute mode.
2009-04-26 16:48:44 -07:00
Gabe Black
4ee34dfb4e
X86: Centralize updates to the handy M5 reg.
2009-04-26 16:47:48 -07:00
Gabe Black
2f34a7eaeb
X86: Tell the function that sends int messages who to send to instead of figuring it out itself.
2009-04-26 02:09:27 -07:00
Gabe Black
88ab4bb257
X86: Make the local APICs register themselves with the IO APIC.
...
This is a hack so that the IO APIC can figure out information about the local
APICs. The local APICs still have no way to find out about each other.
Ideally, when the local APICs update state that's relevant to somebody else,
they'd send an update to everyone. Without being able to do a broadcast, that
would still require knowing who else there is to notify. Other broadcasts are
implemented using assumptions that may not always be true.
2009-04-26 02:09:13 -07:00
Gabe Black
c5e2cf841d
X86: Record the initial APIC ID which identifies an APIC in M5.
...
The ID as exposed to software can be changed. Tracking those changes in M5
would be cumbersome, especially since there's no guarantee the IDs will remain
unique.
2009-04-26 02:06:21 -07:00
Gabe Black
9d0fa27d09
SPARC: Tighten up the clone system call and SPARCs copyRegs.
2009-04-24 23:11:21 -07:00
Gabe Black
ee7055c289
X86: Put the StoreCheck flag with the others, and don't collide with other flags.
2009-04-23 01:43:00 -07:00
Nathan Binkert
43c7698f49
arm: include missing file for arm
2009-04-21 15:40:26 -07:00
Nathan Binkert
50f1570352
arm: Unify the ARM tlb. We forgot about this when we did the rest.
...
This code compiles, but there are no tests still
2009-04-21 15:40:25 -07:00
Steve Reinhardt
52b6764f31
syscall: Resolve conflicts between m5threads and Gabe's recent SE changes.
2009-04-21 08:17:36 -07:00
Daniel Sanchez
b0e9654f86
Commit m5threads package.
...
This patch adds limited multithreading support in syscall-emulation
mode, by using the clone system call. The clone system call works
for Alpha, SPARC and x86, and multithreaded applications run
correctly in Alpha and SPARC.
2009-04-21 08:17:36 -07:00
Gabe Black
089b384086
X86: Fix the functions that manipulate large bit arrays in the local APIC.
2009-04-19 13:47:15 -07:00
Gabe Black
eee74ba427
X86: Fix up a copyright.
2009-04-19 13:17:35 -07:00
Gabe Black
6910baa015
X86: Fix how the TLB handles the storecheck flag.
2009-04-19 04:57:51 -07:00
Gabe Black
0a6ff60caa
X86: Recognize and handle the lock legacy prefix.
2009-04-19 04:57:28 -07:00
Gabe Black
61edc9ba66
X86: Implement a locking version of XADD.
2009-04-19 04:56:49 -07:00
Gabe Black
209cfc89fd
X86: Implement a locking version of BTC.
2009-04-19 04:56:45 -07:00
Gabe Black
e475cf85f0
X86: Implement a locking version of BTR.
2009-04-19 04:56:43 -07:00
Gabe Black
43f58927d6
X86: Implement a locking version of CMPXCHG.
2009-04-19 04:56:40 -07:00
Gabe Black
b493906eb9
X86: Implement a locking version of BTS.
2009-04-19 04:56:36 -07:00
Gabe Black
985d959ea6
X86: Implement a locking version of DEC.
2009-04-19 04:56:34 -07:00
Gabe Black
4f2d4f466a
X86: Implement a locking version of INC.
2009-04-19 04:56:31 -07:00
Gabe Black
2394f73f90
X86: Implement a locking version of NEG.
2009-04-19 04:56:28 -07:00
Gabe Black
9b9b7a412c
X86: Implement a locking version of NOT.
2009-04-19 04:56:25 -07:00
Gabe Black
b8f81c62a2
X86: Implement a locking version of XCHG.
2009-04-19 04:56:22 -07:00
Gabe Black
750f5a0a67
X86: Implement a locking version of XOR.
2009-04-19 04:56:20 -07:00
Gabe Black
cfb289ebeb
X86: Implement a locking version of SUB.
2009-04-19 04:56:16 -07:00
Gabe Black
789b3191b9
X86: Implement a locking version of AND.
2009-04-19 04:56:14 -07:00
Gabe Black
e742cad6f4
X86: Implement a locking version of SBB.
2009-04-19 04:56:11 -07:00
Gabe Black
193265c6e5
X86: Implement a locking version of ADC.
2009-04-19 04:56:08 -07:00
Gabe Black
2f607b882c
X86: Implement a locking version of OR.
2009-04-19 04:56:06 -07:00
Gabe Black
a7f79c9049
X86: Implement a locking version of ADD.
2009-04-19 04:56:02 -07:00
Gabe Black
d90456a486
X86: Implement the stul microop.
...
This microop does a store and unlocks the requested address. The RISC86
microop ISA doesn't seem to have an equivalent to this, so I'm guessing that
the store following an ldstl is automatically unlocking. We don't do it this
way for performance reasons since the behavior is the same.
2009-04-19 04:55:58 -07:00
Gabe Black
d2554ff030
X86: Implement the ldstl microop.
...
This microop does a load, checks that a store would succeed, and locks the
requested address.
2009-04-19 04:55:43 -07:00
Gabe Black
3e5f487663
Memory: Rename LOCKED for load locked store conditional to LLSC.
2009-04-19 04:25:01 -07:00
Gabe Black
ca85981478
SE mode: Make keeping track of the number of syscalls less hacky.
2009-04-19 04:15:32 -07:00
Gabe Black
5f164ba720
X86: Actually handle 16 bit mode modrm.
2009-04-19 04:14:31 -07:00
Gabe Black
93cccf7d19
X86: Make the TEST instruction set all the flags it's supposed to.
2009-04-19 04:14:16 -07:00
Gabe Black
f82c123242
X86: Implement broadcast IPIs.
2009-04-19 04:14:01 -07:00
Gabe Black
829e424353
X86: Fix the ordering of the vendor string reported by CPUID.
2009-04-19 04:13:45 -07:00
Gabe Black
18b3863127
X86: Only recognize the first startup IPI after INIT or reset.
2009-04-19 03:56:36 -07:00
Gabe Black
4d32cd10ce
X86: Use recvResponse to implement the idle bit in the Local APIC ICR.
2009-04-19 03:56:24 -07:00
Gabe Black
bdda224d41
X86: Add a function which gets called when an interrupt message has been delivered.
2009-04-19 03:54:11 -07:00
Gabe Black
3eed59768c
X86: Explicitly use the right width in a few places that need a 64 bit value.
2009-04-19 03:47:59 -07:00
Gabe Black
8761057c78
X86: Keep track of the pioAddr for the local APIC.
2009-04-19 03:47:12 -07:00
Gabe Black
038225a6ca
X86: Implement far jmp.
2009-04-19 03:42:41 -07:00
Gabe Black
3b1b21cb15
X86: Some segment selectors can be used when "NULL".
2009-04-19 03:41:10 -07:00
