Korey Sewell 1c8dfd9254 inorder-alpha-port: initial inorder support of ALPHA ... Edit AlphaISA to support the inorder model. Mostly alternate constructor functions and also a few skeleton multithreaded support functions * * * Remove namespace from header file. Causes compiler issues that are hard to find * * * Separate the TLB from the CPU and allow it to live in the TLBUnit resource. Give CPU accessor functions for access and also bind at construction time * * * Expose memory access size and flags through instruction object (temporarily memAccSize and memFlags to get TLB stuff working.)		2009-05-12 15:01:13 -04:00
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alpha	inorder-alpha-port: initial inorder support of ALPHA	2009-05-12 15:01:13 -04:00
arm	arm: include missing file for arm	2009-04-21 15:40:26 -07:00
mips	inorder-alpha-port: initial inorder support of ALPHA	2009-05-12 15:01:13 -04:00
sparc	SPARC: Tighten up the clone system call and SPARCs copyRegs.	2009-04-24 23:11:21 -07:00
x86	X86: Precompute the default and alternate address and operand size and the stack size.	2009-04-26 16:49:24 -07:00
isa_parser.py	isa-parser: made a few changes, but not author-worthy	2009-05-12 15:01:13 -04:00
isa_specific.hh	style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs	2008-09-10 14:26:15 -04:00
micro_asm.py	Microcode: Fix a silent typo error in the microcode assembler.	2008-10-09 00:07:38 -07:00
micro_asm_test.py	Add a second section to make sure the ROM is extended properly.	2007-05-31 22:21:21 +00:00
SConscript	inorder-alpha-port: initial inorder support of ALPHA	2009-05-12 15:01:13 -04:00