Commit graph

76 commits

Author SHA1 Message Date
Lionel Sambuc
c3fc9df84a Adding ipc_ prefix to ipc primitives
* Also change _orig to _intr for clarity
 * Cleaned up {IPC,KER}VEC
 * Renamed _minix_kernel_info_struct to get_minix_kerninfo
 * Merged _senda.S into _ipc.S
 * Moved into separate files get_minix_kerninfo and _do_kernel_call
 * Adapted do_kernel_call to follow same _ convention as ipc functions
 * Drop patches in libc/net/send.c and libc/include/namespace.h

Change-Id: If4ea21ecb65435170d7d87de6c826328e84c18d0
2014-03-01 09:05:01 +01:00
David van Moolenbroek
36ac0dbcf8 Take LOG out of the boot image
Change-Id: Id2629776b53aae46629b04a42c15cbbacac9b949
2014-03-01 09:04:55 +01:00
David van Moolenbroek
8fea5ab8bd Kernel: make SIGKMESS target process list dynamic
The set of processes to which a SIGKMESS signal is sent whenever new
diagnostics messages are added to the kernel's message buffer, is now
no longer hardcoded. Instead, processes can (un)register themselves
to receive such notifications, by means of sys_diagctl().

Change-Id: I9d6ac006a5d9bbfad2757587a068fc1ec3cc083e
2014-03-01 09:04:54 +01:00
Lionel Sambuc
9fab85c2de Replacing timer_t by netbsd's timer_t
* Renamed struct timer to struct minix_timer
 * Renamed timer_t to minix_timer_t
 * Ensured all the code uses the minix_timer_t typedef
 * Removed ifdef around _BSD_TIMER_T
 * Removed include/timers.h and merged it into include/minix/timers.h
 * Resolved prototype conflict by renaming kernel's (re)set_timer
   to (re)set_kernel_timer.

Change-Id: I56f0f30dfed96e1a0575d92492294cf9a06468a5
2014-03-01 09:04:54 +01:00
Lionel Sambuc
cfd3379bb1 Removing CSU patches
* Removed startup code patches in lib/csu regarding kernel to userland
   ABI.

 * Aligned stack layout on NetBSD stack layout.

 * Generate valid stack pointers instead of offsets by taking into account
   _minix_kerninfo->kinfo->user_sp.

 * Refactored stack generation, by moving part of execve in two
   functions {minix_stack_params(), minix_stack_fill()} and using them
   in execve(), rs and vm.

 * Changed load offset of rtld (ld.so) to:
      execi.args.stack_high - execi.args.stack_size - 0xa00000
   which is 10MB below the main executable stack.

Change-Id: I839daf3de43321cded44105634102d419cb36cec
2014-02-18 11:25:02 +01:00
Thomas Veerman
c1a31d53d9 stat.h: remove some big_ types
Change-Id: I84017db3d54edfb823cc52e02d0b07fccb003988
2014-02-18 11:25:01 +01:00
Kees Jongenburger
3df19a0671 arm-refactor:document ARM assembly code.
Change-Id: I8540a09cdaf45431ad163954ce41d36f4b72cad5
2014-02-12 13:47:49 +01:00
Kees Jongenburger
7e11828c6e arm:create SoC specific bsp directory and move code to there.
Created a new directory called bsp (board support package) to hold
board or system on chip specific code. The idea is the following.

Change-Id: Ica5886806940facae2fa5492fcc938b3c2b989be
2014-02-07 11:14:39 +01:00
Kees Jongenburger
502bc37a61 arm:indenting
Change-Id: I2f8f664fa4c66649db8981e58e6bb7a6f533df5a
2014-01-07 11:18:26 +01:00
Kees Jongenburger
aa94c9ed55 arm:switch to dynamic configuration for the kernel.
During startup machine.board_id is now determined. The kernel can now
at runtime determine how to configure itself and does so.

Change-Id: I4f615af9bfa5add219e618b911a51af127591d6a
2013-12-17 11:32:38 +01:00
Kees Jongenburger
3a2fb1ae8c arm:determine board_id using bootargs.board_name
On startup determine the board_id based on the board name
passed from u-boot. This code also export "board" for use
by  userland using sysenv.

Change-Id: I1064a49497c82b06f50d98650132bc0a7f543568
2013-12-17 11:32:38 +01:00
Kees Jongenburger
8c02dd7b2a arm:refactor replace cmdline.txt by bootargs passed to the kernel.
Put the boot arguments in uEnv.txt and not in cmdline.txt to allow
a more dynamic configuration of the system. We now also pass the
u-boot board_name parameter to the kernel.
2013-12-17 11:32:37 +01:00
Kees Jongenburger
7194772eae kernel:export board to userland.
Export the board variable to userland using sysenv. This
allows rc-scrips to perform device specific initialisation.

The board variable follows the following pattern

[ARCH]-[ARCHVARIANT]-[VENDOR]-[BOARD]-[BOARDVARIANT]

We currently we support the following boards:
X86-I586-GENERIC-GENERIC-GENERIC
ARM-ARMV7-TI-BBXM-GENERIC
ARM-ARMV7-TI-BB-WHITE
ARM-ARMV7-TI-BB-BLACK

Change-Id: I9e5f5f24f9a71cc9797cacb1aafb19499613f0be
2013-12-03 09:19:50 +01:00
Gerard
f1b0deacf3 Replaced add64, add64u and add64ul with operators.
Change-Id: Ia537f83e15cb686f1b81b34d73596f4298b0a924
2013-11-13 13:11:33 +00:00
Thomas Cort
9f23acf410 kernel: spelling fixes
Change-Id: I73c759bdef98be35be77130895ae0ec497e1b954
2013-10-09 20:24:17 -04:00
Kees Jongenburger
ed45d98dac arm:ensure read_tsc_64 always returns a valid value.
Before this change overflowing the free running clock counter
between the time the timer was read and the time the overflow
check was done resulted in read_tsc_64 returning a to high value.

Change-Id: I1022f271213647f720477c4121d45f0c965456c6
2013-09-27 11:29:04 +02:00
Kees Jongenburger
d60d07f045 arm:caching enable barriers
Change-Id: I2c54a3c3c8f0502bf365901d771a989f7c556958
2013-09-26 12:11:29 +02:00
Kees Jongenburger
400e577fd5 arm:caching clean caches before setting up mappings.
Change-Id: I9ff1bb04ea9c0adeb76e5176526448d93bfe29f5
2013-09-26 12:11:29 +02:00
Kees Jongenburger
34b517ab12 arm:caching mark normal memory cacheable during identity mapping.
Change-Id: I7cd8da168744a3f32276803e99e8af0fea772574
2013-09-26 12:11:28 +02:00
Kees Jongenburger
2830a5af5c arm:perform copy operation using same cacheability.
When copying data from cacheable memory also use cacheable
attributes when creating temporary mappings.

Change-Id: I0e8380293fb4edaafba49f6262983ad86a5350c5
2013-09-26 11:54:36 +02:00
Kees Jongenburger
0d02dc9d54 arm:make the MMU fetch pagetable data through the caches.
Change-Id: Ibd7b66558c369d0c0792c02801562580d255fa1f
2013-09-26 11:54:36 +02:00
Kees Jongenburger
827378c57f arm:caching add methods to flush the data and unified cache
Change-Id: Idb066dd01afbdbccd684bcdcf4af88b4b1ef870a
2013-09-26 11:54:36 +02:00
Kees Jongenburger
0f23130180 arm:caching introduce _CACHED defines
Introduce ARM_VM_SECTION_CACHED and ARM_VM_PTE_CACHED to ensure we
are using the correct caching flags everywhere.
2013-09-26 11:54:36 +02:00
Kees Jongenburger
b98441772c arm:vm map free running clock uncached. 2013-09-26 09:08:13 +02:00
Kees Jongenburger
a88bc73e4c arm:allow to lookup physical addresses of sections.
Change-Id: If4716b81cceee5d8b30d5f103b772b0ac99fc807
2013-09-26 09:07:36 +02:00
Kees Jongenburger
b1a7d4d7ea arm:misc fix remove const modifier for value that changes.
Change-Id: I4ac96acdc66ea203a339108225c07c68959556c0
2013-09-26 09:06:24 +02:00
Kees Jongenburger
e4be0ceecf arm:timer changes.
* Allow to change the timer frequency using the hz paramter.
* Unmask the interrupt only after registering the handler.
* Pass the hz parameter in the command line.
2013-09-26 09:05:44 +02:00
Ben Gras
74bc88581c enable fatal warnings
. kernel: fix some arm warnings
	. turn of fatal warnings for texinfo

Change-Id: I71e228c87a7226adbbd940ccb1439e042d7b6e9a
2013-09-01 12:59:37 +00:00
Thomas Cort
9f4b8dc11b kernel: move do_padconf and add a test case
padconf is specific to arm, so it's being moved to kernel/arch/earm.

Add a test case to ensure the proper error is returned on non-ARM
systems.

Change-Id: I07ebbe64825d59bc0ef9c818d3d54891dafb4419
2013-08-29 09:23:10 -04:00
Thomas Cort
4593804bf0 kernel: add padconf kernel call
On the AM335X, writes to the padconf registers must be done in privileged
mode. To allow userspace drivers to dynamically change the padconf at
runtime, a kernel call has been added.

Change-Id: I4b25d2879399b1785a360912faa0e90b5c258533
2013-08-28 12:53:05 -04:00
Ben Gras
c8f3b10909 fix a few more minix specific warnings
. also disable stack protection feature for gcc,
	  causes build errors for pkgsrc gcc on minix

Change-Id: I1c6e2bcb4d948098d642543d7b2711284ee55c72
2013-08-27 16:16:03 +00:00
Igor Smolyar
3ef93645b9 Use ARM_VM_SECTION_MASK to determine kernel base address
To map kernel we use 1M sections therefore we should use
ARM_VM_SECTION_MASK to determine base address.

Change-Id: I0b97fe459f2325d702aad9b7b1e8e066d9721b87
2013-08-19 09:53:25 +02:00
Lukasz Hryniuk
06154a34a4 Some more 64bit function eradication.
. Replace 64bit funcions with operators in arch_clock.c
  . Replace 64bit funcions with operators in proc.c
  . Replace 64bit funcions with operators in vbox.c
  . Replace 64bit funcions with operators in driver.c
  . Eradicates is_zero64, make_zero64, neg64

Change-Id: Ie4e1242a73534f114725271b2e2365b2004cb7b9
2013-08-07 12:35:53 +00:00
Antoine Leca
da82f9b2e8 <a.out.h>, MINIX style: remove as obsolete
Change-Id: Icc8b7210d60a93ac9cc4610d676dcba270756410
2013-08-06 11:43:35 +02:00
Thomas Cort
6c6123d857 kernel: implement reboot for am335x/dm37xx
Change-Id: Ied288326b9af8f31223b2dd76a064e32c9a03c45
2013-08-05 10:23:00 -04:00
Thomas Cort
6d7eff8023 kernel: add support for am335x PMIC-base power-off
AM335X SoCs support power-off via a power management
chip (PMIC). An alarm in the real time clock is used
to trigger the PMIC to cut the power.

To ensure the alarm goes off when the system is in
a safe state, the RTC is frozen when the alarm is
set. At the last moment, the kernel unfreezes the RTC
to let the alarm go off.

This patch adds a mini driver for unfreezing the RTC
as well as code to handle RBT_POWEROFF on Minix/arm.

Change-Id: I7d48e75791e3a81bdd2f7704997193a269409fe8
2013-08-05 10:22:59 -04:00
Thomas Cort
2dab6a5384 kernel: i2c padconf workaround
The padconf library runs in user mode, but to actually affect the
padconf register contents, the processor has to be in privileged
mode. A full server based solution will be developed, but for now
just set the pinmux in the kernel at boot.

Change-Id: I170ed54dae64b27cd9bd8807445231598fb8e3e1
2013-07-15 11:11:13 -04:00
Ben Gras
bb268230c4 kernel: maintain stack alignment
. 'fixes' 64-bit varargs (i.e. printf("%llu", ..)) argument
	  retrieval bug
2013-06-25 09:53:15 +00:00
Ben Gras
cdf2f55a90 kernel, arm ucontext: ARM DBG=-g run fixes
kernel:
	. modules can be as big as the space (8MB) between them
	  instead of 4MB; memory is slightly bigger with DBG=-g

arm ucontext:
	. r4 is clobbered by the restore function, as it's
	  used as a scratch register, causing problems for the
	  DBG=-g build
	. r1-r3 are safe for scratch registers, as they are
	  caller-save, so use r3 instead; and don't bother
	  restoring r1-r3, but preserve r4

vfs:
	. improve TLL pointer sanity check a bit

Change-Id: I0e3cfc367fdc14477e40d04b5e044f288ca4cc7d
2013-06-24 16:57:30 +02:00
Ben Gras
8e7c0604bd arm timer fix
. set 'done' once initialized so 32-bit read frc works,
	  thanks to keesj
	. make sure the software-implemented upper 32 bit of the 64-bit
	  "tsc" value works OK by adding an assert in one of its calls

Change-Id: I5ce24fea919f4610c6a86ac7ec9f04b1815620c2
2013-06-19 13:11:32 +02:00
Ben Gras
5bc48ef12e kernel, libsys: make it arm-target-independent
. by making the address and frequency of the
	  free running clock kinfo members, set at runtime
	  in the kernel, instead of compile time constants
	  in libsys

Change-Id: I4a8387302d4d3ffd47d2448525725683a74c9a4f
2013-06-17 09:55:36 +02:00
Kees Jongenburger
a2fcba659c arm:remove pre 1:1 mapping workarounds.
Change-Id: I5a690cf5a561cdca9b9c1f031402f80fd203c92d
2013-06-12 16:42:20 +02:00
Kees Jongenburger
a5a693a046 arm:no longer rely on a 1:1 phys mapping for device memory.
Change-Id: Ie3f61069f882c37dbb81dee813fdfd883e7468cf
2013-06-12 16:42:12 +02:00
Anton Kuijsten
1d71e39b73 Gold linker support for entire source tree 2013-06-11 22:51:02 +02:00
Kees Jongenburger
3139ce9631 arm:omap timers remove hardcoded base address.
Omap timers remove hardcoded base address and add some initial
support for the beaglebone's timers. Frclock_util will need
refactoring to remain independent of the ARM flavour.

Change-Id: I2b5d04e930364262c81b5686de634c0a51796b23
2013-05-24 14:03:14 +02:00
Kees Jongenburger
534b19187e arm:configure tick per ms to reflect the free running clock.
Change-Id: Ifc02658d6ae48dd01a868bfaa3d60f77bc6cc800
2013-05-24 13:59:04 +02:00
Kees Jongenburger
2856cec5b9 arm:interupt handling remove hardcoded base address.
Remove hardcoded base address for the omap interrupt handler and add
interrupt names for AM335X in omap_intr.h.

Change-Id: Ie606d8612f55990d55f9db655583052f53950e8e
2013-05-24 13:59:04 +02:00
Kees Jongenburger
c40df92bf2 arm:add AM335X serial
Change-Id: I728622ddd4f59529d15e8ac2499c41fa815eee3b
2013-05-24 11:17:52 +02:00
Kees Jongenburger
69dc6a4f15 arm:keep kernel and modules in the first 256MB of memory.
Keep kernel and modules in the first 256MB of memory in preparation
for the beaglebone. That target only has 256 MB of memory.

Change-Id: I3d92247b5d4e5d3aab7388fe01c2f5713d6a4593
2013-05-24 11:17:52 +02:00
Kees Jongenburger
571ea5b4d7 arm:remove hardcoded base address for the in kernel serial.
Removed hardcoded base address for in kernel serial. This will ease
porting to different boards and allow us to remap i/o at later stage.

Change-Id: I4a4e00ed2aa2f94dfe928dc43a6816d3b94576b7
2013-05-24 11:17:52 +02:00