arm:create SoC specific bsp directory and move code to there.

Created a new directory called bsp (board support package) to hold
board or system on chip specific code. The idea is the following.

Change-Id: Ica5886806940facae2fa5492fcc938b3c2b989be

kernel/Makefile

@@ -39,6 +39,7 @@ CPPFLAGS+= -I${.OBJDIR}/..
 # Machine-dependent headers, order is important! 
 CPPFLAGS+= -I${.CURDIR}/arch/${MACHINE_ARCH}
 CPPFLAGS+= -I${.CURDIR}/arch/${MACHINE_ARCH}/include
+CPPFLAGS+= -I${.CURDIR}/arch/${MACHINE_ARCH}/bsp/include
 CPPFLAGS+= -I${NETBSDSRCDIR}/include/arch/${MACHINE_ARCH}/include
 
 .include "system/Makefile.inc"

kernel/arch/earm/Makefile.inc

@@ -48,24 +48,28 @@ CPPFLAGS._errno.c+= -I ${NETBSDSRCDIR}/lib/libc/include
 CPPFLAGS.assert.c+= -I ${NETBSDSRCDIR}/lib/libc/include
 CPPFLAGS.findfp.c+= -I ${NETBSDSRCDIR}/lib/libc/include
 
+
+
+.PATH: ${NETBSDSRCDIR}/include/arch/${MACHINE_ARCH}/bsp/include
+.include "bsp/ti/Makefile.inc"
+
 # some object files we give a symbol prefix (or namespace) of __k_unpaged_
 # that must live in their own unique namespace.
 #
 .for unpaged_obj in head.o pre_init.o direct_tty_utils.o \
-	pg_utils.o klib.o omap_serial.o omap_rtc.o utility.o arch_reset.o \
-	omap_reset.o \
-	${MINLIB_OBJS_UNPAGED} ${MINC_OBJS_UNPAGED} ${SYS_OBJS_UNPAGED}
+	pg_utils.o klib.o utility.o arch_reset.o \
+	${MINLIB_OBJS_UNPAGED} ${MINC_OBJS_UNPAGED} ${SYS_OBJS_UNPAGED} ${BSP_OBJS_UNPAGED}
 unpaged_${unpaged_obj}: ${unpaged_obj}
 	${OBJCOPY} --prefix-symbols=__k_unpaged_ ${.OBJDIR}/${unpaged_obj} $@
 UNPAGED_OBJS += unpaged_${unpaged_obj}
 ORIG_UNPAGED_OBJS += ${unpaged_obj}
 .endfor
 
+
 CLEANFILES+= ${ORIG_UNPAGED_OBJS}
 
 SRCS+=	mpx.S arch_clock.c arch_do_vmctl.c arch_system.c do_padconf.c \
-	omap_serial.c omap_timer.c omap_padconf.c omap_intr.c omap_rtc.c \
-	omap_reset.c exception.c klib.S memory.c \
+	exception.c hw_intr.c klib.S memory.c \
 	protect.c direct_tty_utils.c arch_reset.c \
 	pg_utils.c phys_copy.S phys_memset.S exc.S
 OBJS.kernel+=	${UNPAGED_OBJS}

kernel/arch/earm/arch_clock.c

@@ -19,15 +19,14 @@
 #include "kernel/smp.h"
 #endif
 
-#include "omap_timer.h"
-#include "omap_intr.h"
+#include "bsp_timer.h"
+#include "bsp_intr.h"
 
 static unsigned tsc_per_ms[CONFIG_MAX_CPUS];
 
 int init_local_timer(unsigned freq)
 {
-	omap3_timer_init(freq);
-	omap3_frclock_init();
+	bsp_timer_init(freq);
 
 	if (BOARD_IS_BBXM(machine.board_id)) {
 		tsc_per_ms[0] = 16250;
@@ -42,12 +41,12 @@ int init_local_timer(unsigned freq)
 
 void stop_local_timer(void)
 {
-	omap3_timer_stop();
+	bsp_timer_stop();
 }
 
 void arch_timer_int_handler(void)
 {
-	omap3_timer_int_handler();
+	bsp_timer_int_handler();
 }
 
 void cycles_accounting_init(void)
@@ -123,7 +122,7 @@ void restart_local_timer(void)
 
 int register_local_timer_handler(const irq_handler_t handler)
 {
-	return omap3_register_timer_handler(handler);
+	return bsp_register_timer_handler(handler);
 }
 
 u64_t ms_2_cpu_time(unsigned ms)

kernel/arch/earm/arch_reset.c

@@ -15,9 +15,8 @@
 
 #include "archconst.h"
 #include "arch_proto.h"
-#include "serial.h"
-#include "omap_rtc.h"
-#include "omap_reset.h"
+#include "bsp_reset.h"
+#include "bsp_serial.h"
 #include "kernel/proc.h"
 #include "kernel/debug.h"
 #include "direct_utils.h"
@@ -35,7 +34,7 @@ halt_cpu(void)
 void
 reset(void)
 {
-	omap3_reset();
+	bsp_reset(); /* should not exit */
 	direct_print("Reset not supported.");
 	while (1);
 }
@@ -43,26 +42,7 @@ reset(void)
 void
 poweroff(void)
 {
-
-/*
- * The am335x can signal an external power management chip to cut the power
- * by toggling the PMIC_POWER_EN pin. It might fail if there isn't an
- * external PMIC or if the PMIC hasn't been configured to respond to toggles.
- * The only way to pull the pin low is via ALARM2 (see TRM 20.3.3.8).
- * At this point PM should have already signaled readclock to set the alarm.
- */
- if (BOARD_IS_BB(machine.board_id)) {
-	/* Powers down the SoC within 3 seconds */
-	direct_print("PMIC Power-Off in 3 Seconds\n");
-
-	/* rtc was frozen to prevent premature power-off, unfreeze it now */
-	omap3_rtc_run();
-
-	/* wait for the alarm to go off and PMIC to disable power to SoC */
-	while (1);
-
-  }
-
+	bsp_poweroff();
 	/* fallback option: hang */
 	direct_print("Unable to power-off this device.");
 	while (1);
@@ -97,7 +77,7 @@ arch_shutdown(int how)
 void
 ser_putc(char c)
 {
-	omap3_ser_putc(c);
+	bsp_ser_putc(c);
 }
 
 #endif

kernel/arch/earm/arch_system.c

@@ -14,19 +14,16 @@
 
 #include "archconst.h"
 #include "arch_proto.h"
-#include "serial.h"
 #include "kernel/proc.h"
 #include "kernel/debug.h"
-#include "omap_ccnt.h"
-#include "omap_padconf.h"
-#include "omap_rtc.h"
-#include "omap_reset.h"
+#include "ccnt.h"
+#include "bsp_init.h"
+#include "bsp_serial.h"
 
 #include "glo.h"
 
 void * k_stacks;
 
-static void ser_init(void);
 
 void fpu_init(void)
 {
@@ -112,31 +109,22 @@ void arch_init(void)
 	tss_init(0, get_k_stack_top(0));
 #endif
 
-	ser_init();
 
         /* enable user space access to cycle counter */
         /* set cycle counter to 0: ARM ARM B4.1.113 and B4.1.117 */
         asm volatile ("MRC p15, 0, %0, c9, c12, 0\t\n": "=r" (value));
-        value |= OMAP_PMCR_C; /* Reset counter */
-        value |= OMAP_PMCR_E; /* Enable counter hardware */
+        value |= PMU_PMCR_C; /* Reset counter */
+        value |= PMU_PMCR_E; /* Enable counter hardware */
         asm volatile ("MCR p15, 0, %0, c9, c12, 0\t\n": : "r" (value));
 
         /* enable CCNT counting: ARM ARM B4.1.116 */
-        value = OMAP_PMCNTENSET_C; /* Enable PMCCNTR cycle counter */
+        value = PMU_PMCNTENSET_C; /* Enable PMCCNTR cycle counter */
         asm volatile ("MCR p15, 0, %0, c9, c12, 1\t\n": : "r" (value));
 
         /* enable cycle counter in user mode: ARM ARM B4.1.124 */
-        value = OMAP_PMUSERENR_EN;
+        value = PMU_PMUSERENR_EN;
         asm volatile ("MCR p15, 0, %0, c9, c14, 0\t\n": : "r" (value));
-
-	/* map memory for padconf */
-	arch_padconf_init();
-
-	/* map memory for rtc */
-	omap3_rtc_init();
-
-	/* map memory for reset control */
-	omap3_reset_init();
+	bsp_init();
 }
 
 /*===========================================================================*
@@ -188,8 +176,9 @@ void get_randomness(struct k_randomness *rand, int source)
 {
 }
 
-static void ser_init(void)
+void arch_ser_init(void)
 {
+	bsp_ser_init();
 }
 
 /*===========================================================================*/

kernel/arch/earm/bsp/include/bsp_init.h

@@ -0,0 +1,7 @@
+#ifndef _BSP_INIT_H_
+#define _BSP_INIT_H_
+
+/* BSP init */
+void bsp_init();
+
+#endif /* __BSP_INIT_H__ */

kernel/arch/earm/bsp/include/bsp_intr.h

@@ -0,0 +1,12 @@
+#ifndef _BSP_INTR_H_
+#define _BSP_INTR_H_
+
+#ifndef __ASSEMBLY__
+
+void bsp_irq_unmask(int irq);
+void bsp_irq_mask(int irq);
+void bsp_irq_handle(void);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _BSP_INTR_H_ */

kernel/arch/earm/bsp/include/bsp_padconf.h

@@ -0,0 +1,11 @@
+#ifndef _BSP_PADCONF_H_
+#define _BSP_PADCONF_H_
+
+#ifndef __ASSEMBLY__
+
+void bsp_padconf_init(void);
+int bsp_padconf_set(u32_t padconf, u32_t mask, u32_t value);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _BSP_PADCONF_H_ */

kernel/arch/earm/bsp/include/bsp_reset.h

@@ -0,0 +1,8 @@
+#ifndef _BSP_RESET_H_
+#define _BSP_RESET_H_
+
+void bsp_reset_init(void);
+void bsp_reset(void);
+void bsp_poweroff(void);
+
+#endif /* _BSP_RESET_H_ */

kernel/arch/earm/bsp/include/bsp_serial.h

@@ -0,0 +1,6 @@
+#ifndef _BSP_SERIAL_H_
+#define _BSP_SERIAL_H_
+
+void bsp_ser_init();
+void bsp_ser_putc(char c);
+#endif /* _BSP_SERIAL_H_ */

kernel/arch/earm/bsp/include/bsp_timer.h

@@ -0,0 +1,13 @@
+#ifndef _BSP_TIMER_H_
+#define _BSP_TIMER_H_
+
+#ifndef __ASSEMBLY__
+
+void bsp_timer_init(unsigned freq);
+void bsp_timer_stop(void);
+int  bsp_register_timer_handler(const irq_handler_t handler);
+void bsp_timer_int_handler(void);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _BSP_TIMER_H_ */

kernel/arch/earm/bsp/ti/Makefile.inc

@@ -0,0 +1,17 @@
+#
+# BSP for TI hardware
+
+HERE=${.CURDIR}/arch/${MACHINE_ARCH}/bsp/ti
+.PATH:	${HERE}
+
+.for unpaged_obj in omap_serial.o omap_rtc.o omap_reset.o 
+#BSP_OBJS_UNPAGED += unpaged_${unpaged_obj}
+BSP_OBJS_UNPAGED += ${unpaged_obj}
+.endfor
+
+
+SRCS+=	omap_init.c omap_serial.c omap_timer.c omap_padconf.c omap_intr.c omap_rtc.c \
+	omap_reset.c
+
+HERE=${.CURDIR}/arch/${MACHINE_ARCH}
+.PATH:	${HERE}

kernel/arch/earm/bsp/ti/omap_init.c

@@ -0,0 +1,16 @@
+#include <sys/types.h>
+#include "bsp_init.h"
+#include "bsp_padconf.h"
+#include "omap_rtc.h"
+#include "bsp_reset.h"
+
+void bsp_init(){
+	/* map memory for padconf */
+	bsp_padconf_init();
+
+	/* map memory for rtc */
+	omap3_rtc_init();
+
+	/* map memory for reset control */
+	bsp_reset_init();
+}

kernel/arch/earm/bsp/ti/omap_intr.c

@@ -11,7 +11,7 @@
 #include "arch_proto.h"
 #include "hw_intr.h"
 
-#include "omap_intr.h"
+#include "omap_intr_registers.h"
 static struct omap_intr {
 	vir_bytes base;
 	int size;
@@ -36,7 +36,7 @@ int intr_init(const int auto_eoi)
 	return 0;
 }
 
-void omap3_irq_handle(void) {
+void bsp_irq_handle(void) {
 	/* Function called from assembly to handle interrupts */
 
 	/* get irq */
@@ -47,12 +47,12 @@ void omap3_irq_handle(void) {
 	mmio_write(omap_intr.base + OMAP3_INTCPS_CONTROL,OMAP3_INTR_NEWIRQAGR);
 }
 
-void omap3_irq_unmask(int irq)
+void bsp_irq_unmask(int irq)
 {
 	mmio_write(OMAP3_INTR_MIR_CLEAR(omap_intr.base, irq >> 5), 1 << (irq & 0x1f));
 }
 
-void omap3_irq_mask(const int irq)
+void bsp_irq_mask(const int irq)
 {
 	mmio_write(OMAP3_INTR_MIR_SET(omap_intr.base, irq >> 5), 1 << (irq & 0x1f));
 }

kernel/arch/earm/bsp/ti/omap_intr_registers.h

@@ -233,11 +233,4 @@
 
 #define OMAP3_AM335X_NR_IRQ_VECTORS    125 
 
-#ifndef __ASSEMBLY__
-
-void omap3_irq_unmask(int irq);
-void omap3_irq_mask(int irq);
-
-#endif /* __ASSEMBLY__ */
-
 #endif /* _OMAP_INTR_H */

kernel/arch/earm/bsp/ti/omap_padconf.c

@@ -12,7 +12,7 @@
 #include <stdlib.h>
 #include <stdio.h>
 
-#include "omap_padconf.h"
+#include "bsp_padconf.h"
 
 struct omap_padconf
 {
@@ -48,7 +48,7 @@ static struct omap_padconf *omap_padconf;
 static kern_phys_map padconf_phys_map;
 
 int
-arch_padconf_set(u32_t padconf, u32_t mask, u32_t value)
+bsp_padconf_set(u32_t padconf, u32_t mask, u32_t value)
 {
 	/* check that the value will be inside the padconf memory range */
 	if (padconf >= (omap_padconf->size - omap_padconf->offset)) {
@@ -61,7 +61,7 @@ arch_padconf_set(u32_t padconf, u32_t mask, u32_t value)
 }
 
 void
-arch_padconf_init(void)
+bsp_padconf_init(void)
 {
 	int x;
 	omap_padconf = NULL;

kernel/arch/earm/bsp/ti/omap_reset.c

@@ -10,7 +10,9 @@
 #include "kernel/vm.h"
 #include "kernel/proto.h"
 #include "arch_proto.h"
-#include "omap_reset.h"
+#include "bsp_reset.h"
+
+#include "omap_rtc.h"
 
 #define AM335X_CM_BASE 0x44E00000
 #define AM335X_CM_SIZE 0x1000
@@ -35,7 +37,7 @@ static struct omap_reset omap_reset;
 static kern_phys_map reset_phys_map;
 
 void
-omap3_reset_init(void)
+bsp_reset_init(void)
 {
 	if(BOARD_IS_BBXM(machine.board_id)) {
 		omap_reset.base = DM37XX_CM_BASE;
@@ -50,7 +52,7 @@ omap3_reset_init(void)
 }
 
 void
-omap3_reset(void)
+bsp_reset(void)
 {
 	if(BOARD_IS_BBXM(machine.board_id)) {
 		mmio_set((omap_reset.base + DM37XX_PRM_RSTCTRL_REG), (1 << DM37XX_RST_DPLL3_BIT));
@@ -58,3 +60,23 @@ omap3_reset(void)
 		mmio_set((omap_reset.base + AM335X_PRM_DEVICE_OFFSET + AM335X_PRM_RSTCTRL_REG), (1 << AM335X_RST_GLOBAL_WARM_SW_BIT));
 	}
 }
+
+void bsp_poweroff(void)
+{
+
+/*
+ * The am335x can signal an external power management chip to cut the power
+ * by toggling the PMIC_POWER_EN pin. It might fail if there isn't an
+ * external PMIC or if the PMIC hasn't been configured to respond to toggles.
+ * The only way to pull the pin low is via ALARM2 (see TRM 20.3.3.8).
+ * At this point PM should have already signaled readclock to set the alarm.
+ */
+ if (BOARD_IS_BB(machine.board_id)) {
+	/* rtc was frozen to prevent premature power-off, unfreeze it now */
+	omap3_rtc_run();
+
+	/* wait for the alarm to go off and PMIC to disable power to SoC */
+	while (1);
+  }
+}
+

kernel/arch/earm/bsp/ti/omap_serial.c

@@ -42,7 +42,7 @@ static kern_phys_map serial_phys_map;
  * The serial driver also gets used in the "pre_init" stage before the kernel is loaded
  * in high memory so keep in mind there are two copies of this code in the kernel.
  */
-void omap3_ser_init()
+void bsp_ser_init()
 {
 	if(BOARD_IS_BBXM(machine.board_id)) {
 		omap_serial.base = OMAP3_DM37XX_DEBUG_UART_BASE;
@@ -56,7 +56,7 @@ void omap3_ser_init()
 	assert(omap_serial.base);
 }
 
-void omap3_ser_putc(char c)
+void bsp_ser_putc(char c)
 {
 	int i;
 	assert(omap_serial.base);

kernel/arch/earm/bsp/ti/omap_timer.c

@@ -9,8 +9,10 @@
 #include <stdlib.h>
 #include <stdio.h>
 #include "arch_proto.h"
-#include "omap_timer.h"
-#include "omap_intr.h"
+#include "bsp_timer.h"
+#include "omap_timer_registers.h"
+#include "omap_intr_registers.h"
+#include "bsp_intr.h"
 
 /* interrupt handler hook */
 static irq_hook_t omap3_timer_hook;
@@ -129,7 +131,7 @@ static struct omap_timer *fr_timer;
 
 static int done = 0;
 
-int omap3_register_timer_handler(const irq_handler_t handler)
+int bsp_register_timer_handler(const irq_handler_t handler)
 {
 	/* Initialize the CLOCK's interrupt hook. */
 	omap3_timer_hook.proc_nr_e = NONE;
@@ -137,7 +139,7 @@ int omap3_register_timer_handler(const irq_handler_t handler)
 
 	put_irq_handler(&omap3_timer_hook, timer->irq_nr, handler);
 	/* only unmask interrupts after registering */
-	omap3_irq_unmask(timer->irq_nr);
+	bsp_irq_unmask(timer->irq_nr);
 
 	return 0;
 }
@@ -212,7 +214,7 @@ void omap3_frclock_stop()
 }
 
 
-void omap3_timer_init(unsigned freq)
+void bsp_timer_init(unsigned freq)
 {
 	/* we only support 1ms resolution */
 	u32_t tisr;
@@ -262,9 +264,11 @@ void omap3_timer_init(unsigned freq)
 	/* Start timer */
 	mmio_set(timer->base + timer->regs->TCLR,
 	    OMAP3_TCLR_OVF_TRG|OMAP3_TCLR_AR|OMAP3_TCLR_ST);
+	/* also initilize the free runnning timer */
+	omap3_frclock_init();
 }
 
-void omap3_timer_stop()
+void bsp_timer_stop()
 {
 	mmio_clear(timer->base + timer->regs->TCLR, OMAP3_TCLR_ST);
 }
@@ -302,7 +306,7 @@ static void frc_overflow_check(u32_t cur_frc)
 	prev_frc_valid = 1;
 }
 
-void omap3_timer_int_handler()
+void bsp_timer_int_handler()
 {
 	/* Clear all interrupts */
 	u32_t tisr,now;

kernel/arch/earm/direct_tty_utils.c

@@ -1,7 +1,7 @@
 
 #include "kernel/kernel.h"
 #include "direct_utils.h"
-#include "serial.h"
+#include "bsp_serial.h"
 #include "glo.h"
 
 void direct_cls(void)
@@ -12,7 +12,7 @@ void direct_cls(void)
 void direct_print_char(char c)
 {
 	if(c == '\n')
-		ser_putc('\r');
+		bsp_ser_putc('\r');
 	ser_putc(c);
 }
 

kernel/arch/earm/do_padconf.c

@@ -4,14 +4,14 @@
 #if USE_PADCONF
 
 /* get arch specific arch_padconf_set() */
-#include "omap_padconf.h"
+#include "bsp_padconf.h"
 
 /*===========================================================================*
  *                                do_padconf                                 *
  *===========================================================================*/
 int do_padconf(struct proc *caller_ptr, message *m_ptr)
 {
-	return arch_padconf_set(m_ptr->PADCONF_PADCONF, m_ptr->PADCONF_MASK,
+	return bsp_padconf_set(m_ptr->PADCONF_PADCONF, m_ptr->PADCONF_MASK,
 	    m_ptr->PADCONF_VALUE);
 }
 

kernel/arch/earm/head.S

@@ -20,7 +20,7 @@
 
 .text
 /*===========================================================================*/
-/*				MINIX				     */
+/*					MINIX				     */
 /*===========================================================================*/
 .global MINIX
 MINIX:

kernel/arch/earm/hw_intr.c

@@ -0,0 +1,16 @@
+/* hw_intr handles the hardware dependent part of the interrupts */
+#include "hw_intr.h"
+#include "bsp_intr.h"
+
+int hw_intr_mask(int irq){
+	bsp_irq_mask(irq);
+}
+
+int hw_intr_unmask(int irq){
+	bsp_irq_unmask(irq);
+}
+
+int hw_intr_ack(int irq){};
+int hw_intr_used(int irq){};
+int hw_intr_not_used(int irq){};
+int hw_intr_disable_all(){};

kernel/arch/earm/include/arch_proto.h

@@ -113,6 +113,7 @@ int kern_req_phys_map( phys_bytes base_address, vir_bytes io_size,
 int kern_phys_map_ptr( phys_bytes base_address, vir_bytes io_size, 
 	kern_phys_map * priv, vir_bytes ptr);
 
+void arch_ser_init();
 
 /* functions defined in architecture-independent kernel source. */
 #include "kernel/proto.h"

kernel/arch/earm/include/ccnt.h

@@ -0,0 +1,22 @@
+#ifndef _CCNT_H
+#define _CCNT_H
+
+/* ARMV7 PMU (performance monitors) */
+/* ARM ARM B4.1.116 */
+#define PMU_PMCNTENSET_C	(1 << 31)  /* Enable PMCCNTR cycle counter */
+
+/* ARM ARM B4.1.117 PMCR */
+#define PMU_PMCR_DP		(1 << 5) /* Disable when ev. cnt. prohibited */
+#define PMU_PMCR_X		(1 << 4) /* Export enable */
+#define PMU_PMCR_D		(1 << 3) /* Clock divider */
+#define PMU_PMCR_C		(1 << 2) /* Cycle counter reset */
+#define PMU_PMCR_P		(1 << 1) /* Event counter reset */
+#define PMU_PMCR_E		(1 << 0) /* Enable event counters */
+
+/* ARM ARM B4.1.119 PMINTENSET */
+#define PMU_PMINTENSET_C	(1 << 31) /* PMCCNTR overflow int req. enable*/
+
+/* ARM ARM B4.1.124 PMUSERENR */
+#define PMU_PMUSERENR_EN	(1 << 0) /* User mode access enable bit */
+
+#endif /* _CCNT_H */

kernel/arch/earm/include/hw_intr.h

@@ -1,16 +1,15 @@
 #ifndef __HW_INTR_ARM_H__
 #define __HW_INTR_ARM_H__
 
-#include "omap_intr.h"
 
 #include "kernel/kernel.h"
 void irq_handle(int irq);
 
-#define hw_intr_mask(irq)	omap3_irq_mask(irq)
-#define hw_intr_unmask(irq)	omap3_irq_unmask(irq)
-#define hw_intr_ack(irq)
-#define hw_intr_used(irq)
-#define hw_intr_not_used(irq)
-#define hw_intr_disable_all()
+int hw_intr_mask(int irq);
+int hw_intr_unmask(int irq);
+int hw_intr_ack(int irq);
+int hw_intr_used(int irq);
+int hw_intr_not_used(int irq);
+int hw_intr_disable_all();
 
 #endif /* __HW_INTR_ARM_H__ */

kernel/arch/earm/memory.c

@@ -19,7 +19,8 @@
 #include "arch_proto.h"
 #include "kernel/proto.h"
 #include "kernel/debug.h"
-#include "omap_timer.h"
+#include "bsp_timer.h"
+#include "bsp/ti/omap_timer_registers.h"
 
 
 #define HASPT(procptr) ((procptr)->p_seg.p_ttbr != 0)
@@ -681,6 +682,9 @@ void arch_proc_init(struct proc *pr, const u32_t ip, const u32_t sp, char *name)
 	pr->p_reg.sp = sp;
 }
 
+/* TODO keesj: rewrite the free running clock to use callbacks
+ * the current implementation introduces a two-way depedency
+*/
 static int frclock_index = -1,
 	usermapped_glo_index = -1,
 	usermapped_index = -1, first_um_idx = -1;
@@ -895,7 +899,8 @@ int kern_req_phys_map( phys_bytes base_address, vir_bytes io_size,
 /*
  * Callback implementation where the id given to the
  * kern_phys_map is a pointer to the io map base address.
- * this implementation will change that base address.
+ * this implementation will just change that base address.
+ * once that area is remapped.
  */
 int kern_phys_map_mapped_ptr(vir_bytes id, phys_bytes address){
 	*((vir_bytes*)id) = address;

kernel/arch/earm/mpx.S

@@ -27,7 +27,7 @@
 #include <machine/multiboot.h>
 #include <machine/ipcconst.h>
 #include <machine/cpu.h>
-#include "omap_intr.h"
+#include "bsp_intr.h"
 
 #include "arch_proto.h" /* K_STACK_SIZE */
 
@@ -138,7 +138,7 @@ irq_entry_from_user:
 	bl	_C_LABEL(context_stop)
 
 	/* call handler */
-	bl	_C_LABEL(omap3_irq_handle)	/* omap3_irq_handle(void) */
+	bl	_C_LABEL(bsp_irq_handle)	/* bsp_irq_handle(void) */
 
 	add	sp, sp, #4
 	pop	{fp}    /* caller proc ptr */
@@ -153,7 +153,7 @@ irq_entry_from_kernel:
 	bl	_C_LABEL(context_stop_idle)
 
 	/* call handler */
-	bl	_C_LABEL(omap3_irq_handle)	/* omap3_irq_handle(void) */
+	bl	_C_LABEL(bsp_irq_handle)	/* bsp_irq_handle(void) */
 
 	/* data synchronization barrier */
 	dsb

kernel/arch/earm/omap_ccnt.h

@@ -1,21 +0,0 @@
-#ifndef _OMAP_CCNT_H
-#define _OMAP_CCNT_H
-
-/* ARM ARM B4.1.116 */
-#define OMAP_PMCNTENSET_C	(1 << 31)  /* Enable PMCCNTR cycle counter */
-
-/* ARM ARM B4.1.117 PMCR */
-#define OMAP_PMCR_DP		(1 << 5) /* Disable when ev. cnt. prohibited */
-#define OMAP_PMCR_X		(1 << 4) /* Export enable */
-#define OMAP_PMCR_D		(1 << 3) /* Clock divider */
-#define OMAP_PMCR_C		(1 << 2) /* Cycle counter reset */
-#define OMAP_PMCR_P		(1 << 1) /* Event counter reset */
-#define OMAP_PMCR_E		(1 << 0) /* Enable event counters */
-
-/* ARM ARM B4.1.119 PMINTENSET */
-#define OMAP_PMINTENSET_C	(1 << 31) /* PMCCNTR overflow int req. enable*/
-
-/* ARM ARM B4.1.124 PMUSERENR */
-#define OMAP_PMUSERENR_EN	(1 << 0) /* User mode access enable bit */
-
-#endif /* _OMAP_CCNT_H */

kernel/arch/earm/omap_padconf.h

@@ -1,11 +0,0 @@
-#ifndef _OMAP_PADCONF_H
-#define _OMAP_PADCONF_H
-
-#ifndef __ASSEMBLY__
-
-void arch_padconf_init(void);
-int arch_padconf_set(u32_t padconf, u32_t mask, u32_t value);
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* _OMAP_TIMER_H */

kernel/arch/earm/omap_reset.h

@@ -1,7 +0,0 @@
-#ifndef __OMAP_RESET_H
-#define __OMAP_RESET_H
-
-void omap3_reset_init(void);
-void omap3_reset(void);
-
-#endif /* __OMAP_RESET_H */

kernel/arch/earm/omap_timer.h

@@ -1,17 +0,0 @@
-#ifndef _OMAP_TIMER_H
-#define _OMAP_TIMER_H
-
-#include "omap_timer_registers.h"
-
-#ifndef __ASSEMBLY__
-
-void omap3_timer_init(unsigned freq);
-void omap3_timer_stop(void);
-void omap3_frclock_init(void);
-void omap3_frclock_stop(void);
-int omap3_register_timer_handler(const irq_handler_t handler);
-void omap3_timer_int_handler(void);
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* _OMAP_TIMER_H */

kernel/arch/earm/pre_init.c

@@ -14,7 +14,7 @@
 #include "string.h"
 #include "arch_proto.h"
 #include "direct_utils.h"
-#include "serial.h"
+#include "bsp_serial.h"
 #include "glo.h"
 #include <machine/multiboot.h>
 
@@ -385,7 +385,7 @@ kinfo_t *pre_init(int argc, char **argv)
 
 	bootargs = argv[1];
 	set_machine_id(bootargs);
-	omap3_ser_init();
+	bsp_ser_init();
 	/* Get our own copy boot params pointed to by ebx.
 	 * Here we find out whether we should do serial output.
 	 */

kernel/arch/earm/serial.h

@@ -1,7 +0,0 @@
-
-#ifndef _KERN_SERIAL_H
-#define _KERN_SERIAL_H
-
-#include "omap_serial.h"
-
-#endif

kernel/main.c

@@ -113,9 +113,6 @@ void bsp_finish_booting(void)
   NOT_REACHABLE;
 }
 
-#ifdef __arm__
-#include "omap_serial.h"
-#endif
 
 /*===========================================================================*
  *			kmain 	                             		*
@@ -136,7 +133,7 @@ void kmain(kinfo_t *local_cbi)
    machine.board_id = get_board_id_by_name(env_get(BOARDVARNAME));
 #ifdef __arm__
   /* We want to initialize serial before we do any output */
-  omap3_ser_init();
+  arch_ser_init();
 #endif
   /* We can talk now */
   printf("MINIX booting\n");

lib/libsys/arch/earm/frclock_util.c

@@ -3,7 +3,6 @@
  * similar to the read_tsc functions. On hardware we could actually make use
  * of the timer overflow counter, but emulator doesn't emulate it. */
 
-#include "omap_timer_registers.h"
 #include <minix/minlib.h>
 #include <minix/sysutil.h>
 #include <minix/type.h>