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gem5/src/cpu/inorder
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Korey Sewell b49511ae48 inorder: timing for inst forwarding 
when insts execute, they mark the time they finish to be used for subsequent isnts
they may need forwarding of data. However, the regdepmap was using the wrong
value to index into the destination operands of the instruction to be forwarded.
Thus, in some cases, we are checking to see if the 3rd destination register
for an instruction is executed at a certain time, when there is only 1 dest. register
valid. Thus, we get a bad, uninitialized time value that will stall forwarding
causing performance loss but still the correct execution.
2010-04-10 23:31:36 -04:00
..
resources inorder: timing for inst forwarding 2010-04-10 23:31:36 -04:00
comm.hh includes: sort includes again 2009-05-17 14:34:52 -07:00
cpu.cc inorder: fix address list bug 2010-03-22 15:38:28 -04:00
cpu.hh inorder: inst count mgmt 2010-01-31 18:30:48 -05:00
first_stage.cc inorder: add activity stats 2010-01-31 18:30:24 -05:00
first_stage.hh inorder: squash on memory stall 2010-01-31 18:26:13 -05:00
inorder_cpu_builder.cc inorder-alpha-fs: edit inorder model to compile FS mode 2009-09-15 01:44:48 -04:00
inorder_dyn_inst.cc inorder: timing for inst forwarding 2010-04-10 23:31:36 -04:00
inorder_dyn_inst.hh inorder: double delete inst bug 2010-01-31 18:30:59 -05:00
inorder_trace.cc arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh 2009-09-23 08:34:21 -07:00
inorder_trace.hh includes: sort includes again 2009-05-17 14:34:52 -07:00
InOrderCPU.py configs/inorder: add options for switch-on-miss to inorder cpu 2010-01-31 18:25:13 -05:00
InOrderTrace.py InOrder: Import new inorder CPU model from MIPS. 2009-02-10 15:49:29 -08:00
params.hh Remove unused functions/comments cluttering up the code. 2009-03-04 13:17:08 -05:00
pipeline_stage.cc inorder: double delete inst bug 2010-01-31 18:30:59 -05:00
pipeline_stage.hh inorder: add activity stats 2010-01-31 18:30:24 -05:00
pipeline_traits.5stage.cc InOrder: Import new inorder CPU model from MIPS. 2009-02-10 15:49:29 -08:00
pipeline_traits.5stage.hh InOrder: Import new inorder CPU model from MIPS. 2009-02-10 15:49:29 -08:00
pipeline_traits.9stage.cc InOrder: Import new inorder CPU model from MIPS. 2009-02-10 15:49:29 -08:00
pipeline_traits.9stage.hh InOrder: Import new inorder CPU model from MIPS. 2009-02-10 15:49:29 -08:00
pipeline_traits.9stage.smt2.cc InOrder: Import new inorder CPU model from MIPS. 2009-02-10 15:49:29 -08:00
pipeline_traits.9stage.smt2.hh InOrder: Import new inorder CPU model from MIPS. 2009-02-10 15:49:29 -08:00
pipeline_traits.cc inorder: write-hints bug fix 2010-03-27 01:40:05 -04:00
pipeline_traits.hh inorder: implement split loads 2010-01-31 18:30:35 -05:00
reg_dep_map.cc inorder: timing for inst forwarding 2010-04-10 23:31:36 -04:00
reg_dep_map.hh inorder: timing for inst forwarding 2010-04-10 23:31:36 -04:00
resource.cc inorder: inst count mgmt 2010-01-31 18:30:48 -05:00
resource.hh inorder: inst count mgmt 2010-01-31 18:30:48 -05:00
resource_pool.9stage.cc types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
resource_pool.cc inorder: implement split loads 2010-01-31 18:30:35 -05:00
resource_pool.hh inorder: implement split loads 2010-01-31 18:30:35 -05:00
SConscript inorder: fix address list bug 2010-03-22 15:38:28 -04:00
SConsopts cpu_models: get rid of cpu_models.py and move the stuff into SCons 2010-02-26 18:14:48 -08:00
thread_context.cc inorder: activate thread on cache miss 2010-01-31 18:26:32 -05:00
thread_context.hh inorder: set thread status' 2010-01-31 18:28:12 -05:00
thread_state.cc inorder-alpha-fs: edit inorder model to compile FS mode 2009-09-15 01:44:48 -04:00
thread_state.hh inorder: track last branch committed 2010-01-31 18:27:58 -05:00