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inorder: fix address list bug

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This commit is contained in:
Korey Sewell 2010-03-22 15:38:28 -04:00
parent 66632539b6
commit 4ac245737d
3 changed files with 14 additions and 13 deletions
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2
src/cpu/inorder/SConscript
View file

@ -61,7 +61,7 @@ if 'InOrderCPU' in env['CPU_MODELS']:
'InOrderMDU', 'InOrderAGEN', 'InOrderFetchSeq', 'InOrderTLB', 'InOrderBPred',
'InOrderDecode', 'InOrderExecute', 'InOrderInstBuffer', 'InOrderUseDef',
'InOrderGraduation', 'InOrderCachePort', 'RegDepMap', 'Resource',
'ThreadModel'])
'ThreadModel', 'AddrDep'])
Source('pipeline_traits.cc')
Source('inorder_dyn_inst.cc')

2
src/cpu/inorder/cpu.cc
View file

@ -1335,7 +1335,7 @@ InOrderCPU::cleanUpRemovedReqs()
while (!reqRemoveList.empty()) {
ResourceRequest *res_req = reqRemoveList.front();
DPRINTF(InOrderCPU, "[tid:%i] [sn:%lli]: Removing Request "
DPRINTF(Resource, "[tid:%i] [sn:%lli]: Removing Request "
"[stage_num:%i] [res:%s] [slot:%i] [completed:%i].\n",
res_req->inst->threadNumber,
res_req->inst->seqNum,

23
src/cpu/inorder/resources/cache_unit.cc
View file

@ -188,12 +188,18 @@ CacheUnit::setAddrDependency(DynInstPtr inst)
addrList[tid].push_back(req_addr);
addrMap[tid][req_addr] = inst->seqNum;
DPRINTF(InOrderCachePort,
"[tid:%i]: [sn:%i]: Address %08p added to dependency list\n",
inst->readTid(), inst->seqNum, req_addr);
DPRINTF(AddrDep,
"[tid:%i]: [sn:%i]: Address %08p added to dependency list\n",
inst->readTid(), inst->seqNum, req_addr);
//@NOTE: 10 is an arbitrarily "high" number here, but to be exact
// we would need to know the # of outstanding accesses
// a priori. Information like fetch width, stage width,
// and the branch resolution stage would be useful for the
// icache_port (among other things). For the dcache, the #
// of outstanding cache accesses might be sufficient.
assert(addrList[tid].size() < 10);
}
void
@ -203,6 +209,8 @@ CacheUnit::removeAddrDependency(DynInstPtr inst)
Addr mem_addr = inst->getMemAddr();
inst->unsetMemAddr();
// Erase from Address List
vector<Addr>::iterator vect_it = find(addrList[tid].begin(), addrList[tid].end(),
mem_addr);
@ -1106,8 +1114,6 @@ CacheUnit::processCacheCompletion(PacketPtr pkt)
tid, cache_req->inst->readPC());
cache_req->setMemAccCompleted();
}
inst->unsetMemAddr();
}
void
@ -1225,10 +1231,6 @@ CacheUnit::squash(DynInstPtr inst, int stage_num,
// Mark slot for removal from resource
slot_remove_list.push_back(req_ptr->getSlot());
DPRINTF(InOrderCachePort,
"[tid:%i] Squashing request from [sn:%i]\n",
req_ptr->getInst()->readTid(), req_ptr->getInst()->seqNum);
} else {
DPRINTF(InOrderCachePort,
"[tid:%i] Request from [sn:%i] squashed, but still pending completion.\n",
@ -1246,8 +1248,7 @@ CacheUnit::squash(DynInstPtr inst, int stage_num,
req_ptr->getInst()->getMemAddr());
removeAddrDependency(req_ptr->getInst());
}
}
}
map_it++;