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gem5/src/cpu/o3
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Gabe Black b398b8ff1b Registers: Add a registers.hh file as an ISA switched header. 
This file is for register indices, Num* constants, and register types.
copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.

--HG--
rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh
rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh
rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh
rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh
rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
2009-07-08 23:02:21 -07:00
..
base_dyn_inst.cc O3CPU: Make the instcount debugging stuff per-cpu. 2008-11-10 11:51:18 -08:00
bpred_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
bpred_unit.hh move: put predictor includes and cc files into the same place 2009-06-04 21:50:20 -07:00
bpred_unit_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
checker_builder.cc CPU: Make the cpuid parameter get set in SE mode as well. 2007-10-02 18:33:57 -07:00
comm.hh includes: sort includes again 2009-05-17 14:34:52 -07:00
commit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
commit.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
commit_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
cpu.cc Registers: Get rid of the float register width parameter. 2009-07-08 23:02:20 -07:00
cpu.hh Registers: Get rid of the float register width parameter. 2009-07-08 23:02:20 -07:00
cpu_builder.cc types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
cpu_policy.hh gcc: Version 4.3 is pretty anal about shadowing types, placate it. 2008-09-22 08:25:57 -07:00
decode.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
decode.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
decode_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
dep_graph.hh Miscellaneous minor fixes. 2006-06-16 17:15:18 -04:00
dyn_inst.cc O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
dyn_inst.hh Registers: Get rid of the float register width parameter. 2009-07-08 23:02:20 -07:00
dyn_inst_impl.hh CPA: Add code to automatically record function symbols as CPU executes. 2009-02-26 19:29:17 -05:00
fetch.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
fetch.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
fetch_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
free_list.cc types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
free_list.hh Registers: Add a registers.hh file as an ISA switched header. 2009-07-08 23:02:21 -07:00
fu_pool.cc params: Deprecate old-style constructors; update most SimObject constructors. 2007-08-30 15:16:59 -04:00
fu_pool.hh params: Deprecate old-style constructors; update most SimObject constructors. 2007-08-30 15:16:59 -04:00
FuncUnitConfig.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
FUPool.py Move SimObject python files alongside the C++ and fix 2007-05-27 19:21:17 -07:00
iew.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
iew.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
iew_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
impl.hh O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
inst_queue.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
inst_queue.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
inst_queue_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
isa_specific.hh O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
lsq.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
lsq_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
lsq_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
lsq_unit.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
lsq_unit_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
mem_dep_unit.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
mem_dep_unit.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
mem_dep_unit_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
O3Checker.py Changed BaseCPU::ProfileEvent's interval member to be of type Tick. This was done to be consistent with its 2008-08-18 10:50:58 -07:00
O3CPU.py params: Convert the CPU objects to use the auto generated param structs. 2008-08-11 12:22:16 -07:00
regfile.hh Registers: Add a registers.hh file as an ISA switched header. 2009-07-08 23:02:21 -07:00
rename.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rename.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
rename_impl.hh Registers: Add a registers.hh file as an ISA switched header. 2009-07-08 23:02:21 -07:00
rename_map.cc Make the floating point zero register special handling only apply for ALPHA. 2007-04-22 17:50:43 +00:00
rename_map.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
rob.cc now O3CPU is totally independent of the ISA... all alpha specific stuff is the cpu/o3/alpha directory 2006-06-30 20:49:31 -04:00
rob.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
rob_impl.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
sat_counter.cc Merge ktlim@zizzer:/bk/newmem 2006-06-02 18:19:50 -04:00
sat_counter.hh types: Move stuff for global types into src/base/types.hh 2009-05-17 14:34:50 -07:00
SConscript inorder-o3: allow both to compile together 2009-05-12 15:01:14 -04:00
SConsopts Rework the way SCons recurses into subdirectories, making it 2007-03-10 23:00:54 -08:00
scoreboard.cc Make the floating point zero register special handling only apply for ALPHA. 2007-04-22 17:50:43 +00:00
scoreboard.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
store_set.cc types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
store_set.hh types: add a type for thread IDs and try to use it everywhere 2009-05-26 09:23:13 -07:00
thread_context.cc O3: Generaize the O3 IMPL class so it isn't split out by ISA. 2008-10-09 00:10:02 -07:00
thread_context.hh Registers: Get rid of the float register width parameter. 2009-07-08 23:02:20 -07:00
thread_context_impl.hh Registers: Add a registers.hh file as an ISA switched header. 2009-07-08 23:02:21 -07:00
thread_state.hh make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered 2008-11-02 21:56:57 -05:00