.. |
arguments.cc
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GetArgument: Rework getArgument so that X86_FS compiles again.
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2010-10-15 23:57:06 -07:00 |
arguments.hh
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GetArgument: Rework getArgument so that X86_FS compiles again.
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2010-10-15 23:57:06 -07:00 |
async.cc
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Factor code out of main.cc and main.i into a bunch of files
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2007-03-02 22:24:00 -08:00 |
async.hh
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style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
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2008-09-10 14:26:15 -04:00 |
BaseTLB.py
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TLB: Make all tlbs derive from a common base class in both python and C++.
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2008-10-10 23:47:42 -07:00 |
byteswap.hh
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types: Move stuff for global types into src/base/types.hh
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2009-05-17 14:34:50 -07:00 |
core.cc
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tick: rename Clock namespace to SimClock
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2010-04-15 16:24:12 -07:00 |
core.hh
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tick: rename Clock namespace to SimClock
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2010-04-15 16:24:12 -07:00 |
debug.cc
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debug: Move debug_break into src/base
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2009-02-23 11:48:40 -08:00 |
debug.hh
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types: Move stuff for global types into src/base/types.hh
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2009-05-17 14:34:50 -07:00 |
eventq.cc
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flags: add comment to avoid future deletions since code appears redundant.
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2010-06-09 10:47:37 -07:00 |
eventq.hh
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event: Allow EventWrapper to take an object reference
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2010-04-18 13:23:24 -07:00 |
fault.hh
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Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
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2010-09-13 19:26:03 -07:00 |
faults.cc
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ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
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2010-10-31 00:07:20 -07:00 |
faults.hh
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Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
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2010-09-13 19:26:03 -07:00 |
init.cc
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init: don't build files that centralize python and swig code
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2010-09-09 14:15:42 -07:00 |
init.hh
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init: don't build files that centralize python and swig code
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2010-09-09 14:15:42 -07:00 |
insttracer.hh
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ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
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2010-10-31 00:07:20 -07:00 |
InstTracer.py
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SimObjects: Clean up handling of C++ namespaces.
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2008-10-09 22:19:39 -07:00 |
main.cc
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libm5: Create a libm5 static library for embedding m5.
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2008-08-03 18:19:54 -07:00 |
microcode_rom.hh
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CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
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2008-10-12 15:59:21 -07:00 |
process.cc
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sim: revamp unserialization procedure
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2010-08-17 05:17:06 -07:00 |
process.hh
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sim: revamp unserialization procedure
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2010-08-17 05:17:06 -07:00 |
Process.py
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process: separate stderr from stdout
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2008-07-23 14:41:34 -07:00 |
process_impl.hh
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Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
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2010-09-13 19:26:03 -07:00 |
pseudo_inst.cc
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tick: rename Clock namespace to SimClock
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2010-04-15 16:24:12 -07:00 |
pseudo_inst.hh
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types: Move stuff for global types into src/base/types.hh
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2009-05-17 14:34:50 -07:00 |
root.cc
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Major changes to how SimObjects are created and initialized. Almost all
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2007-07-23 21:51:38 -07:00 |
Root.py
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misc: add some AMD copyright notices
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2010-08-17 05:49:05 -07:00 |
SConscript
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ARM: Add checkpointing support
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2010-11-08 13:58:25 -06:00 |
serialize.cc
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Compiler: Fixes for GCC 4.5.
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2010-08-23 11:18:39 -05:00 |
serialize.hh
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sim: revamp unserialization procedure
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2010-08-17 05:17:06 -07:00 |
sim_events.cc
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sim: fold StartupCallback into SimObject
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2010-07-05 21:39:38 -07:00 |
sim_events.hh
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eventq: convert all usage of events to use the new API.
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2008-10-09 04:58:24 -07:00 |
sim_exit.hh
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types: Move stuff for global types into src/base/types.hh
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2009-05-17 14:34:50 -07:00 |
sim_object.cc
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misc: add some AMD copyright notices
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2010-08-17 05:49:05 -07:00 |
sim_object.hh
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misc: add some AMD copyright notices
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2010-08-17 05:49:05 -07:00 |
sim_object_params.hh
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eventq: convert all usage of events to use the new API.
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2008-10-09 04:58:24 -07:00 |
simulate.cc
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includes: sort includes again
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2009-05-17 14:34:52 -07:00 |
simulate.hh
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types: Move stuff for global types into src/base/types.hh
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2009-05-17 14:34:50 -07:00 |
stat_control.cc
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stats: make simTicks and simFreq accessible from stats.hh
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2010-04-18 13:23:25 -07:00 |
stat_control.hh
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Get rid of the Statistics and Statreset ParamContexts, and
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2007-02-17 22:52:32 -08:00 |
stats.hh
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stats: make simTicks and simFreq accessible from stats.hh
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2010-04-18 13:23:25 -07:00 |
syscall_emul.cc
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ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
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2010-10-31 00:07:20 -07:00 |
syscall_emul.hh
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ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
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2010-10-31 00:07:20 -07:00 |
syscallreturn.hh
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includes: use base/types.hh not inttypes.h or stdint.h
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2009-05-17 14:34:51 -07:00 |
system.cc
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ARM: Add checkpointing support
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2010-11-08 13:58:25 -06:00 |
system.hh
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ARM: Add checkpointing support
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2010-11-08 13:58:25 -06:00 |
System.py
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scons: use code_formatter wherever we can in the build system
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2010-09-09 14:15:41 -07:00 |
tlb.cc
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Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
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2010-09-13 19:26:03 -07:00 |
tlb.hh
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Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
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2010-09-13 19:26:03 -07:00 |
vptr.hh
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Remove delVirtPort() and make getVirtPort() only return cached version.
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2008-07-01 10:25:07 -04:00 |