tick: rename Clock namespace to SimClock

This commit is contained in:
Nathan Binkert 2010-04-15 16:24:12 -07:00
parent f7e6f19ada
commit e99828b06a
20 changed files with 39 additions and 38 deletions

View file

@ -77,7 +77,7 @@ FreebsdAlphaSystem::doCalibrateClocks(ThreadContext *tc)
ppc_vaddr = (Addr)tc->readIntReg(17);
timer_vaddr = (Addr)tc->readIntReg(18);
virtPort.write(ppc_vaddr, (uint32_t)Clock::Frequency);
virtPort.write(ppc_vaddr, (uint32_t)SimClock::Frequency);
virtPort.write(timer_vaddr, (uint32_t)TIMER_FREQUENCY);
}

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@ -86,7 +86,7 @@ LinuxAlphaSystem::LinuxAlphaSystem(Params *p)
* calculated it by using the PIT, RTC, etc.
*/
if (kernelSymtab->findAddress("est_cycle_freq", addr))
virtPort.write(addr, (uint64_t)(Clock::Frequency /
virtPort.write(addr, (uint64_t)(SimClock::Frequency /
p->boot_cpu_frequency));

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@ -183,7 +183,7 @@ tableFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
TypedBufferArg<Tru64::tbl_sysinfo> elp(bufPtr);
const int clk_hz = one_million;
elp->si_user = htog(curTick / (Clock::Frequency / clk_hz));
elp->si_user = htog(curTick / (SimClock::Frequency / clk_hz));
elp->si_nice = htog(0);
elp->si_sys = htog(0);
elp->si_idle = htog(0);

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@ -85,7 +85,7 @@ LinuxMipsSystem::LinuxMipsSystem(Params *p)
* calculated it by using the PIT, RTC, etc.
*/
if (kernelSymtab->findAddress("est_cycle_freq", addr))
virtPort.write(addr, (uint64_t)(Clock::Frequency /
virtPort.write(addr, (uint64_t)(SimClock::Frequency /
p->boot_cpu_frequency));
/**

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@ -98,7 +98,7 @@ class BaseCPU : public MemObject
int cpuId() { return _cpuId; }
// Tick currentTick;
inline Tick frequency() const { return Clock::Frequency / clock; }
inline Tick frequency() const { return SimClock::Frequency / clock; }
inline Tick ticks(int numCycles) const { return clock * numCycles; }
inline Tick curCycle() const { return curTick / clock; }
inline Tick tickToCycles(Tick val) const { return val / clock; }

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@ -80,7 +80,7 @@ TsunamiIO::TsunamiIO(const Params *p)
Tick
TsunamiIO::frequency() const
{
return Clock::Frequency / params()->frequency;
return SimClock::Frequency / params()->frequency;
}
Tick

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@ -94,8 +94,8 @@ void
EtherDump::dumpPacket(EthPacketPtr &packet)
{
pcap_pkthdr pkthdr;
pkthdr.seconds = curTick / Clock::Int::s;
pkthdr.microseconds = (curTick / Clock::Int::us) % ULL(1000000);
pkthdr.seconds = curTick / SimClock::Int::s;
pkthdr.microseconds = (curTick / SimClock::Int::us) % ULL(1000000);
pkthdr.caplen = std::min(packet->length, maxlen);
pkthdr.len = packet->length;
stream->write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr));

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@ -693,7 +693,7 @@ IGbE::postInterrupt(IntTypes t, bool now)
regs.icr = regs.icr() | t;
Tick itr_interval = Clock::Int::ns * 256 * regs.itr.interval();
Tick itr_interval = SimClock::Int::ns * 256 * regs.itr.interval();
DPRINTF(EthernetIntr,
"EINT: postInterrupt() curTick: %d itr: %d interval: %d\n",
curTick, regs.itr.interval(), itr_interval);
@ -801,7 +801,7 @@ IGbE::chkInterrupt()
DPRINTF(Ethernet,
"Possibly scheduling interrupt because of imr write\n");
if (!interEvent.scheduled()) {
Tick t = curTick + Clock::Int::ns * 256 * regs.itr.interval();
Tick t = curTick + SimClock::Int::ns * 256 * regs.itr.interval();
DPRINTF(Ethernet, "Scheduling for %d\n", t);
schedule(interEvent, t);
}

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@ -171,7 +171,7 @@ class IGbE : public EtherDevice
*/
void cpuClearInt();
Tick intClock() { return Clock::Int::ns * 1024; }
Tick intClock() { return SimClock::Int::ns * 1024; }
/** This function is used to restart the clock so it can handle things like
* draining and resume in one place. */

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@ -255,7 +255,7 @@ Intel8254Timer::Counter::unserialize(const string &base, Checkpoint *cp,
Intel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr)
{
interval = (Tick)(Clock::Float::s / 1193180.0);
interval = (Tick)(SimClock::Float::s / 1193180.0);
counter = c_ptr;
}

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@ -271,7 +271,7 @@ void
MC146818::RTCTickEvent::process()
{
DPRINTF(MC146818, "RTC clock tick\n");
parent->schedule(this, curTick + Clock::Int::s);
parent->schedule(this, curTick + SimClock::Int::s);
parent->tickClock();
}

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@ -71,7 +71,7 @@ class MC146818 : public EventManager
RTCTickEvent(MC146818 * _parent) : parent(_parent)
{
parent->schedule(this, curTick + Clock::Int::s);
parent->schedule(this, curTick + SimClock::Int::s);
}
/** Event process to occur at interrupt*/

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@ -80,7 +80,7 @@ MaltaIO::MaltaIO(const Params *p)
Tick
MaltaIO::frequency() const
{
return Clock::Frequency / params()->frequency;
return SimClock::Frequency / params()->frequency;
}
Tick

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@ -90,7 +90,7 @@ Uart8250::IntrEvent::process()
void
Uart8250::IntrEvent::scheduleIntr()
{
static const Tick interval = 225 * Clock::Int::ns;
static const Tick interval = 225 * SimClock::Int::ns;
DPRINTF(Uart, "Scheduling IER interrupt for %#x, at cycle %lld\n", intrBit,
curTick + interval);
if (!scheduled())
@ -217,7 +217,7 @@ Uart8250::write(PacketPtr pkt)
if (UART_IER_THRI & IER)
{
DPRINTF(Uart, "IER: IER_THRI set, scheduling TX intrrupt\n");
if (curTick - lastTxInt > 225 * Clock::Int::ns) {
if (curTick - lastTxInt > 225 * SimClock::Int::ns) {
DPRINTF(Uart, "-- Interrupting Immediately... %d,%d\n",
curTick, lastTxInt);
txIntrEvent.process();

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@ -108,7 +108,7 @@ void
SimpleTimingPort::schedSendTiming(PacketPtr pkt, Tick when)
{
assert(when > curTick);
assert(when < curTick + Clock::Int::ms);
assert(when < curTick + SimClock::Int::ms);
// Nothing is on the list: add it and schedule an event
if (transmitList.empty() || when < transmitList.front().tick) {

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@ -40,7 +40,7 @@ using namespace std;
Tick curTick = 0;
namespace Clock {
namespace SimClock {
/// The simulated frequency of curTick. (In ticks per second)
Tick Frequency;
@ -65,12 +65,12 @@ Tick ns;
Tick ps;
/* namespace Float */ }
/* namespace Clock */ }
/* namespace SimClock */ }
void
setClockFrequency(Tick ticksPerSecond)
{
using namespace Clock;
using namespace SimClock;
Frequency = ticksPerSecond;
Float::s = static_cast<double>(Frequency);
Float::ms = Float::s / 1.0e3;

View file

@ -40,7 +40,7 @@
extern Tick curTick;
const Tick retryTime = 1000;
namespace Clock {
namespace SimClock {
/// The simulated frequency of curTick.
extern Tick Frequency;
@ -64,7 +64,7 @@ extern Tick us;
extern Tick ns;
extern Tick ps;
/* namespace Int */ }
/* namespace Clock */ }
/* namespace SimClock */ }
void setClockFrequency(Tick ticksPerSecond);

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@ -93,7 +93,7 @@ quiesceNs(ThreadContext *tc, uint64_t ns)
EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
Tick resume = curTick + Clock::Int::ns * ns;
Tick resume = curTick + SimClock::Int::ns * ns;
mainEventQueue.reschedule(quiesceEvent, resume, true);
@ -128,7 +128,8 @@ quiesceCycles(ThreadContext *tc, uint64_t cycles)
uint64_t
quiesceTime(ThreadContext *tc)
{
return (tc->readLastActivate() - tc->readLastSuspend()) / Clock::Int::ns;
return (tc->readLastActivate() - tc->readLastSuspend()) /
SimClock::Int::ns;
}
#endif
@ -136,7 +137,7 @@ quiesceTime(ThreadContext *tc)
uint64_t
rpns(ThreadContext *tc)
{
return curTick / Clock::Int::ns;
return curTick / SimClock::Int::ns;
}
void
@ -151,7 +152,7 @@ wakeCPU(ThreadContext *tc, uint64_t cpuid)
void
m5exit(ThreadContext *tc, Tick delay)
{
Tick when = curTick + delay * Clock::Int::ns;
Tick when = curTick + delay * SimClock::Int::ns;
Event *event = new SimLoopExitEvent("m5_exit instruction encountered", 0);
mainEventQueue.schedule(event, when);
}
@ -229,8 +230,8 @@ resetstats(ThreadContext *tc, Tick delay, Tick period)
return;
Tick when = curTick + delay * Clock::Int::ns;
Tick repeat = period * Clock::Int::ns;
Tick when = curTick + delay * SimClock::Int::ns;
Tick repeat = period * SimClock::Int::ns;
Stats::StatEvent(false, true, when, repeat);
}
@ -242,8 +243,8 @@ dumpstats(ThreadContext *tc, Tick delay, Tick period)
return;
Tick when = curTick + delay * Clock::Int::ns;
Tick repeat = period * Clock::Int::ns;
Tick when = curTick + delay * SimClock::Int::ns;
Tick repeat = period * SimClock::Int::ns;
Stats::StatEvent(true, false, when, repeat);
}
@ -255,8 +256,8 @@ dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
return;
Tick when = curTick + delay * Clock::Int::ns;
Tick repeat = period * Clock::Int::ns;
Tick when = curTick + delay * SimClock::Int::ns;
Tick repeat = period * SimClock::Int::ns;
Stats::StatEvent(true, true, when, repeat);
}
@ -267,8 +268,8 @@ m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
return;
Tick when = curTick + delay * Clock::Int::ns;
Tick repeat = period * Clock::Int::ns;
Tick when = curTick + delay * SimClock::Int::ns;
Tick repeat = period * SimClock::Int::ns;
Event *event = new SimLoopExitEvent("checkpoint", 0, repeat);
mainEventQueue.schedule(event, when);

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@ -106,7 +106,7 @@ Global::Global()
;
simFreq
.scalar(Clock::Frequency)
.scalar(SimClock::Frequency)
.name("sim_freq")
.desc("Frequency of simulated ticks")
;

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@ -360,7 +360,7 @@ template <class T1, class T2>
void
getElapsedTime(T1 &sec, T2 &usec)
{
int elapsed_usecs = curTick / Clock::Int::us;
int elapsed_usecs = curTick / SimClock::Int::us;
sec = elapsed_usecs / one_million;
usec = elapsed_usecs % one_million;
}
@ -1187,7 +1187,7 @@ timesFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
TypedBufferArg<typename OS::tms> bufp(process->getSyscallArg(tc, index));
// Fill in the time structure (in clocks)
int64_t clocks = curTick * OS::M5_SC_CLK_TCK / Clock::Int::s;
int64_t clocks = curTick * OS::M5_SC_CLK_TCK / SimClock::Int::s;
bufp->tms_utime = clocks;
bufp->tms_stime = 0;
bufp->tms_cutime = 0;