Gabe Black 3ed62ad025 Work towards factoring isa_traits.hh into smaller, more specialized files. ... arch/SConscript: Sorted the switch headers, and added registerfile.hh, constants.hh, types.hh, and utility.hh. arch/alpha/isa_traits.hh: Moved the register file types to registerfile.hh, small functions to utility.hh, and cleaned out alot of stuff that isn't necessary anymore. base/loader/ecoff_object.cc: base/loader/elf_object.cc: cpu/pc_event.hh: cpu/static_inst.hh: mem/port.hh: sim/faults.cc: sim/system.hh: base/misc.hh isn't included through isa_traits.hh anymore. cpu/simple/cpu.cc: Added include for arch/utility.hh --HG-- extra : convert_revision : 24f65f330f87e3c909c939596cfcf48336022eaf		2006-03-10 19:11:27 -05:00
..
memtest	Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.	2006-03-04 15:18:40 -05:00
o3	Eliminated TARGET_ALPHA, since THE_ISA provides the same function.	2006-03-10 16:26:31 -05:00
ozone	Cleaned up some of the Fault system.	2006-03-01 05:26:08 -05:00
simple	Work towards factoring isa_traits.hh into smaller, more specialized files.	2006-03-10 19:11:27 -05:00
trace	Made Addr a global type	2006-02-21 03:38:21 -05:00
base.cc	Hand merge. Stuff probably doesn't compile.	2006-03-09 18:35:28 -05:00
base.hh	Hand merge. Stuff probably doesn't compile.	2006-03-09 18:35:28 -05:00
base_dyn_inst.cc	Merge ktlim@zizzer:/bk/m5	2006-03-05 00:34:54 -05:00
base_dyn_inst.hh	Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.	2006-03-04 15:18:40 -05:00
cpu_exec_context.cc	SimpleCPU compiles with merge.	2006-03-09 19:21:35 -05:00
cpu_exec_context.hh	Merge m5.eecs.umich.edu:/bk/newmem	2006-03-10 17:01:58 -05:00
cpu_models.py	Enable building only selected CPU models via new scons	2006-02-23 17:00:29 -05:00
exec_context.hh	Add getMemPort to exec context proxy	2006-03-10 16:51:52 -05:00
exetrace.cc	Hand merge. Stuff probably doesn't compile.	2006-03-09 18:35:28 -05:00
exetrace.hh	Made Addr a global type	2006-02-21 03:38:21 -05:00
inst_seq.hh	fix problems on darwin/*BSD for syscall emulation mode	2006-02-10 14:21:32 -05:00
intr_control.cc	Updates for the quiesceEvent that was added to the XC.	2006-03-07 19:59:12 -05:00
intr_control.hh	Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.	2006-03-04 15:18:40 -05:00
op_class.cc	Move op_class.hh out of encumbered/cpu/full and into cpu.	2006-02-21 22:12:27 -05:00
op_class.hh	Move op_class.hh out of encumbered/cpu/full and into cpu.	2006-02-21 22:12:27 -05:00
pc_event.cc	Steps towards setting up the infrastructure to allow the new CPU model to work in full system mode.	2006-03-04 15:18:40 -05:00
pc_event.hh	Work towards factoring isa_traits.hh into smaller, more specialized files.	2006-03-10 19:11:27 -05:00
profile.cc	Updates for the quiesceEvent that was added to the XC.	2006-03-07 19:59:12 -05:00
profile.hh	Updates for the quiesceEvent that was added to the XC.	2006-03-07 19:59:12 -05:00
SConscript	Make sure cpu/static_inst_exec_sigs.hh get rebuilt when	2006-02-25 22:57:46 -05:00
smt.hh	Many files:	2005-06-05 05:16:00 -04:00
static_inst.cc	Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths.	2006-02-19 02:34:37 -05:00
static_inst.hh	Work towards factoring isa_traits.hh into smaller, more specialized files.	2006-03-10 19:11:27 -05:00