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gem5/src/sim
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Gabe Black 3eca0a2bc9 Endianness: Make it easier to check the compiled in guest endianness. 
It was technically possible but clumsy to determine what endianness a guest
was configured with using the state in byteswap.hh. This change makes that
information available more directly.

Also get rid of unused (and mildly redundant) ByteOrderDiffers constant.
2011-09-19 05:19:45 -07:00
..
arguments.cc GetArgument: Rework getArgument so that X86_FS compiles again. 2010-10-15 23:57:06 -07:00
arguments.hh GetArgument: Rework getArgument so that X86_FS compiles again. 2010-10-15 23:57:06 -07:00
async.cc Factor code out of main.cc and main.i into a bunch of files 2007-03-02 22:24:00 -08:00
async.hh style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs 2008-09-10 14:26:15 -04:00
BaseTLB.py TLB: Make all tlbs derive from a common base class in both python and C++. 2008-10-10 23:47:42 -07:00
byteswap.hh Endianness: Make it easier to check the compiled in guest endianness. 2011-09-19 05:19:45 -07:00
core.cc Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
core.hh Core: Add some documentation about the sim clocks. 2011-05-04 20:38:27 -05:00
debug.cc Debug: Add a function to cause the simulator to create a checkpoint from GDB. 2011-05-04 20:38:27 -05:00
debug.hh Debug: Add a function to cause the simulator to create a checkpoint from GDB. 2011-05-04 20:38:27 -05:00
eventq.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
eventq.hh trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
fault_fwd.hh copyright: clean up copyright blocks 2011-06-02 14:36:35 -07:00
faults.cc LSQ: Only trigger a memory violation with a load/load if the value changes. 2011-09-13 12:58:08 -04:00
faults.hh LSQ: Only trigger a memory violation with a load/load if the value changes. 2011-09-13 12:58:08 -04:00
init.cc python: cleanup python code so stuff doesn't automatically happen at startup 2011-04-15 10:44:59 -07:00
init.hh init: don't build files that centralize python and swig code 2010-09-09 14:15:42 -07:00
insttracer.hh Make commenting on close namespace brackets consistent. 2011-01-03 14:35:43 -08:00
InstTracer.py SimObjects: Clean up handling of C++ namespaces. 2008-10-09 22:19:39 -07:00
main.cc libm5: Create a libm5 static library for embedding m5. 2008-08-03 18:19:54 -07:00
microcode_rom.hh CPU: Create a microcode ROM object in the CPU which is defined by the ISA. 2008-10-12 15:59:21 -07:00
process.cc Stack: Tidy up some comments, a warning, and make stack extension consistent. 2011-09-09 01:01:43 -07:00
process.hh Stack: Tidy up some comments, a warning, and make stack extension consistent. 2011-09-09 01:01:43 -07:00
Process.py process: separate stderr from stdout 2008-07-23 14:41:34 -07:00
process_impl.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
pseudo_inst.cc Pseudoinst: Add an initParam pseudo inst function. 2011-09-18 23:26:39 -07:00
pseudo_inst.hh PseudoInst: Make all the pseudo insts available in SE and FS. 2011-09-19 03:39:58 -07:00
root.cc copyright: clean up copyright blocks 2011-06-02 14:36:35 -07:00
root.hh copyright: clean up copyright blocks 2011-06-02 14:36:35 -07:00
Root.py Time: Add a mechanism to prevent M5 from running faster than real time. 2011-01-19 11:48:00 -08:00
SConscript scons: rename TraceFlags to DebugFlags 2011-06-02 17:36:21 -07:00
serialize.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
serialize.hh includes: sort all includes 2011-04-15 10:44:06 -07:00
sim_events.cc Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
sim_events.hh sim: clean up CountedDrainEvent slightly. 2011-01-07 21:50:29 -08:00
sim_exit.hh Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
sim_object.cc sim: add some DPRINTFs for debugging unserialization 2011-05-23 14:27:20 -07:00
sim_object.hh sim: add some DPRINTFs for debugging unserialization 2011-05-23 14:27:20 -07:00
sim_object_params.hh eventq: convert all usage of events to use the new API. 2008-10-09 04:58:24 -07:00
simulate.cc Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
simulate.hh types: Move stuff for global types into src/base/types.hh 2009-05-17 14:34:50 -07:00
stat_control.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
stat_control.hh Replace curTick global variable with accessor functions. 2011-01-07 21:50:29 -08:00
stats.hh stats: make simTicks and simFreq accessible from stats.hh 2010-04-18 13:23:25 -07:00
syscall_emul.cc trace: reimplement the DTRACE function so it doesn't use a vector 2011-04-15 10:44:32 -07:00
syscall_emul.hh syscall emul: fix Power Linux mmap constant, plus other cleanup 2011-05-23 14:29:23 -07:00
syscallreturn.hh includes: use base/types.hh not inttypes.h or stdint.h 2009-05-17 14:34:51 -07:00
system.cc O3: Make sure fetch doesn't go off into the weeds during speculation. 2011-07-10 12:56:08 -05:00
system.hh O3: Make sure fetch doesn't go off into the weeds during speculation. 2011-07-10 12:56:08 -05:00
System.py O3: Make sure fetch doesn't go off into the weeds during speculation. 2011-07-10 12:56:08 -05:00
tlb.cc includes: sort all includes 2011-04-15 10:44:06 -07:00
tlb.hh O3: Enhance data address translation by supporting hardware page table walkers. 2011-02-11 18:29:35 -06:00
vptr.hh includes: sort all includes 2011-04-15 10:44:06 -07:00