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checker
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Clock: Add a Cycles wrapper class and use where applicable
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2012-08-28 14:30:33 -04:00 |
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inorder
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Param: Transition to Cycles for relevant parameters
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2012-09-07 12:34:38 -04:00 |
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nocpu
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SCons: Support building without an ISA
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2010-11-19 18:00:39 -06:00 |
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o3
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O3: Pack the comm structures a bit better to reduce their size.
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2012-09-25 11:49:40 -05:00 |
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ozone
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CPU: Remove overloaded function_trace_start parameter
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2012-08-21 05:49:43 -04:00 |
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pred
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o3: Fix a couple of issues with the local predictor.
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2012-11-02 11:32:00 -05:00 |
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simple
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ARM: Squash outstanding walks when instructions are squashed.
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2012-09-25 11:49:40 -05:00 |
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testers
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memtest: move check on outstanding requests
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2012-10-15 17:27:17 -05:00 |
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trace
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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activity.cc
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Fix: Address a few benign memory leaks
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2012-07-09 12:35:30 -04:00 |
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activity.hh
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Fix: Address a few benign memory leaks
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2012-07-09 12:35:30 -04:00 |
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base.cc
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Port: Add protocol-agnostic ports in the port hierarchy
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2012-10-15 08:12:35 -04:00 |
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base.hh
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Port: Add protocol-agnostic ports in the port hierarchy
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2012-10-15 08:12:35 -04:00 |
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base_dyn_inst.hh
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O3: Clean up the O3 structures and try to pack them a bit better.
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2012-06-05 01:23:09 -04:00 |
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base_dyn_inst_impl.hh
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O3: Clean up the O3 structures and try to pack them a bit better.
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2012-06-05 01:23:09 -04:00 |
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BaseCPU.py
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Regression: Use CPU clock and 32-byte width for L1-L2 bus
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2012-10-15 08:08:08 -04:00 |
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CheckerCPU.py
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CPU: Remove overloaded function_trace_start parameter
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2012-08-21 05:49:43 -04:00 |
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cpuevent.cc
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Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.
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2006-06-06 17:32:21 -04:00 |
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cpuevent.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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decode_cache.hh
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ISA,CPU: Generalize and split out the components of the decode cache.
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2012-05-26 13:45:12 -07:00 |
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dummy_checker_builder.cc
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CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable
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2012-03-09 09:59:27 -05:00 |
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DummyChecker.py
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CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
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2012-01-31 07:46:03 -08:00 |
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exec_context.hh
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SE/FS: Expose the same methods on the CPUs in SE and FS modes.
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2011-11-01 04:01:13 -07:00 |
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exetrace.cc
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gcc: Clean-up of non-C++0x compliant code, first steps
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2012-03-19 06:36:09 -04:00 |
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exetrace.hh
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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ExeTracer.py
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SimObjects: Clean up handling of C++ namespaces.
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2008-10-09 22:19:39 -07:00 |
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func_unit.cc
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params: Deprecate old-style constructors; update most SimObject constructors.
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2007-08-30 15:16:59 -04:00 |
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func_unit.hh
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Param: Transition to Cycles for relevant parameters
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2012-09-07 12:34:38 -04:00 |
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FuncUnit.py
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Param: Transition to Cycles for relevant parameters
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2012-09-07 12:34:38 -04:00 |
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inst_seq.hh
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build: fix compile problems pointed out by gcc 4.4
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2009-11-04 16:57:01 -08:00 |
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inteltrace.cc
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gcc: Clean-up of non-C++0x compliant code, first steps
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2012-03-19 06:36:09 -04:00 |
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inteltrace.hh
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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IntelTrace.py
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SimObjects: Clean up handling of C++ namespaces.
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2008-10-09 22:19:39 -07:00 |
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intr_control.cc
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SE/FS: Get rid of FULL_SYSTEM in the CPU directory.
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2011-11-18 01:33:28 -08:00 |
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intr_control.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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IntrControl.py
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Move SimObject python files alongside the C++ and fix
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2007-05-27 19:21:17 -07:00 |
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legiontrace.cc
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Fix: Address a few minor issues identified by cppcheck
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2012-10-15 08:12:23 -04:00 |
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legiontrace.hh
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Make commenting on close namespace brackets consistent.
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2011-01-03 14:35:43 -08:00 |
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LegionTrace.py
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SimObjects: Clean up handling of C++ namespaces.
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2008-10-09 22:19:39 -07:00 |
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m5legion_interface.h
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add fsr to the list of registers we are interested in
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2007-01-30 18:27:04 -05:00 |
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nativetrace.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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nativetrace.hh
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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NativeTrace.py
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ARM: Make native trace print out what instruction caused an error.
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2009-07-27 00:54:09 -07:00 |
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op_class.hh
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CPU/ARM: Add SIMD op classes to CPU models and ARM ISA.
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2010-11-15 14:04:04 -06:00 |
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pc_event.cc
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gem5: fix some iterator use and erase bugs
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2012-05-10 18:04:27 -05:00 |
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pc_event.hh
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types: Move stuff for global types into src/base/types.hh
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2009-05-17 14:34:50 -07:00 |
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profile.cc
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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profile.hh
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includes: sort all includes
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2011-04-15 10:44:06 -07:00 |
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quiesce_event.cc
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trace: reimplement the DTRACE function so it doesn't use a vector
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2011-04-15 10:44:32 -07:00 |
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quiesce_event.hh
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clang: Enable compiling gem5 using clang 2.9 and 3.0
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2012-01-31 12:05:52 -05:00 |
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SConscript
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ISA,CPU: Generalize and split out the components of the decode cache.
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2012-05-26 13:45:12 -07:00 |
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simple_thread.cc
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Clock: Add a Cycles wrapper class and use where applicable
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2012-08-28 14:30:33 -04:00 |
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simple_thread.hh
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Clock: Add a Cycles wrapper class and use where applicable
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2012-08-28 14:30:33 -04:00 |
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smt.hh
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includes: fix up code after sorting
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2011-04-15 10:44:14 -07:00 |
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static_inst.cc
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Decode: Pull instruction decoding out of the StaticInst class into its own.
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2011-09-09 02:30:01 -07:00 |
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static_inst.hh
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gcc: Clean-up of non-C++0x compliant code, first steps
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2012-03-19 06:36:09 -04:00 |
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static_inst_fwd.hh
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StaticInst: Merge StaticInst and StaticInstBase.
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2011-09-09 02:40:11 -07:00 |
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thread_context.cc
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SE/FS: Make the functions available from the TC consistent between SE and FS.
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2011-10-31 02:58:22 -07:00 |
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thread_context.hh
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Clock: Add a Cycles wrapper class and use where applicable
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2012-08-28 14:30:33 -04:00 |
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thread_state.cc
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cpu: added assertions to ensure the correct proxies are used
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2012-07-10 22:51:53 -07:00 |
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thread_state.hh
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cpu: added assertions to ensure the correct proxies are used
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2012-07-10 22:51:53 -07:00 |
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timebuf.hh
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Move sched_list.hh and timebuf.hh from src/base to src/cpu.
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2011-01-03 14:35:47 -08:00 |
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translation.hh
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ARM: Squash outstanding walks when instructions are squashed.
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2012-09-25 11:49:40 -05:00 |
