Commit graph

  • cc1f5a4d16 base: remove header file to prevent a macro name collision Brandon Potter 2016-11-09 14:27:37 -0600
  • cc84eb813c syscall_emul: implement fallocate Brandon Potter 2016-12-15 13:16:25 -0500
  • 68e9c0e73b syscall_emul: add support for x86 statfs system calls Brandon Potter 2016-12-15 13:16:03 -0500
  • 4ff1b165d0 syscall_emul: extend sysinfo system call to include mem_unit Brandon Potter 2016-12-15 13:14:41 -0500
  • ecf68fac40 dev: Fix race conditions at terminating dist-gem5 simulations Gabor Dozsa 2016-12-06 17:33:06 +0000
  • 3ef797623a arm, config: Add missing IOCache in bL config Gabor Dozsa 2016-12-06 17:10:36 +0000
  • c642d6fc37 ruby: Remove RubyMemoryControl and associated files Andreas Hansson 2016-12-05 16:49:07 -0500
  • ebd9018a13 stats: Update stats to reflect cache changes Andreas Hansson 2016-12-05 16:48:34 -0500
  • 9e57e4e89d config: Add an option to generate a random topology in memcheck Nikos Nikoleris 2016-12-05 16:48:31 -0500
  • c1a40f9e44 config: Add whole line accesses to improve memchecker's coverage Nikos Nikoleris 2016-12-05 16:48:30 -0500
  • 0054f1ad53 mem: Respond to InvalidateReq when the block is (pending) dirty Nikos Nikoleris 2016-12-05 16:48:29 -0500
  • 9916e4276c mem: Invalidate a blk when servicing the 1st invalidating target Nikos Nikoleris 2016-12-05 16:48:28 -0500
  • 77dfeb8c09 mem: Allow non invalidating snoops on an InvalidateReq MSHR Nikos Nikoleris 2016-12-05 16:48:27 -0500
  • 5ebb8ec46b mem: Don't use hasSharers in the snoopFilter for memory responses Nikos Nikoleris 2016-12-05 16:48:26 -0500
  • 78a97b1847 mem: Always use InvalidateReq to service WriteLineReq misses Nikos Nikoleris 2016-12-05 16:48:25 -0500
  • 3172501a59 mem: Assert that the responderHadWritable is set only once Nikos Nikoleris 2016-12-05 16:48:24 -0500
  • 50812a20f1 mem: Ensure InvalidateReq is considered isForward by MSHRs Andreas Hansson 2016-12-05 16:48:23 -0500
  • e16967941b mem: Make packet debug printing more uniform Nikos Nikoleris 2016-12-05 16:48:21 -0500
  • 61860f2419 cpu: Change traffic generators to use different values for writes Nikos Nikoleris 2016-12-05 16:48:20 -0500
  • 0bd9dfb8de mem: Service only the 1st FromCPU MSHR target on ReadRespWithInv Nikos Nikoleris 2016-12-05 16:48:19 -0500
  • d28c2906f4 mem: Keep track of allocOnFill in the TargetList Nikos Nikoleris 2016-12-05 16:48:18 -0500
  • f7a5de3bec mem: Add support for repopulating the flags of an MSHR TargetList Nikos Nikoleris 2016-12-05 16:48:17 -0500
  • 3d0a537862 hsail: disable asserts to allow immediate operands i.e. 0 with loads Brandon Potter 2016-12-02 18:01:58 -0500
  • 900fd15622 hsail: add stub type and stub out several instructions Brandon Potter 2016-12-02 18:01:57 -0500
  • 86b375f2f3 hsail: add popcount type and generate popcount instructions Brandon Potter 2016-12-02 18:01:55 -0500
  • 3bb3db6194 hsail: add a wavesize case statement to register operand code Brandon Potter 2016-12-02 18:01:52 -0500
  • 69c2d86d68 hsail: generate mov instructions for more arith_types and bit_types Brandon Potter 2016-12-02 18:01:49 -0500
  • 35ba103009 hsail: remove the panic guarding function directives Brandon Potter 2016-12-02 18:01:42 -0500
  • 38708f369b hsail: fix unsigned offset bug in address calculation Tony Gutierrez 2016-12-02 11:40:52 -0500
  • 80607a2a1d ruby: Fix overflow reported by ASAN in MessageBuffer. Matthew Poremba 2016-12-02 11:40:40 -0500
  • 7520331402 tests: Regression stats updated for recent patches Jason Lowe-Power 2016-11-30 17:12:59 -0500
  • 33683bd087 riscv: [Patch 8/5] Added some regression tests to RISC-V Alec Roelke 2016-11-30 17:12:56 -0500
  • ee0c261e10 riscv: [Patch 7/5] Corrected LRSC semantics Alec Roelke 2016-11-30 17:10:28 -0500
  • 84020a8aed riscv: [Patch 6/5] Improve Linux emulation for RISC-V Alec Roelke 2016-11-30 17:10:28 -0500
  • 126c0360e2 riscv: [Patch 5/5] Added missing support for timing CPU models Alec Roelke 2016-11-30 17:10:28 -0500
  • 535e6c5fa4 riscv: [Patch 4/5] Added RISC-V atomic memory extension RV64A Alec Roelke 2016-11-30 17:10:28 -0500
  • 1229b3b623 riscv: [Patch 3/5] Added RISCV floating point extensions RV64FD Alec Roelke 2016-11-30 17:10:28 -0500
  • 070da98493 riscv: [Patch 2/5] Added RISC-V multiply extension RV64M Alec Roelke 2016-11-30 17:10:28 -0500
  • e76bfc8764 arch: [Patch 1/5] Added RISC-V base instruction set RV64I Alec Roelke 2016-11-30 17:10:28 -0500
  • ce2722cdd9 mem: Split the hit_latency into tag_latency and data_latency Sophiane Senni 2016-11-30 17:10:27 -0500
  • 047caf24ba cpu: Remove branch predictor function predictInOrder Jason Lowe-Power 2016-11-30 17:10:27 -0500
  • 2a56260d5d tests: Check for TrafficGen as part of memcheck regression Andreas Hansson 2016-11-30 11:15:21 -0500
  • cd4b26b6ae dev: Fix buffer length when unserializing an eth pkt Michael LeBeane 2016-11-29 13:04:45 -0500
  • 4b7bc5b1e1 scons: fix sanitizer flags with multiple sanitizers Joe Gross 2016-11-28 12:44:54 -0500
  • faaf2d396f style: Add options to select checkers and apply fixes Andreas Sandberg 2016-11-25 10:33:15 +0000
  • ac29b6c6fc util: git pre-commit hook to check staged files Rekai Gonzalez Alberquilla 2016-11-25 10:31:21 +0000
  • b0856ab3b1 ruby: Fix potential bugs in garnet2.0 Jieming Yin 2016-11-21 15:41:30 -0500
  • 14deacf86e gpu-compute: fix segfault when constructing GPUExecContext Tony Gutierrez 2016-11-21 15:40:03 -0500
  • a0d4019abd gpu-compute: init valid field of GpuTlbEntry in default ctor Tony Gutierrez 2016-11-21 15:38:30 -0500
  • f82418acef ruby: add default ctor for MachineID type Tony Gutierrez 2016-11-21 15:37:07 -0500
  • 0799600686 x86: fix issue with casting in Cvtf2i Tony Gutierrez 2016-11-21 15:35:56 -0500
  • 29d38e7576 ruby: init MessageSizeType of SequencerMsg to Request_Control Sooraj Puthoor 2016-11-19 12:39:04 -0500
  • ae55cba281 x86: fix loading/storing of Float80 types Tony Gutierrez 2016-11-19 12:35:14 -0500
  • af934452af ext: Update fputils to rev 13589cd Andreas Sandberg 2016-11-18 18:08:20 +0000
  • b8a162087d stats, alpha: Update ALPHA stats Andreas Hansson 2016-11-17 04:54:18 -0500
  • 4cf7f6c4ca tests, ruby: Move rubytests from ALPHA (linux) to NULL (none) Andreas Hansson 2016-11-17 04:54:16 -0500
  • 6ed567d600 alpha: Remove ALPHA tru64 support and associated tests Andreas Hansson 2016-11-17 04:54:14 -0500
  • 74249f80df hsail,gpu-compute: fixes to appease clang++ Tony Gutierrez 2016-10-26 22:48:45 -0400
  • dc16c1ceb8 dev: Add m5 op to toggle synchronization for dist-gem5. This patch adds the ability for an application to request dist-gem5 to begin/ end synchronization using an m5 op. When toggling on sync, all nodes agree on the next sync point based on the maximum of all nodes' ticks. CPUs are suspended until the sync point to avoid sending network messages until sync has been enabled. Toggling off sync acts like a global execution barrier, where all CPUs are disabled until every node reaches the toggle off point. This avoids tricky situations such as one node hitting a toggle off followed by a toggle on before the other nodes hit the first toggle off. Michael LeBeane 2016-10-26 22:48:40 -0400
  • 48e43c9ad1 ruby: Allow multiple outstanding DMA requests DMA sequencers and protocols can currently only issue one DMA access at a time. This patch implements the necessary functionality to support multiple outstanding DMA requests in Ruby. Michael LeBeane 2016-10-26 22:48:37 -0400
  • 96905971f2 dev: Add 'simLength' parameter in EthPacketData Currently, all the network devices create a 16K buffer for the 'data' field in EthPacketData, and use 'length' to keep track of the size of the packet in the buffer. This patch introduces the 'simLength' parameter to EthPacketData, which is used to hold the effective length of the packet used for all timing calulations in the simulator. Serialization is performed using only the useful data in the packet ('length') and not necessarily the entire original buffer. mlebeane 2016-10-26 22:48:33 -0400
  • de72e36619 gpu-compute: support in-order data delivery in GM pipe Tony Gutierrez 2016-10-26 22:48:28 -0400
  • b63eb1302b gpu-compute, hsail: pass GPUDynInstPtr to getRegisterIndex() Tony Gutierrez 2016-10-26 22:47:49 -0400
  • aa7364276f gpu-compute: use System cache line size in the GPU Tony Gutierrez 2016-10-26 22:47:47 -0400
  • 844fb845a5 gpu-compute, hsail: make the PC a byte address, not an instruction index Tony Gutierrez 2016-10-26 22:47:43 -0400
  • d327cdba07 gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF Tony Gutierrez 2016-10-26 22:47:38 -0400
  • 98d8a7051d gpu-compute: add instruction mix stats for the gpu Tony Gutierrez 2016-10-26 22:47:30 -0400
  • c7a79c9a42 gpu-compute, hsail: call discardFetch() from the WF Tony Gutierrez 2016-10-26 22:47:27 -0400
  • 00a6346c91 hsail, gpu-compute: remove doGm/SmReturn add completeAcc Tony Gutierrez 2016-10-26 22:47:19 -0400
  • 7ac38849ab gpu-compute: remove inst enums and use bit flag for attributes Tony Gutierrez 2016-10-26 22:47:11 -0400
  • e1ad8035a3 gpu-compute: move disassemle() implementation to GPUStaticInst Tony Gutierrez 2016-10-26 22:47:05 -0400
  • 0a6cdff176 gpu-compute, arch: add some methods to the base inst classes for ISA support Tony Gutierrez 2016-10-26 22:47:01 -0400
  • c7d4afd878 ruby: make a RequestDesc class instead of std::pair Tony Gutierrez 2016-10-26 22:46:58 -0400
  • 90b087171b config: Break out base options for usage with NULL ISA Andreas Hansson 2016-10-26 14:50:54 -0400
  • 607c277291 stats: Update stats to reflect recent changes to floats Andreas Hansson 2016-10-19 06:20:04 -0400
  • 71c982ff70 arm: Fix for ARM's Streamline conversion script Shawn Rosti 2016-10-15 15:11:07 -0500
  • 28c84d2886 arm, dev: pl011 console interactivity Bjoern A. Zeeb 2016-10-15 15:11:04 -0500
  • 976ef444b8 syscall: read() should not write anything if reading EOF. Nicolas Derumigny 2016-10-15 15:06:24 -0500
  • 6c72c35519 cpu, arm: Distinguish Float* and SimdFloat*, create FloatMem* opClass Fernando Endo 2016-10-15 14:58:45 -0500
  • 2f5262eb67 config: Make configs/common a Python package Andreas Hansson 2016-10-14 10:37:38 -0400
  • 824c87634d stats: Add more information to uninitialized error Jason Lowe-Power 2016-10-14 09:02:03 -0500
  • c87b717dbd stats: update references Curtis Dunham 2016-10-13 23:21:40 +0100
  • 78dd152a0d mem: add DRAM powerdown current Omar Naji 2016-10-13 19:22:11 +0100
  • 1dc16aff24 mem: Add DRAM low-power functionality Wendy Elsasser 2016-10-13 19:22:11 +0100
  • 7b269f2c95 mem: Add callback to compute stats prior to dump event Wendy Elsasser 2016-10-13 19:22:11 +0100
  • 0dd0d4ee7a mem: Modify drain to ensure banks and power are idled Wendy Elsasser 2016-10-13 19:22:11 +0100
  • 27665af26d mem: Sort memory commands and update DRAMPower Wendy Elsasser 2016-10-13 19:22:10 +0100
  • 61b2b493d4 mem: update DDR3 die revision Omar Naji 2016-10-13 19:22:10 +0100
  • d19dc35b06 mem: add DRAM powerdown timing Omar Naji 2016-10-13 19:22:10 +0100
  • 20e6bb0140 mem: make DDR4 x16 Omar Naji 2016-10-13 19:22:10 +0100
  • bd0c2d5b0b isa,arm: Add missing AArch32 FP instructions Mitch Hayenga 2016-10-13 19:22:10 +0100
  • 68fdccb30b ruby: Fix regressions and make Ruby configs Python packages Andreas Hansson 2016-10-13 03:17:19 -0400
  • 2e5e908579 config: fix typo in cluster topology. Tushar Krishna 2016-10-07 23:56:48 -0400
  • 8c5df4be2e dev, arm: Make GenericTimer param handling more robust Andreas Sandberg 2016-10-07 14:14:44 +0100
  • 22e6f65d72 ruby: Add M5_VAR_USED before variables used only inside assert in garnet2.0. This removes errors when building gem5.fast Tushar Krishna 2016-10-06 21:06:00 -0400
  • dbe8892b76 ruby: garnet2.0 Revamped version of garnet with more optimized single-cycle routers, more configurability, and cleaner code. Tushar Krishna 2016-10-06 14:35:22 -0400
  • b512f4bf71 ruby: remove the original garnet code. Only garnet2.0 will be supported henceforth. Tushar Krishna 2016-10-06 14:35:21 -0400
  • 0962d76827 config: add port directions and per-router delay in topology. This patch adds port direction names to the links during topology creation, which can be used for better printed names for the links or for users to code up their own adaptive routing algorithms. It also adds support for every router to have an independent latency value to support heterogeneous topologies with the subsequent garnet2.0 patch. Tushar Krishna 2016-10-06 14:35:20 -0400
  • 003c08fa90 config: make internal links in network topology unidirectional. This patch makes the internal links within the network topology unidirectional, thus allowing any deadlock-free routing algorithms to be specified from the topology itself using weights. This patch also renames Mesh.py and MeshDirCorners.py to Mesh_XY.py and MeshDirCorners_XY.py (Mesh with XY routing). It also adds a Mesh_westfirst.py and CrossbarGarnet.py topologies. Tushar Krishna 2016-10-06 14:35:18 -0400
  • b9e23a6d74 config: add a separate config file for the network. This patch adds a new file configs/network/Network.py to setup the network, instead of doing that within Ruby.py. Tushar Krishna 2016-10-06 14:35:17 -0400