Intended Use:
A SimObject will call the serializer when it needs the state to be serializable (i.e. switchCPUs, checkpoint, switch memory access model). It will call the requestSeialization() function.
The Serializer will signal all the objects in its list to drain their state via the SimObject method drain(). Drain() has a default implementation to just signal done.
When each object is drained it will signal the Serializer that it has drained via the signalDrained() function.
The Serializer will collect these signals, when all have drained it will signal the initial requestor via serializationComplete() method in the SimObject.
Once that object is done, it will signal the Serializer to resumeExecution().
The Serializer will signal all the objects in its list to resume via the resume() method on the SimObject.
SConscript:
Add serializer object to build list
sim/sim_object.cc:
Add default behavior for drain (just signal finished, must be overided if you really must drain something)
sim/sim_object.hh:
Add functions for serializer
--HG--
extra : convert_revision : 15aa2d1b42010c2d703bef9114c11d079c216170
Now all the variations of FP should be implemented correctly in the decoder.
The new formats and functions supporting these functions need to be implemented for
some of the FP stuff but for the most part things are looking like their "supposed to"...
arch/mips/isa/decoder.isa:
Fixes for Paired-Single FP Compare Operations...
Now all the variations of FP should be implemented correctly in the decoder.
arch/mips/isa/formats/fp.isa:
Add new PS formats
arch/mips/isa_traits.cc:
Add skeleton overloaded round & truncate functions
arch/mips/isa_traits.hh:
declare overloaded functions
--HG--
extra : convert_revision : 15d5cf7b08ac2dc9ebcd6b268e92d4abffdd8597
Auxiliary Functions and Formats for FP in general
arch/mips/isa/decoder.isa:
ISA Parser doesnt accept operands of different types in one instruction so fix this for unorderedFP functions...
Add basic support for Paired Singled (PS) FP ops which happen to be part of the MIPS 32-ASE but turned out to
be included in the MIPS32ISA manual... The PS instructions allow SIMD in a pipeline...
arch/mips/isa/formats/fp.isa:
Add some more Formats for FP operation. I will add some auxiliary code through these formats
to alleviate code redundancy in the decoder.isa
arch/mips/isa/operands.isa:
Add operands for Paired Singles Ops
arch/mips/isa_traits.cc:
removed convert&round function and replace with fpConvert.
The whole "rounding mode" stuff is something that should be considered for full-system mode...
Also added skeletons for the unorderedFP,truncFP,and condition code funcs.
arch/mips/isa_traits.hh:
declare some Functions
arch/mips/types.hh:
add new conversion types
--HG--
extra : convert_revision : 79251d590a27b74a3d6a62a2fbb937df3e59963f
into zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem
--HG--
extra : convert_revision : 0a146eed200abd2c18f135b112987c5cf91a649b
There still needs to be a work around to handle the paired singles operations ...
arch/mips/isa/decoder.isa:
More revamping of the floating point ops in decoder.isa. Change all of the
"convert and round" functions to fpConvert. Also, the utility functions
roundFP, truncFP, and unorderedFP are in place everywhere. Things
have been set up to appropriately use the FP condition codes in the decoder.isa
The fp.isa format file and the isa_traits.cc file now needed to be updated
to implement the appropriate "backend" operations/functionality...
arch/mips/isa_traits.hh:
Remove convert & round functions
Add roundFP, truncFP,unorderedFP, and the get/setFPconditionCode
functions
arch/mips/isa_traits.cc:
Add utility functions
--HG--
extra : convert_revision : 3d6708388abae5b432467f528d52e6343afecd9c
Now handles instructions for FP compares in single or double recision
arch/mips/isa/decoder.isa:
Now handles instructions for FP compares in single or double recision
--HG--
extra : convert_revision : eb3a13616e6736bf2d1ead0b816dda8c6099b20f
Basic Code for Floating Point Compare with Single Precision Floats
Added.
arch/mips/isa/decoder.isa:
Basic Code for Floating Point Compare with Single Precision Floats
Added.
--HG--
extra : convert_revision : 56b14da1e9d987c2d2090fd2f79af8b12fe8d2ec
Added support for FP compare instructions. Somehow these flew beneath
my radar. Also, I start to use special FP utility functions in FP code.
Right now, they are defined in isa_traits.hh but may be moved in the
future
arch/mips/isa/decoder.isa:
Added support for FP compare instructions. Somehow these flew beneath
my radar. Also, I start to use special FP utility functions in FP code.
Right now, they are defined in isa_traits.hh but may be moved in the
future
--HG--
extra : convert_revision : 84a3b66882f3977ce9c1356cf466d62a7fd8bf19
Debug FP instructions to handle these FP insts
arch/mips/isa/bitfields.isa:
add Bitfield for Floating Point Condition Codes
arch/mips/isa/decoder.isa:
Follow instruction naming style with FP single insts
Send the float value to the convert&round functions in single FP
add ll inst support
add 'token' sc support
arch/mips/isa_traits.cc:
Add SINGLE->WORD, WORD->SINGLE, & WORD->DOUBLE conversions
arch/mips/regfile.hh:
update header files
arch/mips/regfile/float_regfile.hh:
Add more FP registers
--HG--
rename : arch/mips/int_regfile.hh => arch/mips/regfile/int_regfile.hh
rename : arch/mips/misc_regfile.hh => arch/mips/regfile/misc_regfile.hh
extra : convert_revision : 92faf0bfd8542ade762ac569ec158d198f6a9c7e
Now we are to the point where more benchmarks and instruction-coverage
is necessary to totally verify/validate correct operation across
all MIPS instructions
arch/mips/isa_traits.hh:
fix for reading double values ... must rearrange bits before using void* to read double.
configs/test/hello_mips:
real hello world MIPS binary
--HG--
extra : convert_revision : 153de1f8a830882c6972bd0bdb56da818f614def
register with the higher # contains the most significant bytes...
arch/mips/isa/decoder.isa:
divide instruction fixes
arch/mips/isa_traits.cc:
use double as argument to cvt & round function.
clean up cout statements in function.
arch/mips/isa_traits.hh:
In MIPS the higher # reg of a doubles pair is ALSO the most significant reg.
Once I switched this the basic MIPS FP test I had worked.
--HG--
extra : convert_revision : 45c80df229e6174d0b52fc7cfb530642b1f1fc35
into zizzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem
--HG--
extra : convert_revision : c48a8857f5a520ff8061eb3d8f08dcd43661e68c
Edit the convert_and_round function which access FloatRegFile
arch/isa_parser.py:
recognize when we are writing a 'uint64_t' FloatReg and set the width appropriately
arch/mips/isa/decoder.isa:
Send a 'float' to the convert function instead of a unsigned word. Do this so we dont have to worry about the
bit manipulation ourselves. We can just concern ourselves with values.
Use unsigned double to get movd...
arch/mips/isa/formats/fp.isa:
float debug statement
arch/mips/isa_traits.cc:
add different versions of convert_and_round functions
arch/mips/isa_traits.hh:
Use an array of uint32_t unsigned integers to represent the Floating Point Regfile
configs/test/hello_mips:
basic FP program
cpu/simple/cpu.hh:
spacing
--HG--
extra : convert_revision : a6fca91ad6365c83025f1131d71fa1b8ee76d7bc
fix very annoying not-compiler bug
arch/sparc/regfile.hh:
You have not included an out-of-class definition of your static members. See [9.4.2]/4 and about a billion gcc bug reports.
If statements get around the problem through some magic, and than seems nicer that putting a definition of them in a c file
somewhere.
cpu/simple/cpu.cc:
get() and set() do the conversion now
dev/io_device.hh:
need get() and set() defentions in all the devices
mem/packet.cc:
mem/packet.hh:
move code from packet.hh to packet.cc
mem/physical.cc:
packet_impl needed for templated packet functions
--HG--
extra : convert_revision : 6c11842aa928d9af7b4cabe826306fe1fe09e693
arch/sparc/isa/decoder.isa:
Made sure if a register was assigned to along some control path, then all paths on which no exception would block commit set a value as well. Also, Rs1 is treated as signed for bpr instructions.
arch/sparc/isa/formats/integerop.isa:
Added an IntOpImm11 class which sign extends the SIMM11 immediate field.
arch/sparc/isa/formats/mem.isa:
Fixed how offsets are used, and how disassembly is generated.
arch/sparc/linux/process.cc:
Added fstat and exit_group syscalls.
--HG--
extra : convert_revision : 3b4427d239d254a92179a4137441125b8a364264
configs/test/fs.py:
update fs.py to use a bus bridge
cpu/simple/cpu.hh:
cpu should just return that it doesn't snoop any address ranges
python/m5/objects/System.py:
move boot_osflags to system
--HG--
extra : convert_revision : b4256df7eada7e65b69513361de8bffc3fdd680b
SConscript:
add new cc files to scons
mem/bus.cc:
mem/bus.hh:
implement addressRanges() on the bus.
propigate address ranges to anyone who is interested stripping out ranges of who your propigating to (to avoid livelock)
mem/packet.hh:
add intersect function that returns true if two packets touch at least one byte of the same data (for functional access)
add fixPacket() that will eventually take the correct action giving a timing and functional packet, right now it panics
mem/physical.cc:
Don't panic if the physical memory recieves a status change, just ignore.
--HG--
extra : convert_revision : d470d51f2fb1db2700ad271e09792315ef33ba01
arch/mips/isa/decoder.isa:
Fix Reg. Operands for FP Conversion Instructions - Must Make Sure That You use 'uw' or 'ud' as needed.
arch/mips/isa_traits.cc:
if a conversion function isnt implemented yet, than have M5 panic...
(plan to implement SINGLE_TO_DOUBLE first)
--HG--
extra : convert_revision : 6a7f703a5d65139d3981a8753c31fc8f5bf313cf
Have FP conversion instructions use re-defined convert_and_round() function
arch/mips/isa/decoder.isa:
Use lower two bits of FCSR reg to determine rounding mode (may want to move this out of decoder.isa and into a template)
Have FP conversion instructions to use re-defined convert_and_round() function
arch/mips/isa/formats/util.isa:
Remove convert_and_round function from here
arch/mips/isa_traits.cc:
Define convert_and_round function here
arch/mips/isa_traits.hh:
Use "enums" to define FP conversion types & Round Modes
Declare convert_and_round function here
--HG--
extra : convert_revision : 0f4f8c1732a53b277361559ea71af2a1feb4fc64
Use Load/Store Float Memory Formats for FP mem insts
Fix Load/Store into FP to not create a "nop" if it sees reg 0 at the defintion
arch/mips/isa/decoder.isa:
Rewrite CFC1 & CTC1 instruction definitions
Use Load/Store Float Memory Formats for FP mem insts
arch/mips/isa/formats/fp.isa:
comment changes
arch/mips/isa/formats/mem.isa:
Fix Load/Store Float Memory Formats
--HG--
extra : convert_revision : ef1cb7a78452f8dff044b05c89e61bec866bf1b7
after merge from head. Checkpointing may need some work now. Endian-happiness still not complete.
SConscript:
add all devices back into make file
base/inet.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/pktfifo.cc:
dev/pktfifo.hh:
rename PacketPtr EthPacketPtr so it doesn't conflict with the PacketPtr type in the memory system
configs/test/fs.py:
add nics to fs.py
cpu/cpu_exec_context.cc:
remove this check, as it's not valid. We may want to add something else back in to make sure that no one can delete the
static virtual ports in the exec context
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
use new methods for accessing packet data
dev/ide_disk.cc:
add some more dprintfs
dev/io_device.cc:
delete packets when we are done with them. Update for new packet methods to access data
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
dev/uart8250.cc:
dev/uart8250.hh:
mem/physical.cc:
mem/port.cc:
dUpdate for new packet methods to access data
dev/ns_gige.cc:
Update for new memory system
dev/ns_gige.hh:
python/m5/objects/Ethernet.py:
update for new memory system
dev/sinic.cc:
dev/sinic.hh:
Update for new memory system. Untested as need to merge in head because of kernel driver differences between versions
mem/packet.hh:
Add methods to access data instead of accessing it directly.
--HG--
extra : convert_revision : 223f43876afd404e68337270cd9a5e44d0bf553e
SConscript:
compile ide devices
base/chunk_generator.hh:
add another parameter to the chuck generator called complete() which
returns the number of bytes transfered so far. Very useful for
adding to a pointer.
configs/test/fs.py:
Add ide disk to fs test configuration
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
update for new memory system
mem/bus.cc:
support devices that return multiple ranges
remove old ranges before using new info
mem/packet.hh:
make senderstate void* per steve's request that we use every
construct possible in C++
mem/physical.cc:
have memory stamp the packet with the time.
mem/physical.hh:
actually set the memory latency variable
python/m5/objects/Device.py:
Add DmaDevice
python/m5/objects/Ide.py:
Ide disk no longer has a physmem pointer
python/m5/objects/Pci.py:
update pci device for newmem
python/m5/objects/PhysicalMemory.py:
add latency parameter for physical memory
sim/byteswap.hh:
use fast architecture dependent byteswap calls if they exist
--HG--
extra : convert_revision : e3cf2e8f61064ad302d94bc22010a00c59f3f793
and maximum debugging in for debug target.
No such thing as -O5 in GCC, so might as well just use -O3
--HG--
extra : convert_revision : f2e02c4f95c57eace010e75e2457193353088308
arch/alpha/isa/decoder.isa:
Fixed up Alpha to pass the syscall number directly to the syscall function.
arch/mips/isa/decoder.isa:
Fixed up MIPS to pass the syscall number directly to the syscall function.
arch/mips/isa/operands.isa:
Added an R2 operand which is passed to the syscall function as the syscall number to use.
--HG--
extra : convert_revision : 066d486cd6a2761b29e413c6d526c268788975f3
arch/sparc/isa/base.isa:
Added a set of abbreviations for the different condition tests.
arch/sparc/isa/decoder.isa:
Fixes and additions to get syscall emulation closer to working.
arch/sparc/isa/formats/branch.isa:
Fixed branches so that the immediate version actually uses the immediate value
arch/sparc/isa/formats/integerop.isa:
Compute the condition codes -before- writing to the state of the machine.
arch/sparc/isa/formats/mem.isa:
An attempt to fix up the output of the disassembly of loads and stores.
arch/sparc/isa/formats/trap.isa:
Added code to disassemble a trap instruction. This probably needs to be fixed up so there are immediate and register versions.
arch/sparc/isa/operands.isa:
Added an R1 operand, and fixed up the numbering
arch/sparc/isa_traits.hh:
SyscallNumReg is no longer needed, the max number of sources and destinations are fixed up, and the syscall return uses xcc instead of icc.
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
Added a getresuidFunc syscall implementation. This isn't actually used, but I thought it was and will leave it in.
arch/sparc/process.cc:
arch/sparc/process.hh:
Fixed up how the initial stack frame is set up.
arch/sparc/regfile.hh:
Changed the number of windows from 6 to 32 so we don't have to worry about spill and fill traps for now, and commented out the register file setting itself up.
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.hh:
sim/process.cc:
sim/process.hh:
Changed the syscall mechanism to pass down the syscall number directly.
--HG--
extra : convert_revision : 15723b949a0ddb3d24e68c079343b4dba2439f43
