Commit graph

3278 commits

Author SHA1 Message Date
Korey Sewell
77a2f97c35 Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-mips

--HG--
extra : convert_revision : 9bdde9b5bd3049744451eda1134f080b7c4b1b59
2006-03-15 23:38:55 -05:00
Ali Saidi
7359e2df01 implement the Tcc instruction to call syscall.
arch/sparc/isa/bitfields.isa:
    the trap field is 7:0
arch/sparc/isa/decoder.isa:
    add code to in the Tcc instruction to call a syscall
arch/sparc/isa_traits.hh:
    We need the syscall num register

--HG--
extra : convert_revision : 0861ec1dd8c7cac57765b22bc408fdffbe63fe2a
2006-03-15 18:12:01 -05:00
Ron Dreslinski
beff73f1fa Merge zizzer:/z/m5/Bitkeeper/m5
into  zazzer.eecs.umich.edu:/z/rdreslin/m5bk/m5

--HG--
extra : convert_revision : a4de274ec50821218121ba38f9215f2348262c27
2006-03-15 17:53:49 -05:00
Ron Dreslinski
52cc2d5bad Add support for conditional compiling in of prefetchers.
--HG--
extra : convert_revision : 357554632f102224357c8c3848bc4bc7cbb9dc54
2006-03-15 17:53:21 -05:00
Ali Saidi
97e424982a add translations for new sections that are mmapped or when the brk
is changed
Add a default machine width parameter
Arch based live processes

arch/alpha/linux/process.cc:
arch/alpha/linux/process.hh:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
arch/alpha/tru64/process.hh:
arch/mips/linux_process.cc:
arch/mips/process.cc:
arch/mips/process.hh:
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
arch/sparc/process.cc:
arch/sparc/process.hh:
configs/test/test.py:
python/m5/objects/Process.py:
sim/process.cc:
sim/process.hh:
    Architecture based live processes
arch/mips/isa_traits.hh:
arch/sparc/isa_traits.hh:
    Add a default machine width parameter
mem/port.hh:
    gcc 4 really wants  a virtual destructor
sim/byteswap.hh:
    remove the comment around long and unsigned long even though uint32_t
    and int32_t are defined. Seems to work with gcc 4 and 3.4.3.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    add translations for new sections that are mmapped or when the brk
    is changed

--HG--
extra : convert_revision : e2f9f228113c7127c87ef2358209a399c30ed5c6
2006-03-15 17:04:50 -05:00
Korey Sewell
e2b558112b add mips simple test in config directory
configs/test/hello_mips:
    hello world mips binary

--HG--
extra : convert_revision : 5a495e1bfb1cbddc0879f8e80c02bd7435a02acb
2006-03-15 16:29:18 -05:00
Korey Sewell
c32b4ecac1 infinitesimal small baby steps toward MIPS actually working
arch/mips/isa/formats/branch.isa:
    let user know that we alter r31 in disassembly
arch/mips/isa_traits.cc:
    add copyRegs function ...
    comment out serialize float code for now
arch/mips/isa_traits.hh:
    make FloatRegFile a class ... change values of architectural regs
arch/mips/process.cc:
    change MIPS to Mips
base/loader/elf_object.cc:
    get global pointer initialized to a value
base/loader/elf_object.hh:
    Add global_ptr to elf_object constructor
base/loader/object_file.hh:
    MIPS to Mips
base/traceflags.py:
    SimpleCPU trace flag
cpu/simple/cpu.cc:
    DPRINTF flags for SimpleCPU
cpu/static_inst.hh:
    Add Decoder functions to static_inst.hh

--HG--
extra : convert_revision : 0544a8524d3fe4229428cb06822f7da208c72459
2006-03-15 16:26:40 -05:00
Kevin Lim
dc75cf121c Don't access init_regs directly. This does not affect newmem; Steve already changed this in newmem.
--HG--
extra : convert_revision : 19b1ed0bb2c8bcde72843e62f73635e84adf95b5
2006-03-15 15:38:14 -05:00
Korey Sewell
0d8cfed042 Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem

--HG--
extra : convert_revision : 054833d2f7019b9a1247efc4451ccb143242059d
2006-03-14 18:30:09 -05:00
Korey Sewell
6547e8882b Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu
SConscript:
    Separate Alpha EIO from syscall building for other architectures
arch/isa_specific.hh:
    change MIPS constant to 34k
arch/mips/isa/decoder.isa:
    Allow sll,ssnop,nop, and ehb to be determined through decoder using
    the different types of default cases
arch/mips/isa/formats/branch.isa:
    Delete debug code
arch/mips/isa/formats/noop.isa:
    add a Nop format
arch/mips/isa_traits.hh:
    use constants instead of enums
arch/mips/process.cc:
    point to the correct header file
cpu/simple/cpu.cc:
    Output the actual fault name
sim/process.cc:
    Inititalize NNPC

--HG--
extra : convert_revision : adb0026dfad25b14c98fb03c98bfe9c681bba6f8
2006-03-14 18:28:51 -05:00
Ron Dreslinski
7405a3530b Remove unneeded header files.
Add some forward declerations.
Fix ordering problem of variables in constructor (see sourceforge)
Factor out code from header into _impl file to speed building process (keep cache_builder smaller in size)

--HG--
extra : convert_revision : 20087f88f95628af716094e09c2287e09580149e
2006-03-14 18:03:34 -05:00
Gabe Black
67a1b7a61b added *.swp
--HG--
extra : convert_revision : 90e4387da5bbe5e3f05c4d25713d6a362c6724e8
2006-03-14 16:41:38 -05:00
Gabe Black
78b9a789d7 Fixed up after a hand merge.
arch/alpha/utility.hh:
    Got rid of unnecessary extern and static qualifiers, and fixed up the hand merge.
arch/sparc/regfile.hh:
    Fixed up SPARC after a hand merge.

--HG--
extra : convert_revision : 56e2d90ddd144f3386dbea50fa96cfc461d46b81
2006-03-14 16:39:59 -05:00
Gabe Black
fa763d2ecf Merge m5.eecs.umich.edu:/bk/newmem
into  ewok.(none):/home/gblack/m5/newmem

cpu/cpu_exec_context.cc:
    Hand merge

--HG--
rename : arch/alpha/registerfile.hh => arch/alpha/regfile.hh
extra : convert_revision : bd18966f7c37c67c2bc7ca2633b58f70ce64409c
2006-03-14 16:08:32 -05:00
Gabe Black
efe46430fa Moved registerfile.hh to regfile.hh
--HG--
rename : arch/alpha/registerfile.hh => arch/alpha/regfile.hh
extra : convert_revision : 27df93cd2259dab85057f966c801c0db2cb6f022
2006-03-14 16:05:44 -05:00
Gabe Black
538919445c Added the sparc regfile.hh to bitkeeper
--HG--
extra : convert_revision : 7bc8ca989a4f0225ad5644980c8dbc34b0c0e35f
2006-03-14 16:01:21 -05:00
Gabe Black
bb8b27d5a8 SPARC clean up towards compilability.
--HG--
extra : convert_revision : 156670995fa61599e763b002cd70f31f19b108d1
2006-03-14 15:59:19 -05:00
Gabe Black
160d1374a7 Missed this in the float register changeset.
--HG--
extra : convert_revision : 35e967fb39fc16e38da13ab1a093d7d0916cffeb
2006-03-14 15:58:05 -05:00
Gabe Black
d745f4d664 Moved some full system functions into utility.hh
--HG--
extra : convert_revision : dd2cd11213890b30975fdabdf7d9bc4652511434
2006-03-14 15:57:28 -05:00
Gabe Black
8e4ec55703 Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt.
arch/alpha/arguments.cc:
    Renamed readFloatRegInt to readFloatRegBits
arch/alpha/ev5.cc:
    Removed the Double from setFloatRegDouble
arch/alpha/registerfile.hh:
    Changed the floating point register file from a union of arrays to a class with appropriate accessor functions. The interface is necessary for SPARC.
arch/alpha/types.hh:
    Changed the FloatReg type from a union of uint64_t and double to a double, and defined a new type FloatRegBits which is a uint64_t and is used to return the bits which compose a floating point register rather than the value of the register.
arch/isa_parser.py:
    Adjusted the makeRead and makeWrite functions to generate the new versions of readFloatReg and setFloatReg.
base/remote_gdb.cc:
kern/tru64/tru64.hh:
    Replaced setFloatRegInt with setFloatRegBits
cpu/cpu_exec_context.cc:
    Removed the duplicated code for setting the floating point registers, and renamed the function to setFloatRegBits and readFloatRegBits.
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/o3/alpha_cpu_impl.hh:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/regfile.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.hh:
    Implemented the new versions of the floating point read and set functions.
cpu/simple/cpu.cc:
    Replaced setFloatRegDouble with setFloatReg

--HG--
extra : convert_revision : 3dad06224723137f6033c335fb8f6395636767f2
2006-03-14 15:55:00 -05:00
Kevin Lim
f045b110cf Have a copyRegs function defined in the ISA that copies registers from one ExecContext to another ExecContext. This makes it easier for anything that needs to copy architected registers to do so in an ISA independent fashion.
arch/alpha/ev5.cc:
    copyIprs now copies from a source ExecContext to a destination ExecContext.
arch/alpha/registerfile.hh:
    Have ISA specific functions to copy all architected registers from one ExecContext to another.
cpu/cpu_exec_context.cc:
    Call the ISA in order to copy any architected registers.

--HG--
extra : convert_revision : 056cc3b3a9f345535d5a57c6524b114bbd5ae3c8
2006-03-13 17:04:24 -05:00
Steve Reinhardt
af975813e5 Add simple eio-based test.
--HG--
extra : convert_revision : 969e8fddad1b87eaa294857945a4c46cb175984d
2006-03-12 17:24:02 -05:00
Steve Reinhardt
f03e1fb5ab Oops, this goes with the previous changeset!
mem/mem_object.hh:
    Change getPort() to be anonymous by default.

--HG--
extra : convert_revision : 6998885ddccfbf26bc470112f40c3f19913ba7e2
2006-03-12 17:23:18 -05:00
Steve Reinhardt
e2b329d574 Replace Memory with MemObject; no need for two different levels of hierarchy there.
Get rid of addPort().
Change getPort() behavior on PhysicalMemory.

SConscript:
cpu/simple/cpu.hh:
sim/system.cc:
sim/system.hh:
    Replace Memory with MemObject.
cpu/base.hh:
    No need to declare Port here anymore.
cpu/cpu_exec_context.hh:
    Need PageTable definition.
cpu/simple/cpu.cc:
mem/physical.cc:
mem/physical.hh:
    Replace Memory with MemObject.
    Get rid of addPort(); allow getting anonymous ports with getPort().
mem/translating_port.hh:
    Remove unneeded header.
sim/process.cc:
    Replace Memory with MemObject.
    Change how initialization port gets set up to deal with change in
    addPort()/getPort().  Current solution is not ideal but it works.
sim/process.hh:
    Remove unneeded headers and declarations.
    Make LiveProcess::getDesc() abstract instead of panicing if called.
sim/syscall_emul.hh:
    Fix includes.

--HG--
extra : convert_revision : 11d4ffb54230038afcf7219cc46e51f809329a2f
2006-03-12 17:21:59 -05:00
Steve Reinhardt
2d9c9dba37 Get rid of "Functional" suffix from (read|write)(Blob|String) functions.
--HG--
extra : convert_revision : 1456308af0fd686dff53ec1baddd7747354e1c0a
2006-03-12 16:38:16 -05:00
Steve Reinhardt
159cee1719 Clean up arch/*/process.hh includes and std namespace issues.
arch/alpha/process.cc:
arch/mips/process.cc:
arch/sparc/process.cc:
    You really do need the headers in the .cc file.
arch/alpha/process.hh:
    Don't include unnecessary headers in another header.
    Replace with forward class declarations.
arch/mips/process.hh:
arch/sparc/process.hh:
    Don't include unnecessary headers in another header.
    Replace with forward class declarations.
    Also fix std namespace... no "using" in header files!

--HG--
extra : convert_revision : f2cd953d0f4a212bb8148cc54c329aa3c18deb89
2006-03-12 16:27:52 -05:00
Steve Reinhardt
e1985e0200 More memory system cleanup:
- Get rid of unused ProxyMemory class (replaced by TranslatingPort).
- Get rid of remaining unused prot_* functions.

mem/physical.cc:
mem/physical.hh:
mem/port.hh:
    Get rid of remaining unused prot_* functions.

--HG--
extra : convert_revision : f16c208f4e4c38bd6bb3626339674c9278da9e07
2006-03-12 16:11:41 -05:00
Steve Reinhardt
8dc2374b0b Fix bk ignore paths for new build options directory structure.
--HG--
extra : convert_revision : daf67203a26c8139f810cc4e8d16e652373f305b
2006-03-12 16:03:46 -05:00
Steve Reinhardt
37c860d334 Get rid of validInstAddr() & validDataAddr().
SE mode can now use page tables to determine which addresses are valid.

sim/process.cc:
sim/process.hh:
    Get rid of validInstAddr() & validDataAddr().
    SE mode can now use page tables to determine which addresses are valid.
    Also get rid of some Process object fields that were only used by those functions.

--HG--
extra : convert_revision : 74a25c0c2453bfc598eedacdbfccea1cf6493ba6
2006-03-12 16:01:41 -05:00
Steve Reinhardt
84a6044f31 Add "using namespace TheISA" to syscall emulation functions so they pick up the right definitions of htog/gtoh etc.
--HG--
extra : convert_revision : 7ee949a2151f9a8d158815a7dffba6c19779f282
2006-03-12 15:51:48 -05:00
Steve Reinhardt
71c2c962db Clean up "using" declarations.
arch/alpha/isa_traits.hh:
    No unprotected "using" in header files.
cpu/simple/cpu.cc:
    Fix ISA namespace "using" statement.

--HG--
extra : convert_revision : 317ea40f8de00748d7613a0116edab05770bdc72
2006-03-12 15:14:07 -05:00
Korey Sewell
57d53f8a9d Merge zizzer:/bk/newmem
into  zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem

--HG--
extra : convert_revision : b101fa550567d5a9f5de6c2d8c3f67829ae050c1
2006-03-12 05:58:28 -05:00
Korey Sewell
4d19bbeeeb MIPS is back to compiling and building now!
arch/alpha/isa_traits.hh:
    used for SimpleCPU instead of explicitly calling the namespace we declare in isa_traits.hhs
    so other archs. can use SimpleCPU
arch/mips/SConscript:
    dont include common_syscall or tru64
arch/mips/faults.cc:
arch/mips/faults.hh:
arch/mips/isa/formats/unimp.isa:
arch/mips/isa/formats/unknown.isa:
    Change Faults to new format
arch/mips/isa/decoder.isa:
    Fix readMiscReg access
    Made change so that you cant explicitly tell if a instruction nop,ehb,or ssnop... These are all variants
    of the sll instruction so I may need to make a separte class of instructions to handle thse better
arch/mips/isa/includes.isa:
    add isa_traits.hh and MipsISA included into every auto-gen file
arch/mips/isa_traits.cc:
    create copyMiscRegs function...
    delete useless code
arch/mips/isa_traits.hh:
    clean up for build
arch/mips/linux_process.cc:
    mem is now getMemPort(), linux process objects now take in a system argument
arch/mips/linux_process.hh:
    new argument for linux process
arch/mips/process.cc:
    add system
arch/mips/process.hh:
    add system variable
cpu/cpu_exec_context.cc:
    Change AlphaISA to TheISA
cpu/exec_context.hh:
    add readNextNPC and setNextNPC functions
cpu/simple/cpu.cc:
    include isa_traits for namespace declariation
cpu/simple/cpu.hh:
    PC & NPC access/modify functions
arch/mips/utility.hh:
    file needed for compile

--HG--
extra : convert_revision : 29a327e79c51c6174a6e526aa68c7aab7e7eb535
2006-03-12 05:57:34 -05:00
Steve Reinhardt
18ba0f8548 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into  zizzer.eecs.umich.edu:/z/stever/bk/newmem-head

--HG--
extra : convert_revision : a784e60b7f79d70b09052fc4a8ae35a821d307dc
2006-03-12 01:07:58 -05:00
Steve Reinhardt
918b3f59c2 Get rid of obsolete header that had only one declaration of
an obsolete function that doesn't exist.

arch/alpha/tru64/process.cc:
sim/process.cc:
    Don't include useless header.

--HG--
extra : convert_revision : 1dd5edeb0703e2190b89ea5ff563df4c95b7cf59
2006-03-12 01:05:01 -05:00
Steve Reinhardt
38dd86ce72 Fix TranslatingPort access functions to:
- know nothing about Fault objects (as it should be)
- call fatal() by default on accesses to unmapped addrs
- provide "try" versions for callers that are prepared to handle failure

mem/translating_port.cc:
mem/translating_port.hh:
    Memory system objects should not return Fault objects, just errors.
    Half the time we don't check the return code anyway, so make
    default version of the access functions call fatal().
    Provide "try*" versions that return a bool for places where we
    really are going to check the return code.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Need to use new "tryReadString" here since we actually check the return code.

--HG--
extra : convert_revision : 039737398ef183904dc382c05912ab96cd1d4a51
2006-03-12 00:40:29 -05:00
Steve Reinhardt
1f5266e79d Minor fix to fault message in SimpleCPU.
cpu/simple/cpu.cc:
    Fix up fault message... 0x prefix is redundant when using %p.

--HG--
extra : convert_revision : 329d4417287a036a0f24544f73f48c0e19059425
2006-03-12 00:34:02 -05:00
Steve Reinhardt
5ac98a7ec1 Fix EIO handling for new memory system.
SConscript:
    Compile in eio.cc again.

--HG--
extra : convert_revision : a40f251d6b400fce61f91a9cb1cdae3ca21df4a7
2006-03-12 00:30:55 -05:00
Steve Reinhardt
acd169fa94 Tweak exit() message.
sim/syscall_emul.cc:
    Make message for exit() more obvious.

--HG--
extra : convert_revision : 5cf7ddb19761e8ff071635368ea77c24d8857c7e
2006-03-11 22:02:34 -05:00
Steve Reinhardt
1141610a01 Bump up NFS wait time in qdo (since this has been causing
problems in pool regressions).

util/qdo:
    Bump up hardcoded NFS wait time from 45 sec to 90 sec (and
    print threshold from 10 sec to 30 sec).  Would be even
    nicer to make these cmd-line params, but nobody would use
    them anyway.

--HG--
extra : convert_revision : 1e9b3ad43a5dbf5e30758069e5a8cde3749cc1a6
2006-03-11 22:01:33 -05:00
Gabe Black
0cbb43ebb1 Added registerfile.hh and utility.hh
--HG--
extra : convert_revision : f825fcf53e716efc62e541692cb4ed26366abc26
2006-03-11 14:26:34 -05:00
Gabe Black
3ed62ad025 Work towards factoring isa_traits.hh into smaller, more specialized files.
arch/SConscript:
    Sorted the switch headers, and added registerfile.hh, constants.hh, types.hh, and utility.hh.
arch/alpha/isa_traits.hh:
    Moved the register file types to registerfile.hh, small functions to utility.hh, and cleaned out alot of stuff that isn't necessary anymore.
base/loader/ecoff_object.cc:
base/loader/elf_object.cc:
cpu/pc_event.hh:
cpu/static_inst.hh:
mem/port.hh:
sim/faults.cc:
sim/system.hh:
    base/misc.hh isn't included through isa_traits.hh anymore.
cpu/simple/cpu.cc:
    Added include for arch/utility.hh

--HG--
extra : convert_revision : 24f65f330f87e3c909c939596cfcf48336022eaf
2006-03-10 19:11:27 -05:00
Gabe Black
e3651fde0b Moved MaxAddr.
sim/host.hh:
    Moved MaxAddr from arch to here, since it depends only on the Addr type.

--HG--
extra : convert_revision : e5eaa0bfbe2a376b0d309c517687b3d9d63e407f
2006-03-10 18:26:12 -05:00
Gabe Black
731ea068ab Got rid of some dead code.
--HG--
extra : convert_revision : 591312f1e57953a3b03639cef1a3ff6bd08f5f67
2006-03-10 18:20:14 -05:00
Gabe Black
008bca4cad Moved some constants into constants.hh
--HG--
extra : convert_revision : aeb0242b9f3c24c2ff0623bbc31a2373d52b875f
2006-03-10 18:18:18 -05:00
Gabe Black
ed058c4e89 Got rid of unnecessary fault_addr function.
--HG--
extra : convert_revision : ff265b76cb5110736e67d1779e5d100a607da70e
2006-03-10 18:03:00 -05:00
Gabe Black
b6b244eb31 Got rid of forward declaration of RegFile and MiscRegFile, since they aren't necessary anymore.
--HG--
extra : convert_revision : faf5bba3720204fe399778ffaae72f9845b3baff
2006-03-10 18:00:25 -05:00
Gabe Black
22ee0e5734 Pushed the InternalProcReg type into the MiscRegFile, so it's not needed here any more.
--HG--
extra : convert_revision : 443ae3fe4d7ac99ef5cbd1366266604bb13761c3
2006-03-10 17:57:44 -05:00
Gabe Black
2ee6e7ab5f Added ev5.hh to files which should include it directly, now that it isn't included within isa_traits.hh
--HG--
extra : convert_revision : e49935da238a299e681f9137ad3c0b7dc0e226a3
2006-03-10 17:56:41 -05:00
Gabe Black
03f9716a0a Moved constants from isa_traits.hh into constants.hh.
arch/alpha/isa_traits.hh:
    Moved constants from isa_traits.hh into constants.hh. Also removed the dependence on ev5.hh

--HG--
extra : convert_revision : f7a03c4ffb1394dcca5a5a96da468c3ff14e1974
2006-03-10 17:55:47 -05:00