Commit graph

2665 commits

Author SHA1 Message Date
Nathan Binkert
cf3667a0e4 add error bars and more options for legend placement
util/stats/barchart.py:
    Add support for error bars
util/stats/barchart.py:
    add support to choose between a legend inside or
    outside the figure.

--HG--
extra : convert_revision : 14273e385c106bf27a2013991f9f34ca6551b96c
2006-02-26 00:11:54 -05:00
Nathan Binkert
46189e9e2b better colors for barcharts
util/stats/barchart.py:
    If there are fewer than 5 colors, pick from a subset of
    5 so there is more consistency in colors between graphs

--HG--
extra : convert_revision : 6cf64c2f8ed81e714e24a3ebe5a7a60ca168b231
2006-02-25 23:48:13 -05:00
Steve Reinhardt
63db9860cf Make sure cpu/static_inst_exec_sigs.hh get rebuilt when
CPU_MODELS parameter changes.

arch/SConscript:
    Fix typo in comment.
cpu/SConscript:
    Convert exec signature generator to Action so we can add dependency
    on CPU_MODELS environment var.
    Print nicer string while we're at it.
    Also add some comments.

--HG--
extra : convert_revision : bcb38a7941943cf071dac34cdbb2ece5456b8620
2006-02-25 22:57:46 -05:00
Nathan Binkert
10bfe954af only build libelf.a, forget about the other
libelf junk.

--HG--
extra : convert_revision : 964473c0ff1fc2f8fd9fbb8a1533eb3730b61fac
2006-02-25 22:03:47 -05:00
Nathan Binkert
25b39da69d Since the delayed write stuff is gone, get rid of regWrite
and merge it with writeBar0

--HG--
extra : convert_revision : 354642e0d528b6a5a7f2cdf0264d93e738b2d4eb
2006-02-25 22:01:05 -05:00
Gabe Black
5705354616 Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

--HG--
extra : convert_revision : d3e160f6e938af5d2118883f8d7c91fa29a0ccaa
2006-02-24 18:45:46 -05:00
Gabe Black
e66f521d5b Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

SConscript:
arch/alpha/ev5.cc:
dev/alpha_console.cc:
    Hand merged

--HG--
extra : convert_revision : 318a671e6803400d3ed086a90e70d6790e4f6b19
2006-02-24 18:45:28 -05:00
Gabe Black
e5f75c2549 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into  zizzer.eecs.umich.edu:/z/m5/Bitkeeper/multiarch

--HG--
extra : convert_revision : c167d2bec89120258124bf34ada3adf23e3e8188
2006-02-24 18:33:57 -05:00
Lisa Hsu
4d01be373e Merge zizzer:/bk/m5
into  zed.eecs.umich.edu:/z/hsul/work/m5/clean

--HG--
extra : convert_revision : 34314698d4248a078c7b43125b2d048280ff576d
2006-02-24 18:08:55 -05:00
Lisa Hsu
fcb9718dcd 1) make it pretty for large clusters
2) make subticks vertical so they can be longer
3) make inner and outer axes farther apart to make room for subtick's vertical labels

--HG--
extra : convert_revision : 91a1aab3f1078921edd53428e6712744210c9f1b
2006-02-24 18:08:14 -05:00
Steve Reinhardt
7a37037358 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into  zizzer.eecs.umich.edu:/z/stever/bk/multiarch

arch/isa_parser.py:
    SCCS merged

--HG--
extra : convert_revision : 080cca7616b37db3bf18976b63b3dbcb47d8b918
2006-02-24 08:52:38 -05:00
Gabe Black
802fd04f64 Removed a stray ::.
--HG--
extra : convert_revision : f6114b78e30e8cba5af6276042b0f043d8773739
2006-02-24 03:51:21 -05:00
Gabe Black
08637efadc Changed Fault from a FaultBase * to a RefCountingPtr, added "new"s where appropriate, and took away the constant examples of each fault which where for comparing to a fault to determine its type.
arch/alpha/alpha_memory.cc:
arch/alpha/isa/decoder.isa:
    Added news where faults are created.
arch/alpha/ev5.cc:
    Changed places where a fault was compared to a fault type to use isA rather than ==
arch/alpha/faults.cc:
arch/alpha/faults.hh:
    Changed Fault to be a RefCountingPtr
arch/alpha/isa/fp.isa:
    Added a new where a FloatEnableFault was created.
arch/alpha/isa/unimp.isa:
arch/alpha/isa/unknown.isa:
    Added a new where an UnimplementedFault is created.
base/refcnt.hh:
    Added include of stddef.h for the NULL macro
cpu/base_dyn_inst.cc:
    Added a new where an UnimplementedOpcodeFault is created.
cpu/o3/alpha_cpu_impl.hh:
    Changed places where a fault was compared to a fault type to use isA rather than ==. Also changed fault->name to fault->name()
cpu/o3/regfile.hh:
    Added new where UnimplementedOpcodeFaults are created.
cpu/simple/cpu.cc:
    Changed places where a fault was compared to a fault type to use isA rather than ==. Also added a new where an Interrupt fault is created.
dev/alpha_console.cc:
    Added news where MachineCheckFaults are created.
dev/pcidev.hh:
    Added news where MachineCheckFaults are generated.
dev/sinic.cc:
    Changed places where a fault was compared to a fault type to use isA rather than ==. Added news where MachineCheckFaults are created. Fixed a problem where m5.fast had unused variables.
kern/kernel_stats.cc:
    Commented out where _faults is initialized. This statistic will probably be moved elsewhere in the future.
kern/kernel_stats.hh:
    Commented out the declaration of _fault. when fault() is called, the fault increments its own stat.
sim/faults.cc:
sim/faults.hh:
    Changed Fault from a FaultBase * to a RefCountingPtr.

--HG--
extra : convert_revision : b40ccfc42482d5a115e111dd897fa378d23c6c7d
2006-02-24 01:51:45 -05:00
Gabe Black
a5f8392d34 Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

--HG--
extra : convert_revision : 77dc4dda9c72c871364e112ae8b10669b8d8fc86
2006-02-23 19:32:38 -05:00
Korey Sewell
f6cac25dcf name changes ...
SConscript:
    change to alpha_memory.hh

--HG--
rename : arch/alpha/memory.cc => arch/alpha/alpha_memory.cc
rename : arch/alpha/memory.hh => arch/alpha/alpha_memory.hh
extra : convert_revision : 62b1a41de22701160f04cb7a78242746cfcde819
2006-02-23 18:46:12 -05:00
Ron Dreslinski
b6247c9ea7 Add support for multiple ports on the memory. Hook up simple cpu to memory.
Ready to start testing if I could fix the linking errors I can't ever seem to fix.

cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Add connecting of ports until builder can handle it.
mem/physical.cc:
    Add function to allocate a port in the object

    Remove some full_sys stuff untill needed
mem/physical.hh:
    Add function to allocate a port in the object
python/m5/objects/BaseCPU.py:
    Update the params
sim/process.cc:
    Make sure to use the right name (hopefully CPU constructor already called)

--HG--
extra : convert_revision : 4089caf20d7eb53e5463c8ac93ddce5e43ea5d85
2006-02-23 17:02:34 -05:00
Steve Reinhardt
51647e7bec Enable building only selected CPU models via new scons
CPU_MODELS parameter.  For example:
scons CPU_MODELS="SimpleCPU,FullCPU" ALPHA_SE/m5.debug
Unfortunately the option is not sticky due to a scons
bug with saving & restoring ListOption parameters.

SConscript:
    Separate out cpu-model-specific files so they can be conditionally
    included based on value of new CPU_MODELS parameter.
    Most of these are now handled in cpu/SConscript, except for FullCPU
    which is still in this file.
arch/SConscript:
    The set of CPU-model-specific execute files must now be
    determined from the CPU_MODELS parameter, via the new
    cpu_models.py file.
    Also pass the list of configured CPU models to isa_parser.py.
arch/isa_parser.py:
    Move CpuModel definition and objects out to a
    separate file so they can be shared with scons.
    Global list of CPU models to generate code for is now
    controlled by command-line parameters (so we can do
    only a subset of the available ones).
build/SConstruct:
    Define new CPU_MODELS ListOption.
cpu/static_inst.hh:
    Rename static_inst_impl.hh to static_inst_exec_sigs.hh.

--HG--
extra : convert_revision : 163df32a76d4c05900490b2bce4c7962a5e3f614
2006-02-23 17:00:29 -05:00
Ali Saidi
4f831bc561 ev5.cc:
SCCS merged

arch/alpha/ev5.cc:
    SCCS merged

--HG--
extra : convert_revision : 9d70c1d461dab0ec016fd0616d74a49942aac659
2006-02-23 15:08:08 -05:00
Ali Saidi
e1c3acd91c Merge zizzer:/bk/m5
into  zeep.eecs.umich.edu:/z/saidi/work/m5.head

cpu/simple/cpu.cc:
    remove initCPU from constructor
dev/alpha_console.cc:
    we are panicing, so no need to return a fault

--HG--
extra : convert_revision : 72389ea0c96e91a55f35b884200325224bfb6ed9
2006-02-23 15:06:06 -05:00
Ali Saidi
1166d4f0bf Get rid of the xc from the alphaAccess/alphaConsole backdoor device.
Now allocate an array of stacks indexed by cpu number which specify
cpu stacks and are initialized by cpu 0. Othe cpus spin waiting for
their stacks before continuing. This change *REQUIRES* a the new
console code to operate correctly.

arch/alpha/ev5.cc:
    Add cpuId to initCPU/initIPR functions
cpu/o3/cpu.cc:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Move the cpu initilization into an init() function since it now needs
    the CPU id which isn't known at construction
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
    instead of the bootstrap variables, add space for 64 cpu stacks in the
    alpha access structure.
sim/system.cc:
    start all cpus immediately rather than just the first one

--HG--
extra : convert_revision : 28c218af49d885a0f203ada419f16f25d5a3f37b
2006-02-23 14:50:16 -05:00
Steve Reinhardt
99484cfae8 Create a Builder object for .isa files in arch/SConscript.
Start using SCons File objects to avoid fixed paths in
subordinate SConscripts.

SConscript:
    Push isa_parser stuff (including .isa scanner) down into
    arch/SConscript.
arch/SConscript:
    Create a Builder object for .isa files, including existing scanner.
    Return file objects generated by isa-specific SConscript
    back up to parent.
arch/alpha/SConscript:
arch/mips/SConscript:
arch/sparc/SConscript:
    Convert sources to scons File objects, so file names can be specified
    relative to the current directory.
    Invoke new builder for isa description, and get generated sources from
    there (instead of listing them explicitly).
arch/isa_parser.py:
    Get rid of third argument ("include_path").
    It was a pain to generate this from scons, and it turned out
    it's not needed anyway, since the only included file
    (decoder.hh) will be in the same directory as the sources.

--HG--
extra : convert_revision : 36861bcef36763f229704d8cb7a642b4486a3581
2006-02-23 14:31:15 -05:00
Ron Dreslinski
8fc06589cb Update functional memory to have a response event
Clean out old memory python files, move them into old_mem directory.  Maybe we should just delete them, they are under revision control.

Add new py files for new objects.

SConscript:
    Update because memory is just a header file now
base/chunk_generator.hh:
    Make Chunk Generator return the entire size if the chunk_size is set to zero.  Useful when trying to chunck on blocksize of memory, which can write large pieces of data.
cpu/simple/cpu.cc:
    Make sure to delete the pkt.
mem/physical.cc:
mem/physical.hh:
    Set up response event.
mem/port.cc:
    Rename rqst to req to conform to same standard naming convention.
python/m5/objects/PhysicalMemory.py:
    Update the params, inheritence

--HG--
extra : convert_revision : 857154ec256522baf423b715833930497999549b
2006-02-23 13:51:54 -05:00
Kevin Lim
9949ccf161 Cast enum to int to fix compile error from regression.
--HG--
extra : convert_revision : 2d998ec7393e1c08c7552f7e586160d579eab2b1
2006-02-23 13:27:23 -05:00
Steve Reinhardt
cdb5fd9d12 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into  zizzer.eecs.umich.edu:/z/stever/bk/m5

--HG--
extra : convert_revision : 38367d6d1fa594b84b64e5930588904719a40c08
2006-02-23 08:17:09 -05:00
Steve Reinhardt
c13ea339dc Add pipe() syscall to Alpha Linux emulation.
arch/alpha/alpha_linux_process.cc:
    Add pipeFunc.

--HG--
extra : convert_revision : c094d2dff993d5e60bc43b7cd4b9586c15c634a3
2006-02-23 08:16:59 -05:00
Gabe Black
8ed320792c Merge gblack@m5.eecs.umich.edu:/bk/multiarch
into  ewok.(none):/home/gblack/m5/multiarch

--HG--
extra : convert_revision : d92c611475aef2b911f76e2c21be12096e73048a
2006-02-23 04:11:09 -05:00
Gabe Black
5ecaaa0fb0 Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into  zizzer.eecs.umich.edu:/z/m5/Bitkeeper/multiarch

--HG--
extra : convert_revision : 850077a56aead260aa4bbd3df60b672a931d57ed
2006-02-23 04:08:55 -05:00
Nathan Binkert
f462266b30 don't add an empty suboption description
--HG--
extra : convert_revision : 594744c3d438aed08a23db376959930071b2c368
2006-02-23 00:21:35 -05:00
Nathan Binkert
35094fb0fe make it possible to add filters for job names so that
parts of the full crossproduct of jobs can be ignored.

--HG--
extra : convert_revision : c44b3daea0cf4b487b1d99eae92da16573b15930
2006-02-23 00:20:32 -05:00
Nathan Binkert
cc60bc49e6 fix stat name
--HG--
extra : convert_revision : 4c0f8c1b6ba1e77dc302b8ece3c8822b9b4a05ee
2006-02-23 00:00:01 -05:00
Steve Reinhardt
f67a99d1c9 Auto-generate arch/foo.hh "switch headers" in scons.
SConscript:
    Include new arch/SConscript file.
arch/isa_specific.hh:
    Get rid of unnecessary ISA_INCLUDE() macro and other
    things that were used only for that purpose.
build/SConstruct:
    Move list of ISAs to env var ALL_ISA_LIST.

--HG--
extra : convert_revision : 612c7ee4279d57209662be88dc577d80fdbd692c
2006-02-22 22:22:06 -05:00
Steve Reinhardt
9a4c0f12ef Clean excess comments out of SConscripts.
SConscript:
arch/alpha/SConscript:
    Clean out excess comments.

--HG--
extra : convert_revision : 7aae68d36f9fce5f236d117d803b5e3cd4a3769d
2006-02-22 21:11:45 -05:00
Gabe Black
b37f5da98f Cleaned up the mapping of isa_parser.py inputs to outputs.
--HG--
extra : convert_revision : a8431a67001b2916eb8d0548f1f34e1c948bb356
2006-02-22 20:52:03 -05:00
Ron Dreslinski
ceac38e41c Remove unneeded functions, moving code around abit.
mem/physical.cc:
    Remove unneeded functions.  Need to add a .toString option for commands to making printing prettier.
mem/physical.hh:
    Remove unneeded functions.

--HG--
extra : convert_revision : 3707d317f542d56c0a0758a2c5ba493b92fb0c87
2006-02-22 17:43:08 -05:00
Ron Dreslinski
b403abfbdb Move the port from base memory object into the physical memory object.
The Memory is now a pure virtual base class for all memory type objects (DRAM, physical).
We should consider renaming MemObject to something more meaningful to represent it is for all memory heirarchy objects, perhaps MemHeirObject?

mem/physical.cc:
mem/physical.hh:
    Move the port from the base class into the actual object.

--HG--
extra : convert_revision : b7754ee7b90fd8f816f9876dce374c1d43c7e34b
2006-02-22 17:29:04 -05:00
Korey Sewell
9bc7f13eeb make sure alpha still compiles , rename files back to original naming ...
Now that we have decoder.do, add new files so we can start compiling other files
needed for MIPS syscall emulation mode

arch/mips/linux_process.cc:
arch/mips/linux_process.hh:
    New MIPS-specific file

--HG--
rename : arch/alpha/linux_process.cc => arch/alpha/alpha_linux_process.cc
rename : arch/alpha/linux_process.hh => arch/alpha/alpha_linux_process.hh
rename : arch/alpha/tru64_process.cc => arch/alpha/alpha_tru64_process.cc
rename : arch/alpha/tru64_process.hh => arch/alpha/alpha_tru64_process.hh
extra : convert_revision : 2bfc27e8772523cbeb95f40684f9a32fe5554f87
2006-02-22 04:08:08 -05:00
Korey Sewell
2d2510e94f Still builds "../MIPS_SE/arch/mips/decoder.do with no errors!
-----
uncomment out detailed model ... just commented to supress some compile errors

arch/isa_parser.py:
    uncomment out detailed model ... just commented to supress some compile errors

--HG--
extra : convert_revision : e884b9bd47794409f74043ad1aca6dadd1323185
2006-02-22 03:44:21 -05:00
Korey Sewell
54b47bc5ae MIPS Compiles scons/MIPS_SE/arch/mips/decoder.do!!!!!!
arch/mips/faults.hh:
    remove nonsense
arch/mips/isa/base.isa:
    define R31
arch/mips/isa/bitfields.isa:
    forgotten bitfields
arch/mips/isa/decoder.isa:
    INT64 -> int64_t
arch/mips/isa/formats.isa:
    fix comments
arch/mips/isa/formats/branch.isa:
    Branch -> BranchLikely
    RB -> RT
arch/mips/isa/formats/fp.isa:
    Make FP ops generates
arch/mips/isa/formats/mem.isa:
    RA,RB -> RS,RT
arch/mips/isa/formats/noop.isa:
    Rc -> Rd
arch/mips/isa/formats/util.isa:
    forgot brace and semicolon
arch/mips/isa/includes.isa:
    remove unnecessary files
arch/mips/isa_traits.hh:
    spacing
cpu/static_inst.hh:
    add cond_delay_slot flag

--HG--
extra : convert_revision : 3bc7353b437f9a764e85cc462bed86c9d654eb37
2006-02-22 03:33:35 -05:00
Steve Reinhardt
0c2f55b585 Minor cleanup/fleshing out of Memory object.
--HG--
extra : convert_revision : 35ad82e6a1e38c4d14c0ad306c33718a9b9d19fe
2006-02-21 22:17:00 -05:00
Steve Reinhardt
7e927758d5 Temp fix for StaticInst::execute() methods while we're
only trying to build SimpleCPU.

--HG--
extra : convert_revision : 703dfa068c75dd3238b400744a8aa72b35633f63
2006-02-21 22:13:48 -05:00
Steve Reinhardt
9c4e4a2181 Move op_class.hh out of encumbered/cpu/full and into cpu.
Pull opClassStrings array out of encumbered/cpu/full/fu_pool.cc and move to
new cpu/op_class.cc file.

SConscript:
    Add new cpu-model-independent file to define OpClass enum strings.
cpu/op_class.hh:
    Fix comments etc.
cpu/static_inst.hh:
    op_class.hh moved to cpu directory

--HG--
rename : encumbered/cpu/full/op_class.hh => cpu/op_class.hh
extra : convert_revision : 314ac5ab7cc5c6a34b43dc1c2f2adc3e02f6d07f
2006-02-21 22:12:27 -05:00
Korey Sewell
37cd6695eb Merge zizzer:/bk/multiarch
into  zazzer.eecs.umich.edu:/z/ksewell/research/m5-sim/multiarch

--HG--
rename : arch/alpha/alpha_memory.cc => arch/alpha/memory.cc
rename : arch/alpha/alpha_memory.hh => arch/alpha/memory.hh
extra : convert_revision : c641ba3c1009829b7276279b2dca441be1da5b30
2006-02-21 22:06:18 -05:00
Korey Sewell
a4799a89de Renaming alpha files and changing some MIPS stuff to be more like Alpha version
SConscript:
    changed the alpha_memory.hh to memory.hh in SConscript
arch/isa_parser.py:
    temporarily comment out o3 model
arch/mips/isa/base.isa:
arch/mips/isa_traits.cc:
arch/mips/isa_traits.hh:
    Fix Up Base Class to mirror how Alpha generates StaticInsts
arch/mips/faults.cc:
    MIPS fault.cc file
arch/mips/faults.hh:
    MIPS fault.hh file

--HG--
rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux_process.cc
rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux_process.hh
rename : arch/alpha/alpha_memory.cc => arch/alpha/memory.cc
rename : arch/alpha/alpha_memory.hh => arch/alpha/memory.hh
rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64_process.cc
rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64_process.hh
extra : convert_revision : f92d6e765ca96a8b952aef79ed119fa29464563b
2006-02-21 22:02:05 -05:00
Gabe Black
8d80fd1477 Changed Fault * to Fault, which is a typedef to FaultBase *, which is the old Fault class renamed.
--HG--
extra : convert_revision : 5b2f457401f8ff94fe39fe071288eb117814b7bb
2006-02-21 20:10:40 -05:00
Ron Dreslinski
1fff9f504f Some more changes for compilation. Since memset is now part of port and not virtual, no need for memory to define them.
mem/physical.cc:
    Return 0 for block size.  The chunk generator should treat this as a infinite size.
mem/physical.hh:
    Add function prototype
mem/port.hh:
    Fix function to take no arguments
mem/translating_port.cc:
mem/translating_port.hh:
    Remove the memsetBlob because it doesn't exist yet.

--HG--
extra : convert_revision : dfe352acfc2912ecc9a1ba1863e5666f46b991cc
2006-02-21 20:04:23 -05:00
Ron Dreslinski
4bd11c10a5 Add blocksize functions to physical memory. Fix the port we were using in the process loader.
mem/physical.cc:
    Implement the blockSize function, return VMPageSize for the physical memory
mem/port.hh:
    Add a function to get a pointer to a peer, needed for initVirtMem to work in the loader.
sim/process.cc:
    The way the translating port is setup we don't want the memory port, we want the peer port associated with that memory.  We may need to revisit this.

--HG--
extra : convert_revision : 46a51d448d1683db7bd5afe64adbe167a5743060
2006-02-21 13:39:01 -05:00
Steve Reinhardt
944646124e Rename Port address range functions... like the block size
functions, the send/recv*Query naming seems awkward.
Also create a typedef for AddrRangeList.

--HG--
extra : convert_revision : dd0ff3fad06ec329c82c199700d0a6264f1271d3
2006-02-21 12:32:45 -05:00
Steve Reinhardt
00264ff1b8 Rename port methods:
sendBlockSizeQuery() -> peerBlockSize()
recvBlockSizeQuery() -> deviceBlockSize()
After seeing how this gets used in practice, the
send/recv*Query names just don't make a lot of sense.

dev/io_device.cc:
mem/port.cc:
    sendBlockSizeQuery() -> peerBlockSize()
mem/port.hh:
    sendBlockSizeQuery() -> peerBlockSize()
    recvBlockSizeQuery() -> deviceBlockSize()

--HG--
extra : convert_revision : e96349fb443979b85899a5248bd7cd8665e23ef0
2006-02-21 12:20:02 -05:00
Steve Reinhardt
8a753f6ae2 Move read/writeBlob functions to Port class;
clean up implementation a little.

SConscript:
    Add mem/port.cc
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Move read/writeBlob functions to base Port class.
mem/port.hh:
    Implement read/writeBlob functions.
    No need for them to be virtual since the proxy
    object (now called TranslatingPort) is not a
    subclass of Port.
mem/port.cc:
    Implement read/writeBlob functions.

--HG--
extra : convert_revision : a3660eaa43a7c286aca962f17fa32fbd42bf1fa6
2006-02-21 11:27:53 -05:00
Gabe Black
3f7979c99d Made Addr a global type
--HG--
extra : convert_revision : 869bd9fa5d8591115ac9b4a7401eb2490986b835
2006-02-21 03:38:21 -05:00