Commit graph

3715 commits

Author SHA1 Message Date
Nathan Binkert
aec0afd59f Delete the actual PseudoInst file
--HG--
extra : convert_revision : 54e3dfbc1022fcc663a9c0e67f6434395d1fe33c
2006-11-11 17:30:37 -08:00
Nathan Binkert
b16e559177 Get rid of the ParamContext for pseudo instructions and move
the parameters to the BaseCPU object.

--HG--
extra : convert_revision : 557292cffb40918133647b0c9ac653ee5112df2e
2006-11-11 17:22:10 -08:00
Gabe Black
fd35f02efe Fix for CAS so that it knows about all the possible code in the constructor.
--HG--
extra : convert_revision : 863d395f8e7c8ee2aec708ffcef842317ec9a89b
2006-11-11 07:23:13 -05:00
Gabe Black
cc77304676 The Lock_Flag_DepTag went away earlier, and using TheISA gives the false impression that this code is ISA independent.
--HG--
extra : convert_revision : 67d9e51702efbe5f5244268e3753328a6cf1a1d5
2006-11-11 07:16:24 -05:00
Gabe Black
239a89e713 Certain header files should only be used in FS.
src/arch/alpha/faults.hh:
    Only use pagetable.hh in FS
src/arch/alpha/pagetable.hh:
    pagetable.hh should only be included in FS, so protecting it internally should be unnecessary.
src/cpu/exetrace.cc:
    Only use tlb.hh in FS

--HG--
extra : convert_revision : 91ea61f2e7970e7146b6d407ee250fcb20cd4d48
2006-11-11 07:15:16 -05:00
Ron Dreslinski
f876bc2bf0 More fixes for functional accesses. It now makes the writeback memory leak to crash all configs.
Working on that now.

src/mem/cache/base_cache.cc:
    Keep a list of the responders so we can search them on functional accesses.
src/mem/cache/base_cache.hh:
    Properly put things on a list for responses so we can search the list.
    Also, be sure to check the outgoing ports lists on a functional access (factor some common code out there)
src/mem/cache/cache_impl.hh:
    Properly return when the first read hit on a functional access.
    Make sure to call to check the other ports list of packets before forwarding it out.

--HG--
extra : convert_revision : 1d21cb55ff29c15716617efc48441329707c088a
2006-11-10 22:45:50 -05:00
Ron Dreslinski
9a6e896d3b Big fix for functional access, where we forgot to copy the last byte on write intersections.
src/mem/packet.cc:
    Make sure to copy the whole data (we were one byte short)
src/mem/tport.cc:
    Fix for the proper semantics of fixPacket

--HG--
extra : convert_revision : 215e05db9099d427afd4994f5b29079354c847d8
2006-11-10 22:41:21 -05:00
Ali Saidi
77254e513d Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : e4f9bb663099662a94c5522e6b4955c2a83bac8d
2006-11-10 20:17:54 -05:00
Ali Saidi
aa19b2e7bc fix endian issues with condition codes
use memcpy instead of bcopy
s/u_int32_t/uint32_t/g
fixup endian code to work with solaris
hack to make sure htole() works... Nate, have a good idea to fix this?

src/arch/sparc/faults.cc:
    set the reset address to be 40 bits. Makes PC printing easier at least for now.
src/arch/sparc/isa/base.isa:
    fix endian issues with condition codes
src/arch/sparc/tlb.hh:
    add implemented physical addres constants
src/arch/sparc/utility.hh:
    add tlb.hh to utilities
src/base/loader/raw_object.cc:
    add a symbol <filename>_start to the symbol table for binaries files
src/base/remote_gdb.cc:
    use memcpy instead of bcopy
src/cpu/exetrace.cc:
    clean up printing a bit more
src/cpu/m5legion_interface.h:
    add tons to the shared interface
src/dev/ethertap.cc:
    s/u_int32_t/uint32_t/g
src/dev/ide_atareg.h:
    fixup endian code to work with solaris
src/dev/pcidev.cc:
src/sim/param.hh:
    hack to make sure htole() works...

--HG--
extra : convert_revision : 4579392184b40bcc1062671a953c6595c685e9b2
2006-11-10 20:17:42 -05:00
Kevin Lim
e89eaf8b80 Merge ktlim@zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem

--HG--
extra : convert_revision : 35e2ff6ce62281299ad98dca64ba04a3a8a6757c
2006-11-10 15:35:06 -05:00
Gabe Black
6d54a77518 Elaborated on the tlb stubs so that they just set the physical address to the virtual address.
--HG--
extra : convert_revision : 41478abc4d21d504420f6842338675c0767f7cf9
2006-11-10 15:32:15 -05:00
Gabe Black
e3d8831857 Fixed up DepTags a little. I think NumMicroIntRegs shouldn't be added to Ctrl_Base_DepTag.
--HG--
extra : convert_revision : 2ebb3eb781441ba936c8d8bb1f42e4c0840aff2e
2006-11-10 15:30:59 -05:00
Gabe Black
d30e3b30af Added StrandStsReg operand.
--HG--
extra : convert_revision : 51be41716ed9fe0e99e53f2341ad5651a525055a
2006-11-10 15:29:32 -05:00
Gabe Black
13a8752c11 Put in provisions for rd, rdpr, rdhpr, wr, wrpr, and wrhpr to disassemble properly.
--HG--
extra : convert_revision : f2cad8a5879999438ba9b05f15a91320e7a4cc4a
2006-11-10 15:28:58 -05:00
Gabe Black
7bf1c8981d Made the annul of unconditional conditional branches behave properly, added code to read and write the strand_sts_reg, and made restored a Priv instruction.
--HG--
extra : convert_revision : 386512215f7243d230717c369217f8d2f9ada935
2006-11-10 15:27:06 -05:00
Gabe Black
27b43b62b7 Fixed up the code that prints out registers to take into account microregisters.
--HG--
extra : convert_revision : 6809de467e4500ce34447c0544caf0ba04af81e7
2006-11-10 15:25:52 -05:00
Gabe Black
8390e46311 Tweaked debug output.
--HG--
extra : convert_revision : cd33b7c1ebdbefd42f18c1435b2519d06d9914a6
2006-11-10 15:25:03 -05:00
Gabe Black
cee4d1c113 Touched up faults, and made POR actually do something.
--HG--
extra : convert_revision : 38951352edbfc423fb6767a9aac49a703578c0ac
2006-11-10 15:24:10 -05:00
Kevin Lim
b5e68fb546 Merge ktlim@zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem

--HG--
extra : convert_revision : 0c2db1e1b5fdb91c1ac5705ab872a6bfb575a67a
2006-11-10 12:44:15 -05:00
Kevin Lim
264f9ce374 Also include a function to form the input path.
--HG--
extra : convert_revision : d2141e3b8c56296fbbe2c4c1ceb80616f269884a
2006-11-10 12:39:43 -05:00
Kevin Lim
8ccd99e341 Try to setup commands properly.
--HG--
extra : convert_revision : 9f4af3c5f52841b10e9f17c48470716703a1be67
2006-11-10 12:28:23 -05:00
Kevin Lim
f593c8a8e2 Change up some warnings to DPRINTFs.
--HG--
extra : convert_revision : b3e9fa094d68f608865dedfc9f3f4125a20fd748
2006-11-10 12:25:08 -05:00
Kevin Lim
73581bf801 Merge ktlim@zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix

--HG--
extra : convert_revision : 56cb7fe3be5b63bd89b48ac6cb88b47d13b4c137
2006-11-10 12:14:38 -05:00
Gabe Black
9ef51f2dba Actually finished moving the register file stuff around.
--HG--
extra : convert_revision : 786735ecea8ff480db6b3754ac5daa562938d988
2006-11-10 05:49:16 -05:00
Gabe Black
9731fb3fd7 Moved the Alpha float regfile into it's own regfile and got rid of constants.hh and isa_traits.cc
--HG--
extra : convert_revision : 55afd7d21c276906520da375b3bbb563be420880
2006-11-10 05:29:05 -05:00
Gabe Black
b4dfbf3aab Split out alpha integer register file into it's own files.
--HG--
extra : convert_revision : 164bdcec2860c5dca3f0f11d189781b88dd717cb
2006-11-10 04:54:25 -05:00
Gabe Black
71dc49c785 The reset function of the MiscRegFile really resets it now. This function is called from the class's constructor.
--HG--
extra : convert_revision : 4e7a40ffe0a9a71fd1b2b171d9c0dcac50e1a1fe
2006-11-10 04:33:41 -05:00
Gabe Black
dc6af9fbf7 Set the ASI register to be something explicitly so that simulation is deterministic.
--HG--
extra : convert_revision : 38cd06f946fc0cc22288f71f567e77ce8fdfea99
2006-11-10 04:14:25 -05:00
Gabe Black
1d70dda6d7 Change exetrace code for working with my trace tool to use stream io rather than sprintf which was breaking on 64 bit hosts.
--HG--
extra : convert_revision : 184d751392dfcc8c80ac1a6c0ebc3061ff0a3f20
2006-11-10 04:11:46 -05:00
Gabe Black
4aea5deccb Fix up instructions to read and write control registers, and got rid of the control register fields which won't work on a big endian host.
--HG--
extra : convert_revision : 1b518873b6e1a073b58cbe27642537d5ae3a604d
2006-11-10 04:02:39 -05:00
Gabe Black
232c3f1b27 Moved the Alpha MiscRegFile into it's own file, and got rid of the Alpha specific DepTag constants.
--HG--
extra : convert_revision : e4af5e2fb2a6953f8837ad9bda309b7d6fa7abfb
2006-11-09 21:30:48 -05:00
Gabe Black
50462c15aa Fix a couple uninitialized variables.
--HG--
extra : convert_revision : d17d28a9520524e5f56bd79beb9b2be6ce76a22f
2006-11-09 19:24:35 -05:00
Ali Saidi
cb172d0332 Get SPARC to the point that it starts running. Add ability to load the ROM bin files, cleanup lockstep printing a bit
Since we don't have a platform yet, you need to comment out the default responder stuff in Bus.py to make it work.

SConstruct:
    Add TARGET_ISA to the list of environment variables that end up in the build_env for python
configs/common/FSConfig.py:
    add a simple SPARC system to being testing with, you'll need to change makeLinuxAlphaSystem to makeSparcSystem in fs.py for now
src/SConscript:
    add a raw file object, at least until we get more info about how to compile openboot properly
src/arch/sparc/system.cc:
src/arch/sparc/system.hh:
    add parameters for ROM files (OBP/Reset/Hypervisor), a ROM, load files into ROM
src/base/loader/object_file.cc:
src/base/loader/object_file.hh:
    add option to try raw when nothing works
src/cpu/exetrace.cc:
    cleanup lockstep printing a little bit
src/cpu/m5legion_interface.h:
    change the instruction to be 32 bits because it is
src/mem/physical.cc:
    fix assert that doesn't work if memory starts somewhere above 0
src/python/m5/objects/BaseCPU.py:
    Add if statement to choose between sparc tlbs and alpha tlbs
src/python/m5/objects/System.py:
    Add a sparc system that sets the rom addresses correctly
src/python/m5/params.py:
    add the ability to add Addr() together

--HG--
extra : convert_revision : bbbd8a56134f2dda2728091f740e2f7119b0c4af
2006-11-09 18:22:46 -05:00
Kevin Lim
6591ebb098 Merge ktlim@zizzer:/bk/newmem
into  zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix

--HG--
extra : convert_revision : dafe2d4a032b277c219ea13faf20567c20c1f2f4
2006-11-09 15:06:00 -05:00
Kevin Lim
0ba2cc6571 Clean up config scripts to not have to worry about attaching a cache only to the TimingCPU. Now the Atomic CPU works with caches.
configs/common/Simulation.py:
    Atomic CPU now works properly with caches, so we don't have to do extra parsing to hook up caches only to the timing CPU.

    However the O3CPU must always use caches, so a check for that must still exist.

    Also change the switch_cpus to be placed at the system level, now that Steve changed how the IntrController gets its CPU.
configs/example/fs.py:
configs/example/se.py:
    Atomic CPU now handles caches.

--HG--
extra : convert_revision : 534ded558ef96cafd76b4b5c5317bd8f4d05076e
2006-11-09 15:05:13 -05:00
Nathan Binkert
f4aa4e43c4 Factor out all of the encumbered stuff into separate SConscript
files so the directories can easily be deleted.
Remove the FullCPU from the ALL_CPU_LIST and only add it if
it exists.

--HG--
extra : convert_revision : b16f56bb92a0063803c5099732dc289fe4363768
2006-11-09 08:43:35 -08:00
Kevin Lim
21f43bfc4b Be sure to populate the packet's finishTime field in the atomic timing case.
--HG--
extra : convert_revision : ef34818eb2dea5b3a8e754bf56745a7cd2497bf0
2006-11-09 11:37:26 -05:00
Kevin Lim
0b0d5a282a Draining fixes.
src/cpu/o3/cpu.cc:
    Handle draining properly when CPU isn't actually being used.
src/cpu/simple/atomic.cc:
    Be sure to set status properly when draining.
src/mem/bus.cc:
    Fix for draining.

--HG--
extra : convert_revision : d9796e6693e974f022159029fc9743c49a970c8f
2006-11-09 11:33:44 -05:00
Gabe Black
081dd9e600 Merge zizzer.eecs.umich.edu:/bk/newmem/
into  zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops

--HG--
extra : convert_revision : 0ab912df014cf1511e960e4058bee3eea047f9f6
2006-11-08 16:52:44 -05:00
Lisa Hsu
32f676fed2 the tests assume -1 to signify MaxTick, that's changed, so fix that here.
--HG--
extra : convert_revision : 73ff143ba3b733f80ab867fcd72489cd1ee49d76
2006-11-08 16:49:59 -05:00
Gabe Black
f720029e97 Merge zizzer.eecs.umich.edu:/bk/newmem/
into  zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops

--HG--
extra : convert_revision : dc165840841bdd88e40111b98d1be493441703f0
2006-11-08 16:18:10 -05:00
Gabe Black
5b90922ad5 Put the MIPS stacktrace into the MipsISA namespace to fit with Alpha and SPARC.
--HG--
extra : convert_revision : 86f5585fe9ceb2ee30836d35384ebcddc1357c2a
2006-11-08 16:15:20 -05:00
Gabe Black
42c73c6a92 Make a function to say how big gdbregs is in bytes vs. regs.
--HG--
extra : convert_revision : 10c50c2d45a8e510d71cccde520059363116da8a
2006-11-08 15:31:52 -05:00
Lisa Hsu
74745cfeac Merge zizzer:/bk/newmem
into  zed.eecs.umich.edu:/z/hsul/work/m5/newmem

--HG--
extra : convert_revision : 5f4b39beba9f672ba1741cb45f4c3cf853ce574b
2006-11-08 15:07:31 -05:00
Ali Saidi
7c3d933cd6 Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/work/m5.newmem

--HG--
extra : convert_revision : 643e28482e6739bd264a9c2d69c17279853aa0c5
2006-11-08 15:06:17 -05:00
Ali Saidi
100f9bfb0b DWARF2 symbol support seems to be broken on Solaris. Use stabs+
align the character arrays that are used by placement-new for classes lest we have an unaligned fault on SPARC/Solaris

src/SConscript:
    DWARF2 symbol support seems to be broken on Solaris. Use stabs+
src/base/statistics.hh:
    align the character arrays that are used by placement-new for classes lest we have an unaligned fault on SPARC/Solaris

--HG--
extra : convert_revision : bc875a4fdfb4553062d3278537bc32a5ab9b6cca
2006-11-08 15:05:54 -05:00
Lisa Hsu
64c0d82dec simplify maxtick parsing in both the python and the c++.
configs/common/Simulation.py:
    simplify maxtick code a little bit - instead of checking for -1, just set it at MaxTick.
src/python/m5/__init__.py:
    make a new m5 param called MaxTick.
src/sim/host.hh:
    fix the M5 def. of MaxTick
src/sim/main.cc:
    Simplify the MaxTick/num_cycles parsing within main.cc

--HG--
extra : convert_revision : f800addfbc1323591c2e05b892276b439b671668
2006-11-08 15:05:23 -05:00
Lisa Hsu
5a46f336a1 make rcS files read from the m5 source directory, not /dist.
--HG--
extra : convert_revision : 45a2dbf5b05b19dd60fbc3a5b10e9355c8351e3b
2006-11-08 14:10:25 -05:00
Lisa Hsu
0a0d9cd3ab change to os.path.join like nate wanted.
--HG--
extra : convert_revision : 6e8a0153adf04f0cc07904434e4cb6a83fe900eb
2006-11-08 14:01:23 -05:00
Gabe Black
63bbc8929d First cut at full blown SPARC faults. There are a few details that are missing.
--HG--
extra : convert_revision : 8023db1479cb9bf99fc9edfeb521c4e5b581f895
2006-11-08 13:58:00 -05:00