Commit graph

73 commits

Author SHA1 Message Date
Ali Saidi
caf16a99cc during a cache miss in the simple cpu we were finalizing the trace
data too early (before the cache miss completed) and therefore
writing freeded memory after the cache miss completed.

Also removed some spurious setAddr() and setData() calls.

--HG--
extra : convert_revision : 3da82540c69c4c417aba3ed155e167d09431a1b2
2005-03-15 17:31:18 -05:00
Ron Dreslinski
9dd1ab1dba Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : db688679bfd9c670ef44611de71640c3bf564fc0
2005-02-21 16:50:38 -05:00
Nathan Binkert
9b1e2db811 Clean up CPU stuff and make it use params structs
cpu/base_cpu.cc:
cpu/base_cpu.hh:
    Convert the CPU stuff to use a params struct
cpu/memtest/memtest.cc:
    The memory tester is really not a cpu, so don't derive from
    BaseCPU since it just makes things a pain in the butt.  Keep
    track of max loads in the memtest class now that the base class
    doesn't do it for us.
    Don't have any default parameters.
cpu/memtest/memtest.hh:
    The memory tester is really not a cpu, so don't derive from
    BaseCPU since it just makes things a pain in the butt.  Keep
    track of max loads in the memtest class now that the base class
    doesn't do it for us.
cpu/simple_cpu/simple_cpu.cc:
    Convert to use a params struct.
    remove default parameters
cpu/simple_cpu/simple_cpu.hh:
    convert to use a params struct
cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
cpu/trace/trace_cpu.cc:
cpu/trace/trace_cpu.hh:
    this isn't really a cpu.  don't derive from BaseCPU
objects/MemTest.mpy:
    we only need one max_loads parameter
sim/main.cc:
    Don't check for the number of CPUs since we may be doing something
    else going on.  If we don't have anything to simulate, the
    simulator will exit anyway.

--HG--
extra : convert_revision : 2195a34a9ec90b5414324054ceb3bab643540dd5
2005-02-19 11:46:41 -05:00
Ron Dreslinski
f825d103da Merge zizzer:/z/m5/Bitkeeper/m5
into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : 8fb4bbf165b8c65a54db5fea18ec5aa95172a173
2005-02-18 13:10:37 -05:00
Nathan Binkert
dd4220ec10 rename the simple cpu's multiplier parameter. call it width.
it makes more sense and is less confusing.

cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    width is a better name than multiplier

--HG--
extra : convert_revision : ea2fa4faa160f5657aece41df469bbc9f7244b21
2005-02-17 14:02:03 -05:00
Ron Dreslinski
230a5a608d Merger
cpu/simple_cpu/simple_cpu.hh:
    Merge

--HG--
extra : convert_revision : 1b6003ac731051fefacb7d7a30c317553b4bf1bc
2005-02-09 12:56:24 -05:00
Ron Dreslinski
d9317dd348 Some more useful debugging info for kernel panic and die events
Increase the default number of CSHR's, we should really fix this or make it a parameter

Use a setBlocked call to tell the bus it should block

New technique for sampling and switchover:
1) Sampler switchover event happens
2) All cpus in the current phase of sampling associated with this sampler are signaled to switchover
3) Each cpu drains it's pipe of things being executed (stops fetching and waits for empty pipe)
4) Once the pipe is empty the cpu calls back to the sampler to signal it has finished, and moves into the switchedout state (continues not to fetch)
5) The sampler collects all the signals, once all cpus are drained it calls the new cpu's in the next phase to takeover from the correct cpu
6) The statistics are reset and the next switchover time is calculated from this point

cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    Reconfigure the way the sampling switchover works
cpu/pc_event.cc:
    More debugging information on kernel panic's
kern/linux/linux_system.cc:
    More debug info for Kernel Die events
kern/linux/linux_system.hh:
    More debug info for kernel die events

--HG--
extra : convert_revision : 61cc42e43ba738705aa1f1d167b65d4d6dee51ae
2005-02-09 10:27:00 -05:00
Steve Reinhardt
0aaf8ec6b8 Add support for CPU models to execute the effective
address calculation and memory access portions separately.
Not currently used by any CPU models, but Kevin says he needs this.

Also clean up handling of execution tracing for memory accesses
(move it all into isa_desc and out of CPU models).

Got rid of some ancient unused code too.

arch/alpha/isa_desc:
    Add execute() methods to EAComp and MemAcc portions of memory
    access instructions, to allow CPU models to execute the effective
    address calculation and memory access portions separately.

    Requires the execution context to remember the effective address
    across the two invocations.  Added setEA() and getEA() methods to
    execution context to support this.  A model that does not use the
    split execution model can panic if these methods are called.

    Also added hook to call traceData->setAddr() after EA computation
    on any load or store operation.
arch/isa_parser.py:
    Call traceData->setData() on memory writes (stores).
cpu/simple_cpu/simple_cpu.cc:
    Get rid of unused code.
cpu/simple_cpu/simple_cpu.hh:
    Add (non-functional) setEA() and getEA() methods for new
    split memory access execution support.

--HG--
extra : convert_revision : bc2d2c758c4ca753812b9fa81f21038e55929ff0
2005-02-03 20:47:11 -05:00
Kevin Lim
f31a27a030 Move trace data function to .cc file.
--HG--
extra : convert_revision : 8180068747489978a2bbaa096dc73b0cfd14b052
2005-01-18 11:43:45 -05:00
Ron Dreslinski
bddb7ad7b5 Put back in SimpleCPU changes and Coherence Timing Bus changes
Small fixes to read() in simpleCPU and small fixes to cache_impl.hh
and to simple_mem_bank to deal with writeInv from DMA

--HG--
extra : convert_revision : db24028c34b7a535aa0db55b43bad1d3d75cd258
2004-11-18 06:11:01 -05:00
Nathan Binkert
44ef49bd2b undo simple CPU changes
--HG--
extra : convert_revision : dce0d9f7d34243899f699488c6534fb1ccea4849
2004-11-18 00:24:36 -05:00
Ron Dreslinski
60e88ba7ad Changes to use siinic:
Changed SimpleCPU to not due functional access until the cache returns
Updated config file to use a simple cpu for second cpu in dual mode.

cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    Update cache completion event to perform the functional read upon completion

--HG--
extra : convert_revision : 7a5b318d2040580fae92c165611425f513b14be9
2004-11-17 23:26:43 -05:00
Steve Reinhardt
c9b0204e28 Add simple function-tracing support. Prints a message
every time the committed PC changes from one symbol scope
to another.
Set function_trace=y on target CPU to enable.
To defer start, use function_trace_start=<tick>
(in addition to setting function_trace=y).

cpu/base_cpu.cc:
cpu/base_cpu.hh:
    Add simple function-tracing support.
cpu/simple_cpu/simple_cpu.cc:
    Add function_trace, function_trace_start params
    Call traceFunctions() on instruction completion
cpu/simple_cpu/simple_cpu.hh:
    Add function_trace, function_trace_start params

--HG--
extra : convert_revision : 8a7f84028ccbaee585253629007f32fc8eae35e1
2004-11-16 17:20:38 -05:00
Nathan Binkert
4328480b56 Don't use the global check_interrupts variable. Add a per-cpu
checkInterrupts variable and use that to determine whether an interrupt
can occur on a given cycle.

arch/alpha/ev5.cc:
    XC -> CPU (and xc -> CPU) since we're really talking about a CPU here
    Don't use the global check_interrupts variable.  Add a per-cpu
    checkInterrupts variable and use that to determine whether an interrupt
    can occur on a given cycle.

--HG--
extra : convert_revision : be4c0247e5834005c60a45796a222cffd327b64e
2004-11-10 18:37:19 -05:00
Nathan Binkert
d82e0d11d1 make activation of exec contexts happen in startup
the registration stuff all moves into BaseCPU

cpu/base_cpu.cc:
    Move the registration stuff into the BaseCPU since all
    other CPUs use it.
cpu/base_cpu.hh:
    Move the defer registration stuff into the BaseCPU since all
    other CPUs use it.
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    registration stuff moved to base class
sim/system.cc:
    the activation of exec contexts should happen at startup, not
    when they are registered.
sim/system.hh:
    the system now has a startup function

--HG--
extra : convert_revision : bb6a7c2da5a1ecf5fe7ede1078200bfe5245f8ef
2004-11-03 20:46:33 -05:00
Nathan Binkert
d55eb90fc7 Don't use magic numbers.
arch/alpha/isa_traits.hh:
    Move defines to non full system code section so they can
    be used elsewhere
cpu/simple_cpu/simple_cpu.cc:
    Don't use magic numbers
cpu/simple_cpu/simple_cpu.hh:
    simple format nit

--HG--
extra : convert_revision : b8d492218340d41ab9420c6ad1e81a197db1c132
2004-10-25 16:23:22 -04:00
Erik Hallnor
867a9b84d9 Bunch of little changes for tracking copies and getting OPT right.
cpu/simple_cpu/simple_cpu.cc:
    Send Copy
cpu/trace/opt_cpu.cc:
    Calculate the block size correctly. Set lookupTable value directly, since the old way only worked for FA caches.
cpu/trace/trace_cpu.cc:
    Don't start events if the hierarchy is in non-event mode.

--HG--
extra : convert_revision : daf2db5ed7428c2fb08652cf76f6fe99d8357db5
2004-10-17 00:07:21 -04:00
Erik Hallnor
34742515f5 Add opt cpu and fix page copy warnings
SConscript:
    Add opt_cpu
cpu/simple_cpu/simple_cpu.cc:
    Fix page spanning copy warning.
cpu/trace/reader/itx_reader.cc:
    Fix reader to return correct address.

--HG--
extra : convert_revision : f03e244971af4197743c7c717d64f21db0ae42d3
2004-09-28 16:55:55 -04:00
Erik Hallnor
15d08a3422 Update copies to work around alignment faults.
arch/alpha/isa_desc:
    whitespace fix.
cpu/simple_cpu/simple_cpu.cc:
    Add support to make sure we don't get alignment faults in copies. Warn if we go over an 8k page boundary.

--HG--
extra : convert_revision : 98b38da86a66215d80ea9eb6e6f1f68ee573cb57
2004-09-20 22:00:35 -04:00
Nathan Binkert
9023f5c96d - Clean up and factor out all of the binning code into a
single place so it's easier to work with.
-  Add support for binning kernel/user/idle time separately from
lisa's binning stuff, but make the two compatible.
-  KernelStats used to directly implement the pImpl idiom, but
it makes more sense to just remove the level of indirection and
make the exec context have a pointer to the stats.
-  Factor common code out of LinuxSystem and Tru64System and put
it into the System base class.  While doing that, make all
constructors take a pointer to a parameter struct instead of
naming the parameters individually to make it much easier to add
parameters to these classes.

SConscript:
    Move the function tracking and binning stuff around.
arch/alpha/ev5.cc:
    kernelStats is now a pointer
arch/alpha/pseudo_inst.cc:
    kernelStats is now a pointer
    the parameters to the system have been moved into their own
    struct
base/trace.hh:
    provide a little functor class for wrapping a string that
    can allow you to define name() in any scope very simply
    for use with DPRINTF
cpu/base_cpu.cc:
    New order of arguments for consistency.
cpu/exec_context.cc:
    kernelStats no longer has the level of indirection in it,
    execContext has the indirection now.  so, kernelStats is a pointer.
    We also need a pointer to the kernelBinning stuff from the system
    and we need to figure out if we want to do binning or not.
    Move a whole bunch of code into kern_binning.cc so it's all
    in the same place.
cpu/exec_context.hh:
    We want pointers to the kernel binning/stats stuff and we'll
    have the exec_context and system have the level of indirection
    instead of having the extra layer in the kernel stats class.
cpu/simple_cpu/simple_cpu.cc:
    call through the exec context to do the special binning
    stuff.
kern/kernel_stats.cc:
kern/kernel_stats.hh:
    Re-organize the stats stuff and remove the level of indirection
    (that was there to simplify building) and move the binning stuff
    into its own class/file.
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/system.cc:
sim/system.hh:
    move lots of common system code into the base system class so
    that it can be shared between linux, tru64, and whatever else
    we decide to support in the future.

    Make the constructor take a pointer to a parameter struct so that
    it is easier to pass parameters to the parent.
kern/system_events.cc:
    move the majority of the binning code into the Kernel::Binning class
    in the kern_binning file
kern/system_events.hh:
    FnEvents only need to know the bin
    create the Idle start event to find the PCBB of the idle
    process when it starts.
kern/tru64/tru64_events.cc:
    memCtrl -> memctrl
sim/process.cc:
sim/process.hh:
    re-order args for consistency

--HG--
extra : convert_revision : 86cb39738c41fcd680f2aad125c9dde000227b2b
2004-08-20 11:35:31 -04:00
Nathan Binkert
bc5c52335c Add a clock multiplier for simple CPU so that it is possible
to do multiple instructions per cycle.

--HG--
extra : convert_revision : 5588ae38071f170792aad93899fef6842b7d818d
2004-07-14 23:01:54 -04:00
Andrew Schultz
bdc7803694 Merge zizzer:/bk/m5 into zizzer.eecs.umich.edu:/z/alschult/m5
--HG--
extra : convert_revision : 0bd6506e79600775dd0f72996120321f249b3411
2004-06-30 09:47:32 -04:00
Andrew Schultz
bdf9044d9d Change assert to check on virtual addresses because the physical
address can be zero for a copy

--HG--
extra : convert_revision : c6089969396aee2d67fa695a31cb7c5aea794338
2004-06-30 09:47:23 -04:00
Nathan Binkert
838273a196 fix up the recordEvent stuff to support ignoring events
arch/alpha/ev5.cc:
cpu/simple_cpu/simple_cpu.cc:
    update for new event interface
base/stats/events.cc:
    implement the ignore event function which matches sim objects from which
    to ignore events.

    Make insert event like insert data and make it able to insert many
    events in a single transaction with the database.
base/stats/events.hh:
    Make it possible to ignore events
sim/sim_object.cc:
    make recordEvent a member function of SimObject to implement
    the ignore function easily
sim/sim_object.hh:
    implement the ignore event stuff in the sim object.  This is a
    bit of a hack, but an easy place to put it.

--HG--
extra : convert_revision : ba3f25a14ad03662c53fb35514860d69be8cd4f0
2004-06-28 16:49:35 -04:00
Ali Saidi
3f7b780af5 Merge saidi@zizzer.eecs.umich.edu:/bk/linux
into ali-saidis-computer.local:/research/linux

--HG--
extra : convert_revision : 446dc5fad11a6b29954dc5b1e974430853aa2969
2004-06-21 01:04:48 -04:00
Ali Saidi
c27139c701 start towards getting m5 endian compliant
base/inifile.cc:
    Added mac os support and fixed a bug, on error we need to exit the
    child process not return
base/intmath.hh:
    gcc on macos wanted a seperate function for the size_t type
base/loader/elf_object.cc:
    I'm not sure why this works under linux because it seems to return
    the wrong value.
base/stats/text.cc:
    added define/include for mac os x
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.cc:
    added endian conversion code
dev/alpha_console.cc:
    rather than accessing a charecter array of varying size depending on
    the access, lets actually do this properly.
dev/alpha_console.hh:
    get rid of now nolonger used consoleData
dev/disk_image.cc:
    We have to byte swap the data is some cases, added function to do that
dev/ethertap.cc:
    added preproc directive for mac os

--HG--
extra : convert_revision : 2b5685765cfa2844926d7397f363d2788e3d640a
2004-06-21 00:58:30 -04:00
Ali Saidi
074969f8f1 Serialized cpu interrupts
cpu/simple_cpu/simple_cpu.cc:
    called basecpu serialization

--HG--
extra : convert_revision : 1a639b5e3c08e47a5d581c18b2b53fe87bd05b73
2004-06-17 15:36:59 -04:00
Ali Saidi
2f316082e4 Updated Copyright with information in bitkeeper changelogs
arch/alpha/alpha_linux_process.cc:
arch/alpha/alpha_linux_process.hh:
arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/alpha_tru64_process.cc:
arch/alpha/alpha_tru64_process.hh:
arch/alpha/aout_machdep.h:
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
arch/alpha/faults.cc:
arch/alpha/faults.hh:
arch/alpha/isa_traits.hh:
arch/alpha/osfpal.cc:
arch/alpha/osfpal.hh:
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
arch/alpha/vptr.hh:
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
base/bitfield.hh:
base/callback.hh:
base/circlebuf.cc:
base/circlebuf.hh:
base/compression/lzss_compression.cc:
base/compression/lzss_compression.hh:
base/compression/null_compression.hh:
base/cprintf.cc:
base/cprintf.hh:
base/cprintf_formats.hh:
base/date.cc:
base/dbl_list.hh:
base/endian.hh:
base/fast_alloc.cc:
base/fast_alloc.hh:
base/fifo_buffer.cc:
base/fifo_buffer.hh:
base/hashmap.hh:
base/hostinfo.cc:
base/hostinfo.hh:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/inet.cc:
base/inet.hh:
base/inifile.cc:
base/inifile.hh:
base/intmath.cc:
base/intmath.hh:
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.cc:
base/loader/object_file.hh:
base/loader/symtab.cc:
base/loader/symtab.hh:
base/misc.cc:
base/misc.hh:
base/mod_num.hh:
base/mysql.cc:
base/mysql.hh:
base/pollevent.cc:
base/pollevent.hh:
base/predictor.hh:
base/random.cc:
base/random.hh:
base/range.cc:
base/range.hh:
base/refcnt.hh:
base/remote_gdb.cc:
base/remote_gdb.hh:
base/res_list.hh:
base/sat_counter.cc:
base/sat_counter.hh:
base/sched_list.hh:
base/socket.cc:
base/socket.hh:
base/statistics.cc:
base/statistics.hh:
base/stats/events.cc:
base/stats/events.hh:
base/stats/flags.hh:
base/stats/mysql.cc:
base/stats/mysql.hh:
base/stats/mysql_run.hh:
base/stats/output.hh:
base/stats/statdb.cc:
base/stats/statdb.hh:
base/stats/text.cc:
base/stats/text.hh:
base/stats/types.hh:
base/stats/visit.cc:
base/stats/visit.hh:
base/str.cc:
base/str.hh:
base/time.cc:
base/time.hh:
base/trace.cc:
base/trace.hh:
base/userinfo.cc:
base/userinfo.hh:
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/exetrace.cc:
cpu/exetrace.hh:
cpu/full_cpu/op_class.hh:
cpu/full_cpu/smt.hh:
cpu/inst_seq.hh:
cpu/intr_control.cc:
cpu/intr_control.hh:
cpu/memtest/memtest.cc:
cpu/memtest/memtest.hh:
cpu/pc_event.cc:
cpu/pc_event.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/static_inst.cc:
cpu/static_inst.hh:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/disk_image.cc:
dev/disk_image.hh:
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherdump.cc:
dev/etherdump.hh:
dev/etherint.cc:
dev/etherint.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/etherpkt.cc:
dev/etherpkt.hh:
dev/ethertap.cc:
dev/ethertap.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/pcireg.h:
dev/platform.cc:
dev/platform.hh:
dev/simple_disk.cc:
dev/simple_disk.hh:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.hh:
dev/tsunamireg.h:
docs/stl.hh:
kern/linux/linux.hh:
kern/linux/linux_syscalls.cc:
kern/linux/linux_syscalls.hh:
kern/linux/linux_system.cc:
kern/linux/linux_system.hh:
kern/system_events.cc:
kern/system_events.hh:
kern/tru64/dump_mbuf.cc:
kern/tru64/dump_mbuf.hh:
kern/tru64/mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
kern/tru64/tru64.hh:
kern/tru64/tru64_events.cc:
kern/tru64/tru64_events.hh:
kern/tru64/tru64_syscalls.cc:
kern/tru64/tru64_syscalls.hh:
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
sim/async.hh:
sim/builder.cc:
sim/builder.hh:
sim/debug.cc:
sim/debug.hh:
sim/eventq.cc:
sim/eventq.hh:
sim/host.hh:
sim/main.cc:
sim/param.cc:
sim/param.hh:
sim/process.cc:
sim/process.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/sim_events.cc:
sim/sim_events.hh:
sim/sim_exit.hh:
sim/sim_object.cc:
sim/sim_object.hh:
sim/stat_control.cc:
sim/stat_control.hh:
sim/stats.hh:
sim/syscall_emul.cc:
sim/syscall_emul.hh:
sim/system.cc:
sim/system.hh:
sim/universe.cc:
test/bitvectest.cc:
test/circletest.cc:
test/cprintftest.cc:
test/initest.cc:
test/lru_test.cc:
test/nmtest.cc:
test/offtest.cc:
test/paramtest.cc:
test/rangetest.cc:
test/sized_test.cc:
test/stattest.cc:
test/strnumtest.cc:
test/symtest.cc:
test/tokentest.cc:
test/tracetest.cc:
util/m5/m5.c:
util/m5/m5op.h:
util/tap/tap.cc:
    Updated Copyright
dev/console.cc:
dev/console.hh:
    This code isn't ours, and shouldn't have our copyright

--HG--
extra : convert_revision : 598f2e5eab5d5d3de2c1e862b389086e3212f7c4
2004-06-08 13:37:27 -04:00
Kevin Lim
67b5f6afc1 Merged in new FastCPU stuff with existing code.
arch/alpha/ev5.cc:
    Added templatized processInterrupts() function that can be used by all of the CPU models.
arch/alpha/isa_desc:
    Merged in changes to remove CPU dependence.
arch/isa_parser.py:
    Merged in changes.
cpu/static_inst.hh:
    Includes FastCPU execute methods.

--HG--
extra : convert_revision : fcaa1dca35a9b316c73982bec8680df564f50bd8
2004-05-28 11:41:52 -04:00
Kevin Lim
a896960cbf FastCPU model added. It's very similar to the SimpleCPU, just without a lot of the stats tracking.
Also various changes to make the CPU model less ISA dependent, which includes moving the code that checks for interrupts up to the ISA level, moving code that zeroes the zero registers up to the ISA level, and removing opcode and ra from the regfile.

arch/alpha/alpha_memory.cc:
    The regfile has been changed so it no longer has the opcode and ra.  Instead the xc holds the actual instruction, and from there the opcode and ra can be obtained with OPCODE() and RA().
arch/alpha/ev5.cc:
    Moved code that once existed within simpleCPU to ev5, and templatized it.
    This way the CPU models can call processInterrupts and the ISA specific interrupt handling is left to the ISA's code.
    Also moved ISA specific zero registers from simpleCPU to here.
arch/alpha/ev5.hh:
    Added macros for obtaining the opcode and ra from the instruction itself, as there is no longer opcode or ra in the regfile.
arch/alpha/isa_desc:
    Added in declarations for the FastCPU model.
arch/alpha/isa_traits.hh:
    Removed opcode and ra from the regfile.  The xc now holds the actual instruction, and the opcode and ra can be obtained through it.
    Also added the declaration for the templated zeroRegisters() function, which will set the zero registers to 0.
arch/isa_parser.py:
    Added in FastCPUExecContext so it will generate code for the FastCPU model as well.
cpu/exec_context.cc:
    Added in a more generic trap function so "ev5_trap" doesn't need to be called.  It currently still calls the old method, with plans for making this ISA dependent in the future.
cpu/exec_context.hh:
    Exec context now has the instruction within it.  Also added methods for exec context to read an instruction from memory, return the current instruction, and set the instruction if needed.
    Also has declaration for more generic trap() function.
cpu/simple_cpu/simple_cpu.cc:
    Removed references to opcode and ra, and instead sets the xc's instruction with the fetched instruction.
cpu/static_inst.hh:
    Added declaration for execute() using FastCPUExecContext.

--HG--
extra : convert_revision : 0441ea3700ac50b733e485395d4dd4ac83666f92
2004-05-27 17:46:16 -04:00
Nathan Binkert
f622d74f81 add a few statistics events
arch/alpha/ev5.cc:
    Add an event for faults
cpu/simple_cpu/simple_cpu.cc:
    add events for uncached reads/writes

--HG--
extra : convert_revision : 747bdf12761e2de6ebbf54fecc9e0b71915b3a02
2004-05-21 13:58:39 -04:00
Nathan Binkert
b4405682d9 Change the namespace Statistics to Stats
--HG--
extra : convert_revision : 3084b292bbe2e8a392af8e99a31763ca0b0a9467
2004-05-21 13:03:17 -04:00
Nathan Binkert
2d8777a79b remove the annotation junk
arch/alpha/isa_desc:
    remove the annotation junk
    Move some code to AlphaPseudo where it belongs
arch/alpha/pseudo_inst.cc:
arch/alpha/pseudo_inst.hh:
    remove the annotation junk
    add pseudo instruction code that was previously misplaced

--HG--
extra : convert_revision : 97db8402aa34e0bdf044b138c52331fc9e714986
2004-05-13 08:03:36 -04:00
Nathan Binkert
a4d7bb113a Make a new stat type of Value which is a scalar stat that
proxies for a real C/C++ scalar value or scalar functor.
This replaces the scalar() and functor() terms that were
previously used in formulas.  This helps when dumping
statistics because the formulas are not supposed to change.

cpu/base_cpu.cc:
    Add a number of cycles stat to the cpu object that tracks the
    number of cycles that the cpu has executed.  This starts to pave
    the way for cpu cycles being different from event ticks.
cpu/base_cpu.hh:
    provide a functor for calculating all simulated instructions
    of all CPUs and a virtual function for determining that number.
    To deal with the change from functor() to Value::functor()
cpu/simple_cpu/simple_cpu.cc:
    simTicks -> numCycles
    numInsts is now a real Scalar stat, not a Formula
cpu/simple_cpu/simple_cpu.hh:
    numInsts is now a real Scalar stat, not a Formula
    count all instructions
sim/stat_control.cc:
    simInsts, simTicks, hostMemory, and hostSeconds are no
    longer Statistics::Formula but rather Statistics::Value
    add new stat for tick frequency
sim/stats.hh:
    don't need everything to be extern.
test/Makefile:
    Make stuff work a tad bit better
test/stattest.cc:
    test out Statistics::Value

--HG--
extra : convert_revision : c812e8baa2b17c08abf3a68ed1e1125dc6f2cfb4
2004-05-12 15:49:01 -04:00
Steve Reinhardt
7cab07268f Do a better job of factoring out CPU model in ISA description.
(Still not perfect though.)

arch/alpha/isa_desc:
    Do a better job of factoring out CPU model.  (Still not perfect though.)
    Pull execute() methods out of class declarations into separate section
    of file, allowing (1) easier replication for different CPU models and
    (2) a path to putting them all in a separate file.  Force all instruction
    execution context into a single model-dependent class (SimpleCPU itself
    for SimpleCPU, DynInst for FullCPU).
arch/isa_parser.py:
    Do a better job of factoring out CPU model.  (Still not perfect though.)
    Pull execute() methods out of class declarations into separate section
    of file, allowing (1) easier replication for different CPU models and
    (2) a path to putting them all in a separate file.
    Also restructure top level to allow parser to run under interactive
    interpreter session for easier debugging.
cpu/exec_context.hh:
    Add a few new methods to clean up isa_desc.
cpu/simple_cpu/simple_cpu.cc:
cpu/static_inst.hh:
    StaticInst::execute no longer takes a CPU and an ExecContext,
    just a unified FooCPUExecContext.
cpu/simple_cpu/simple_cpu.hh:
    Add methods to redirect calls to ExecContext so SimpleCPU
    can act as sole instruction execution context for itself.
    Typedef SimpleCPU to SimpleCPUExecContext.

--HG--
extra : convert_revision : ecc445503bc585585da5663fe61796580e744da6
2004-05-10 16:10:47 -07:00
Nathan Binkert
25a358983a Major stats package cleanup
Add support for generic visitors for stats and use them
to implement independent output functions.

Support for mysql output and some initial code for hacking
on mysql output with python

arch/alpha/pseudo_inst.cc:
base/hybrid_pred.cc:
base/hybrid_pred.hh:
base/sat_counter.cc:
base/sat_counter.hh:
cpu/simple_cpu/simple_cpu.cc:
kern/tru64/tru64_events.cc:
sim/main.cc:
sim/process.cc:
sim/process.hh:
sim/sim_events.cc:
sim/sim_object.cc:
sim/system.hh:
    update for changes in stats package
base/statistics.cc:
    move the python output code to base/stats/puthon.(cc|hh)
    and reimplement it as a visitor.

    move the text output code to base/stats/text.(cc|hh) and
    reimplement it as a visitor.

    move the database stuff into base/stats/statdb.(cc|hh) and
    get rid of the class.  Put everything as globals in the
    Statistics::Database namespace.

    allocate unique ids for all stats.

    directly implement the check routine and get rid of the
    various dumping routines since they're now in separate files.

    make sure that no two stats have the same name

    clean up some loops
base/statistics.hh:
    major changes to the statistics package again

    lots of code was factored out of statistics.hh into several
    separate files in base/stats/ (this will continue)

    There are now two Stat package types Result and Counter that
    are specified to allow the user to keep the counted type
    separate from the result type.  They are currently both doubles
    but that's an experiment.  There is no more per stat ability to
    set the type.  Statistics::Counter is not the same as Counter!

    Implement a visitor for statistics output so that new output
    types can be implemented independently from the stats package
    itself.

    Add a unique id to each stat so that it can be used to keep
    track of stats more simply.  This number can also be used in
    debugging problems with stats.

    Tweak the bucket size stuff a bit to make it work better.

    fixed VectorDist size bug
cpu/memtest/memtest.cc:
    Fix up for changes in stats package
    Don't use value() since it doesn't work with binning.  If you
    want a number as a stat, and to use it in the program itself,
    you really want two separate variables, one that's a stat,
    and one that's not.
cpu/memtest/memtest.hh:
    Fix up for changes in stats package
test/Makefile:
    Try to build stuff now that directories matter
test/stattest.cc:
    test all new output types
    choose which one with command line options

--HG--
extra : convert_revision : e3a3f5f0828c67c0e2de415d936ad240adaddc89
2004-05-04 17:01:00 -04:00
Steve Reinhardt
782fb42992 Basic cleanup pass to get rid of a few things that made the Python
configuration unnecessarily awkward.  Biggest changes are:

- External and internal object names now match in all cases.  The
macros still allow them to be different; the only reason I didn't
get rid of that is that the macros themselves should be going away
soon.  In the few conflicting cases, I sometimes renamed the C++ object
and sometimes renamed the config object.  The latter sets of substitions
are:

s/BaseBus/Bus/;
s/MemoryObject/FunctionalMemory/;
s/MemoryControl/MemoryController/;
s/FUPool/FuncUnitPool/;

- SamplingCPU is temporarily broken... we need to change the model
of how this works in the .ini file.  Having it as a CPU proxy is
really awkward.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
cpu/simple_cpu/simple_cpu.cc:
sim/process.cc:
    Rename objects to match config name.
cpu/base_cpu.cc:
    Uncomment SimObject define since SamplingCPU no longer
    does this for us.
dev/ethertap.cc:
    Use unsigned instead of uint16_t for params.
kern/tru64/tru64_system.cc:
    Use unsigned instead of uint64_t for init_param param.
test/paramtest.cc:
    Fix old SimObjectParam.

--HG--
extra : convert_revision : 378ebbc6a71ad0694501d09979a44d111a59e8dc
2004-04-02 22:57:08 -08:00
Erik Hallnor
8ad803058f Automerged
--HG--
extra : convert_revision : 7b56535ee32551f27db8d98172159f63e5099835
2004-03-04 15:06:34 -05:00
Erik Hallnor
7c089b2001 Copy implementations
arch/alpha/isa_desc:
    Need to return fault for copy operations.
cpu/exec_context.hh:
    Add temporary storage to pass source address from copy load to copy store
cpu/simple_cpu/simple_cpu.cc:
    Implement copy functions.
cpu/simple_cpu/simple_cpu.hh:
    Return fault

--HG--
extra : convert_revision : 98e5ce563449d6057ba45c70eece9235f1649a90
2004-03-04 14:57:57 -05:00
Nathan Binkert
ee96799519 Initial cleanup pass of lisa's function call tracking
code.

base/statistics.hh:
    We're getting rid of FS_MEASURE, but for now, we're going
    to still use a compile time flag to turn on and off binning
    of statistics.  (The flag is STATS_BINNING)
cpu/exec_context.cc:
cpu/exec_context.hh:
kern/tru64/tru64_system.cc:
    get rid of FS_MEASURE
cpu/simple_cpu/simple_cpu.cc:
    yank the function call tracking code out of the cpu and move
    it into the software context class itself.
kern/tru64/tru64_system.hh:
    get rid of FS_MEASURE
    move all of the tacking stuff to the same place.
sim/system.hh:
    cleanup

--HG--
extra : convert_revision : 73d3843afe1b3ba0d5445421c39c1148d3f4e7c0
2004-02-29 20:22:32 -05:00
Lisa Hsu
6a306d4caf add in an init() callback for CPU's so that no stats are accessed prior to the end of the build process. (Done by doing the registerExecContext() calling sequence in the init() process rather than the create() process).
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
    same thing for simple cpu's.

--HG--
extra : convert_revision : aac9f91742866fb26f8cace622f9b88454a69662
2004-02-24 14:59:25 -05:00
Nathan Binkert
695d51e513 make uncacheable stuff happen again
cpu/simple_cpu/simple_cpu.cc:
    Allow requests to be uncacheable

--HG--
extra : convert_revision : 7ab1442f2eec3763d5bc6a6f37b11f663851b12c
2004-02-20 15:22:41 -05:00
Steve Reinhardt
98948b2e57 More reformatting of reference parameter declarations.
The last change only caught the ones with types that
started with capitals.  This pass catches the rest
(mostly STL and uint*_t types).

base/cprintf_formats.hh:
cpu/simple_cpu/simple_cpu.cc:
sim/serialize.cc:
sim/serialize.hh:
    Change "foo_t& foo" to "foo_t &foo".

--HG--
extra : convert_revision : fc7f7425db2aef33e490f952b5ce74c8c36d0d41
2004-02-04 11:16:30 -08:00
Steve Reinhardt
b79f6b3273 insn->inst
--HG--
extra : convert_revision : fcc556fb7e65855ec3c04ef272177c8e7a38fff9
2004-02-02 18:14:11 -08:00
Steve Reinhardt
548b4a1cb0 Change "Foo& foo" declarations to "Foo &foo".
This primarily to be internally consistent (sometimes we used one,
sometimes the other, even within the same line of code!).
I picked the latter to be symmetric with "Foo *foo".

base/cprintf_formats.hh:
base/range.hh:
base/refcnt.hh:
base/res_list.hh:
base/statistics.hh:
base/str.hh:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
sim/serialize.cc:
sim/serialize.hh:
sim/syscall_emul.hh:
    Change "Foo& foo" declarations to "Foo &foo".

--HG--
extra : convert_revision : ca1b0e85a578b539214bda3b8d61ac23792f2e87
2004-02-02 15:55:35 -08:00
Erik Hallnor
01059eaded Change the way the hierarchy is separated. Now all virtual functions are in the interfaces. This allows new bus models to be used without major hassle. And I thought it was time to change it all again anyways.
cpu/simple_cpu/simple_cpu.cc:
    Switch doEvents to doEvents()

--HG--
extra : convert_revision : 14b9517017e76c7b941247004393bf260f397d9a
2004-01-25 05:01:00 -05:00
Steve Reinhardt
7c708c8d1b - Switch events to use a priority enum instead of integers.
This lets us centralize priorities so we can see what's going on.
- Shift serialize & cpu-switch events to happen before CPU ticks (to be
consistent with starting new CPU on same cycle instead of next cycle).
- Get rid of unnecessary bus stats reset callback.

cpu/simple_cpu/simple_cpu.cc:
sim/debug.cc:
sim/eventq.hh:
sim/serialize.cc:
sim/sim_events.cc:
sim/sim_events.hh:
    Switch events to use a priority enum instead of integers.
    This lets us centralize priorities so we can see what's going on.

--HG--
extra : convert_revision : 510d79b43c0a1c97a10eb65916f7335b1de8b956
2003-12-11 08:29:52 -08:00
Steve Reinhardt
4ce6118fda Factor ExecContext::setStatus(), BaseCPU::execCtxStatusChange(),
and SimpleCPU::setStatus() into separate functions.  For example,
setStatus(Active) is now activate().

--HG--
extra : convert_revision : 4392e07caf6c918db0b535f613175109681686fe
2003-12-10 17:47:28 -08:00
Steve Reinhardt
a1dcdeb3d8 Merge zizzer:/bk/m5 into isabel.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision : c74b502bf44ac300e44c9aa7d6d6e3c55a511893
2003-12-09 14:21:46 -08:00
Steve Reinhardt
5e360051cf Minor tweaks to make a switchover at tick N match
restarting from a checkpoint at tick N.

cpu/simple_cpu/simple_cpu.cc:
    On a CPU switchover, schedule the new CPU's first tick event
    for curTick+1 instead of curTick.

--HG--
extra : convert_revision : f0757d6f028214d36c1cff992db688fd6e8a6fdc
2003-12-09 14:21:38 -08:00