Some more useful debugging info for kernel panic and die events
Increase the default number of CSHR's, we should really fix this or make it a parameter Use a setBlocked call to tell the bus it should block New technique for sampling and switchover: 1) Sampler switchover event happens 2) All cpus in the current phase of sampling associated with this sampler are signaled to switchover 3) Each cpu drains it's pipe of things being executed (stops fetching and waits for empty pipe) 4) Once the pipe is empty the cpu calls back to the sampler to signal it has finished, and moves into the switchedout state (continues not to fetch) 5) The sampler collects all the signals, once all cpus are drained it calls the new cpu's in the next phase to takeover from the correct cpu 6) The statistics are reset and the next switchover time is calculated from this point cpu/base_cpu.cc: cpu/base_cpu.hh: cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: Reconfigure the way the sampling switchover works cpu/pc_event.cc: More debugging information on kernel panic's kern/linux/linux_system.cc: More debug info for Kernel Die events kern/linux/linux_system.hh: More debug info for kernel die events --HG-- extra : convert_revision : 61cc42e43ba738705aa1f1d167b65d4d6dee51ae
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7 changed files with 58 additions and 20 deletions
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@ -35,6 +35,7 @@
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#include "base/misc.hh"
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#include "cpu/base_cpu.hh"
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#include "cpu/exec_context.hh"
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#include "cpu/sampling_cpu/sampling_cpu.hh"
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#include "sim/param.hh"
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#include "sim/sim_events.hh"
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@ -210,9 +211,10 @@ BaseCPU::registerExecContexts()
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void
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BaseCPU::switchOut()
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BaseCPU::switchOut(SamplingCPU *sampler)
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{
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// default: do nothing
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// default: do nothing, signal done
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sampler->signalSwitched();
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}
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void
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@ -32,6 +32,7 @@
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#include <vector>
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#include "base/statistics.hh"
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#include "cpu/sampling_cpu/sampling_cpu.hh"
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#include "sim/eventq.hh"
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#include "sim/sim_object.hh"
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#include "targetarch/isa_traits.hh"
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@ -114,9 +115,9 @@ class BaseCPU : public SimObject
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bool deferRegistration;
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void registerExecContexts();
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/// Prepare for another CPU to take over execution. Called by
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/// takeOverFrom() on its argument.
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virtual void switchOut();
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/// Prepare for another CPU to take over execution. When it is
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/// is ready (drained pipe) it signals the sampler.
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virtual void switchOut(SamplingCPU *);
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/// Take over execution from the given CPU. Used for warm-up and
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/// sampling.
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@ -31,10 +31,11 @@
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#include <string>
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#include <utility>
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#include "sim/debug.hh"
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#include "base/trace.hh"
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#include "cpu/base_cpu.hh"
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#include "cpu/exec_context.hh"
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#include "cpu/pc_event.hh"
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#include "base/trace.hh"
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#include "sim/debug.hh"
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#include "sim/universe.hh"
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using namespace std;
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@ -123,6 +124,8 @@ BreakPCEvent::BreakPCEvent(PCEventQueue *q, const std::string &desc, bool del)
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void
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BreakPCEvent::process(ExecContext *xc)
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{
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StringWrap name(xc->cpu->name() + ".break_event");
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DPRINTFN("break event %s triggered", descr());
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debug_break();
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if (remove)
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delete this;
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@ -47,6 +47,7 @@
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#include "cpu/exec_context.hh"
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#include "cpu/exetrace.hh"
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#include "cpu/full_cpu/smt.hh"
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#include "cpu/sampling_cpu/sampling_cpu.hh"
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#include "cpu/simple_cpu/simple_cpu.hh"
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#include "cpu/static_inst.hh"
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#include "mem/base_mem.hh"
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@ -179,11 +180,21 @@ SimpleCPU::~SimpleCPU()
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}
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void
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SimpleCPU::switchOut()
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SimpleCPU::switchOut(SamplingCPU *s)
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{
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_status = SwitchedOut;
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if (tickEvent.scheduled())
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tickEvent.squash();
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sampler = s;
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if (status() == DcacheMissStall) {
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DPRINTF(Sampler,"Outstanding dcache access, waiting for completion\n");
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_status = DcacheMissSwitch;
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}
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else {
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_status = SwitchedOut;
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if (tickEvent.scheduled())
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tickEvent.squash();
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sampler->signalSwitched();
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}
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}
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@ -203,8 +214,6 @@ SimpleCPU::takeOverFrom(BaseCPU *oldCPU)
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tickEvent.schedule(curTick);
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}
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}
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oldCPU->switchOut();
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}
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@ -631,6 +640,12 @@ SimpleCPU::processCacheCompletion()
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_status = Running;
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scheduleTickEvent(1);
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break;
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case DcacheMissSwitch:
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if (memReq->cmd.isRead()) {
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curStaticInst->execute(this,traceData);
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}
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_status = SwitchedOut;
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sampler->signalSwitched();
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case SwitchedOut:
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// If this CPU has been switched out due to sampling/warm-up,
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// ignore any further status changes (e.g., due to cache
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@ -29,12 +29,13 @@
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#ifndef __SIMPLE_CPU_HH__
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#define __SIMPLE_CPU_HH__
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#include "cpu/base_cpu.hh"
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#include "sim/eventq.hh"
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#include "cpu/pc_event.hh"
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#include "base/statistics.hh"
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#include "cpu/base_cpu.hh"
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#include "cpu/exec_context.hh"
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#include "cpu/pc_event.hh"
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#include "cpu/sampling_cpu/sampling_cpu.hh"
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#include "cpu/static_inst.hh"
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#include "sim/eventq.hh"
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// forward declarations
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#ifdef FULL_SYSTEM
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@ -117,6 +118,7 @@ class SimpleCPU : public BaseCPU
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IcacheMissStall,
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IcacheMissComplete,
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DcacheMissStall,
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DcacheMissSwitch,
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SwitchedOut
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};
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// execution context
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ExecContext *xc;
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void switchOut();
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void switchOut(SamplingCPU *s);
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void takeOverFrom(BaseCPU *oldCPU);
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#ifdef FULL_SYSTEM
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@ -184,6 +186,11 @@ class SimpleCPU : public BaseCPU
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// Refcounted pointer to the one memory request.
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MemReqPtr memReq;
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// Pointer to the sampler that is telling us to switchover.
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// Used to signal the completion of the pipe drain and schedule
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// the next switchover
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SamplingCPU *sampler;
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StaticInstPtr<TheISA> curStaticInst;
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class CacheCompletionEvent : public Event
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} else
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panic("could not find dp264_mv\n");
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#ifdef DEBUG
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#ifndef NDEBUG
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kernelPanicEvent = new BreakPCEvent(&pcEventQueue, "kernel panic");
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if (kernelSymtab->findAddress("panic", addr))
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kernelPanicEvent->schedule(addr);
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else
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panic("could not find kernel symbol \'panic\'");
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kernelDieEvent = new BreakPCEvent(&pcEventQueue, "die if kernel");
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if (kernelSymtab->findAddress("die_if_kernel", addr))
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kernelDieEvent->schedule(addr);
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else
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panic("could not find kernel symbol \'die_if_kernel\'");
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#endif
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/**
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LinuxSystem::~LinuxSystem()
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{
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#ifdef DEBUG
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#ifndef NDEBUG
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delete kernelPanicEvent;
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#endif
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delete skipIdeDelay50msEvent;
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@ -57,9 +57,12 @@ class PrintThreadInfo;
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class LinuxSystem : public System
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{
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private:
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#ifdef DEBUG
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#ifndef NDEBUG
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/** Event to halt the simulator if the kernel calls panic() */
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BreakPCEvent *kernelPanicEvent;
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/** Event to halt the simulator if the kernel calls die_if_kernel */
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BreakPCEvent *kernelDieEvent;
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#endif
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/**
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