Commit graph

3368 commits

Author SHA1 Message Date
Gabe Black
ae64377afe X86: Implement the media instructions that convert integer values to floating point. 2009-08-17 18:41:27 -07:00
Gabe Black
8e97cd9c8f X86: Implement a media microop for converting integer values to floating point. 2009-08-17 18:41:25 -07:00
Gabe Black
b34b507fd8 X86: Implement the floating point media instructions. 2009-08-17 18:40:40 -07:00
Gabe Black
af3a53726b X86: Implement a floating point media divide microop. 2009-08-17 18:40:38 -07:00
Gabe Black
fcb5b2226c X86: Implement the floating point media multiply instructions. 2009-08-17 18:38:53 -07:00
Gabe Black
94e771e283 X86: Implement a floating point media multiply microop. 2009-08-17 18:38:51 -07:00
Gabe Black
dd81a34829 X86: Implement the floating point media subtract instructions. 2009-08-17 18:36:20 -07:00
Gabe Black
9fee8b75aa X86: Implement a media floating point subtract microop. 2009-08-17 18:36:18 -07:00
Gabe Black
49c2610c04 X86: Implement the floating point media add instructions. 2009-08-17 18:35:06 -07:00
Gabe Black
df163284fc X86: Implement a floating point media add microop. 2009-08-17 18:35:04 -07:00
Gabe Black
449db8a370 X86: Implement the media sqrt instructions. 2009-08-17 18:34:19 -07:00
Gabe Black
6a923c1c79 X86: Implement a media square root microop. 2009-08-17 18:34:16 -07:00
Gabe Black
09eed9ff62 X86: Implement the media floating point max instructions. 2009-08-17 18:33:28 -07:00
Gabe Black
8d37ce8652 X86: Implement the floating point media max microop. 2009-08-17 18:33:25 -07:00
Gabe Black
34f528bd95 X86: Implement the media floating point min instructions. 2009-08-17 18:32:12 -07:00
Gabe Black
1d706c0434 X86: Implement a floating point media min microop. 2009-08-17 18:32:09 -07:00
Gabe Black
e20c8a4b05 X86: Implement the pack instructions. 2009-08-17 18:32:08 -07:00
Gabe Black
1273277d3b X86: Create a pack media microop. 2009-08-17 18:27:54 -07:00
Gabe Black
e6b5192c26 X86: Rename sel to ext for media microops. 2009-08-17 18:27:44 -07:00
Gabe Black
80b4456fec X86: Move the MMX version of MOVD into the simd64 directory. 2009-08-17 18:27:30 -07:00
Gabe Black
63403bd562 X86: Implement the remaining unpack instructions. 2009-08-17 18:27:19 -07:00
Gabe Black
7b18f8a062 X86: Implement PANDN, ANDNPS, and ANDNPD. 2009-08-17 18:25:00 -07:00
Gabe Black
458521f055 X86: Implement a multimedia andn microop. 2009-08-17 18:24:58 -07:00
Gabe Black
3633392ec4 X86: Implement PAND, ANDPS, and ANDPD. 2009-08-17 18:24:18 -07:00
Gabe Black
ab49a34a4e X86: Implement a multimedia and microop. 2009-08-17 18:24:16 -07:00
Gabe Black
83a78072df X86: Implement POR, ORPD and ORPS. 2009-08-17 18:23:33 -07:00
Gabe Black
25c6b016a6 X86: Implement a media or microop. 2009-08-17 18:23:30 -07:00
Gabe Black
f9346d25c8 X86: Implement PXOR. 2009-08-17 18:23:04 -07:00
Gabe Black
69f0bf743c X86: (Re)implement XORPS and XORPD. 2009-08-17 18:22:37 -07:00
Gabe Black
982b3ad1f0 X86: Implement a media xor microop. 2009-08-17 18:22:33 -07:00
Gabe Black
f3fb444af4 X86: Implement PUNPCKLQDQ. 2009-08-17 18:21:46 -07:00
Gabe Black
cfaeb5eaf7 X86: Implement PUNPCKHQDQ. 2009-08-17 18:21:09 -07:00
Gabe Black
aabbb22cca X86: Implement PUNPCKHDQ. 2009-08-17 18:20:50 -07:00
Gabe Black
535ba241f8 X86: Implement PUNPCKHWD. 2009-08-17 18:19:43 -07:00
Gabe Black
093b5b3274 X86: Implement PUNPCKHBW. 2009-08-17 18:19:19 -07:00
Gabe Black
3ae2f03927 X86: Implement PUNPCKLDQ. 2009-08-17 18:19:01 -07:00
Gabe Black
673b19f5d4 X86: Implement PUNPCKLWD. 2009-08-17 18:18:40 -07:00
Gabe Black
ae4ee21ecd X86: Implement the versions of PUNPCKLBW that use XMM registers. 2009-08-17 18:18:19 -07:00
Gabe Black
24496060e5 X86: Implement the MOVQ instruction. 2009-08-17 18:17:29 -07:00
Gabe Black
f1bfa9d6e4 X86: Implement the lfpimm microop. 2009-08-17 18:17:26 -07:00
Gabe Black
fca7cb83f0 X86: Implement the versions of MOVD that have an MMX source. 2009-08-17 18:16:07 -07:00
Gabe Black
247ed2379d X86: Implement the versions of PUNPCKLBW that use MMX registers. 2009-08-17 18:15:42 -07:00
Gabe Black
ecc62e750e X86: Implement an unpack microop. 2009-08-17 18:15:39 -07:00
Gabe Black
6457fb7003 X86: Implement the versions of MOVD that have an MMX destination. 2009-08-17 18:15:24 -07:00
Gabe Black
191590bcc4 X86: Ignore the size part of XMM/MMX operands. The instructions know what they want. 2009-08-17 18:15:23 -07:00
Gabe Black
33cb4c2f09 X86: Use suffixes to differentiate XMM/MMX/GPR operands. 2009-08-17 18:15:21 -07:00
Gabe Black
3a4438a868 X86: Add microcode assembler symbols for mmx registers. 2009-08-17 18:15:19 -07:00
Gabe Black
2f1001e95c X86: Set up a media microop framework and create mov2int and mov2fp microops. 2009-08-17 18:15:18 -07:00
Gabe Black
cec4e3b39e X86: Create base classes for use with media/SIMD microops. 2009-08-17 18:15:16 -07:00
Gabe Black
0b68fbdbe1 X86: Turn the DIV and IDIV microcode into templates and generate all the variants. 2009-08-17 18:15:14 -07:00
Gabe Black
a9b2bf5119 X86: Remove some FIXMEs from IDIV that have been fixed. 2009-08-17 18:15:13 -07:00
Gabe Black
3f2f3bede8 X86: Turn the CMPXCHG8B microcode into a template and generate each variant. 2009-08-17 18:15:00 -07:00
Polina Dudnik
c438b2e431 Branch Merge 2009-08-17 11:33:32 -05:00
Gabe Black
a43ae579dd Merge with head. 2009-08-17 00:21:57 -07:00
Gabe Black
32c8514b45 X86: Fix a bug introduced to IDIV in a recent attempt to fix another bug. 2009-08-17 00:20:03 -07:00
Nathan Binkert
a6b39c07d9 code_formatter: Add a python class for writing code generator templates 2009-08-16 13:40:03 -07:00
Nathan Binkert
2ecaa99025 ply: add a base class called Grammar that encapsulates a ply grammar 2009-08-16 13:40:01 -07:00
Nathan Binkert
2334e6fdd5 orderdict: Use DictMixin and add orderdict to m5.util 2009-08-16 13:40:00 -07:00
Nathan Binkert
06c7ecb207 python: Make it possible to import the parts of m5 that are pure python 2009-08-16 13:39:59 -07:00
Polina Dudnik
6654fe02da Made servicing_atomic a counter and added started writes:
a function for setting the flag to indicate that
the rmw_writes started issuing
2009-08-15 12:45:11 -05:00
Polina Dudnik
a8e11cf3bb Bug fix: indicate when writes started coming in 2009-08-14 17:57:54 -05:00
Polina Dudnik
ee3226d973 Merge with current branch 2009-08-14 15:30:25 -05:00
Polina Dudnik
0b0f47ec16 Added proc_id to CacheMsg for SMT.
Not yet necessary, but in case each of the threads
is allowed to initiate an atomic, will come in handy
2009-08-14 15:30:07 -05:00
Polina Dudnik
de25decf37 Multi-line RMW handling 2009-08-14 14:24:15 -05:00
Polina Dudnik
4b924fd16c SMT atomics modifications:
don't allow enquing from other threads if servicing and atomic for a thread
2009-08-14 14:06:14 -05:00
Derek Hower
bcaf93d182 Automated merge with ssh://hg@m5sim.org/m5 2009-08-13 10:37:37 -05:00
Derek Hower
db40cb8f51 ruby: config bugfix 2009-08-13 10:37:09 -05:00
Tushar Krishna
35082a67b6 ruby/network data_msg_size bug fix with updated stats 2009-08-11 15:19:04 -07:00
Brad Beckmann
b89add1e3f merged Tushar's bug fix with public repository changes 2009-08-11 12:22:41 -07:00
Derek Hower
1c3efb48ad Automated merge with ssh://hg@m5sim.org/m5 2009-08-09 13:59:14 -05:00
Derek Hower
1a452d228b protocol: added recycle actions to MOESI DMA events 2009-08-09 13:58:40 -05:00
Gabe Black
c5fae51774 X86: Implement the CMPXCHG8B/CMPXCHG16B instruction. 2009-08-09 01:01:41 -07:00
Gabe Black
bbf117b20e X86: Don't clobber the original dividend when doing signed divide. 2009-08-09 01:01:18 -07:00
Gabe Black
3b07a5829d X86: Decode byte sized singed divide as byte sized. 2009-08-09 01:00:47 -07:00
Gabe Black
6e97feb8a5 X86: Make not taken conditional moves leave the destination alone. Adjust CMOVcc.
The manuals from both AMD and Intel say that when writing to a 32 bit
destination in 64 bit mode, the upper 32 bits of the register are filled with
zeros. They also both say that the CMOV instructions leave their destination
alone when their condition fails. Unfortunately, it seems that CMOV will zero
extend its destination register whether or not it was supposed to actually do
a move on both platforms. This seems to be the only case where this happens,
but it would be hard to say for sure.
2009-08-08 17:23:19 -07:00
Tushar Krishna
b952eb19c1 bug fix for data_msg_size in network/Network.cc 2009-08-07 13:59:40 -07:00
Gabe Black
7c606e3835 X86: (Re)Implemented SHRD. 2009-08-07 10:13:33 -07:00
Gabe Black
4f5270f946 X86: Implement SHLD. 2009-08-07 10:13:24 -07:00
Gabe Black
3a55fc5cac X86: Implement shift right/left double microops.
This is my best guess as far as what these should do. Other existing microops
use implicit registers, mul1s and mul1u for instance, so this should be ok.
The microop that loads the implicit DoubleBits register would fall into one
of the microop slots for moving to/from special registers.
2009-08-07 10:13:20 -07:00
Gabe Black
62a2e85c9a X86: Make the qaud width bswap instruction handle the fact that 32 bit operations zero extend. 2009-08-07 10:12:58 -07:00
Gabe Black
0526f453aa X86: Use the right field when using legacy prefixes to distinguish instructions. 2009-08-07 10:12:52 -07:00
Gabe Black
2daba26359 X86: Don't truncate the immediate parameter for the ENTER instruction. 2009-08-07 10:12:29 -07:00
Gabe Black
2e3446a410 X86: Adjust the various sizes used for the enter and leave instructions. 2009-08-06 21:44:42 -07:00
Gabe Black
c7b894a06f X86: Make scas compare its operands in the right order. 2009-08-06 21:44:41 -07:00
Gabe Black
011c1865ad X86: Fix a copy/paste error for cmovnp. 2009-08-06 21:44:40 -07:00
Derek Hower
cbc52ef6c5 fixed MOESI_CMP_directory bug 2009-08-06 03:41:28 -05:00
Derek Hower
f5e0c56da2 protocol: fixed MOESI_CMP_directory bug 2009-08-06 01:15:55 -05:00
Derek Hower
a1b5a6320f ruby: better configuration assert message 2009-08-06 01:15:23 -05:00
Derek Hower
dff7c9eaa0 merge 2009-08-05 14:23:32 -05:00
Derek Hower
fbf7391bb0 ruby: configuration supports multiple runs in same session
These changes allow to run Ruby-gems multiple times from the same
ruby-lang script with different configurations
2009-08-05 14:20:32 -05:00
Derek Hower
1276df51e2 protocol: made MI_example dma mapping generic 2009-08-05 14:17:23 -05:00
Gabe Black
60d4a0f6d7 Merge with head. 2009-08-05 03:12:39 -07:00
Gabe Black
da2df2fc25 X86: Make conditional moves zero extend their 32 bit destinations always. 2009-08-05 03:07:55 -07:00
Gabe Black
b64d0bdeda X86: Fix condition code setting for signed multiplies with negative results. 2009-08-05 03:07:01 -07:00
Gabe Black
2914a8eb16 X86: Make the check for negative operands for sign multiply more direct. 2009-08-05 03:06:37 -07:00
Gabe Black
e2e0ae576a X86: Make sure immediate values are truncated properly.
Register values will be "picked" which will assure they don't have junk beyond
the part we're using. Immediate values don't go through a similar process, so
we should truncate them explicitly.
2009-08-05 03:06:01 -07:00
Gabe Black
ef3896d851 X86: Use the new forced folding mechanism for the SAHF and LAHF instructions. 2009-08-05 03:04:17 -07:00
Gabe Black
664d50b439 X86: Fix the indexing for ah in byte division instructions. 2009-08-05 03:03:41 -07:00
Gabe Black
abe8fb3844 X86: Fix the indexing for ah in byte multiply instructions. 2009-08-05 03:03:28 -07:00
Gabe Black
df1abc4412 X86: Let microops force folding an index into the high byte of a register. 2009-08-05 03:03:07 -07:00
Gabe Black
c4140d7d60 X86: Handle rotate left with carry instructions that go all the way around or more. 2009-08-05 03:02:28 -07:00
Gabe Black
3990445354 X86: Set the flags on rotate left with carry instructions. 2009-08-05 03:02:05 -07:00
Gabe Black
d265f7683e X86: Handle rotate right with carry instructions that go all the way around or more. 2009-08-05 03:01:49 -07:00
Gabe Black
77dc6b33ee X86: Fix the overflow bit for rotate right with carry. 2009-08-05 03:01:23 -07:00
Gabe Black
c8b1a4583e X86: Fix the computation of the bottom part of rotate right with carry. 2009-08-05 03:01:07 -07:00
Gabe Black
bab4597fc5 X86: Fix the computation of the upper part of rotate right with carry. 2009-08-05 03:00:43 -07:00
Gabe Black
4e4adcaaa8 X86: Set the flags for rotate right with carry instructions. 2009-08-05 03:00:23 -07:00
Gabe Black
64d7948692 X86: Handle rotating right all the way around or more. 2009-08-05 03:00:03 -07:00
Gabe Black
88041f75c4 X86: Set the flags on a rotate right instruction. 2009-08-05 02:59:39 -07:00
Gabe Black
029d360db2 X86: Make shifts/rotations that write to 32 bits of a register zero extend. 2009-08-05 02:59:25 -07:00
Gabe Black
7f9a3af250 X86: Handle left rotations that go all the way around or more. 2009-08-05 02:58:54 -07:00
Gabe Black
99adfd9dae X86: Actually set the flags on a rotate left instruction. 2009-08-05 02:58:20 -07:00
Gabe Black
c087b60af3 X86: Fix the sar carry flag. 2009-08-05 02:58:03 -07:00
Gabe Black
860f0f8350 X86: Fix sign extension when doing an arithmetic shift right by 0. 2009-08-05 02:57:47 -07:00
Gabe Black
a238959c34 X86: Fix the carry flag for shr. 2009-08-05 02:56:49 -07:00
Gabe Black
22a5f66820 X86: Fix the carry flag for shl. 2009-08-05 02:56:38 -07:00
Gabe Black
df2c862a07 X86: Fix how the parity flag is computed.
It's only for the lowest order byte, and I had the polarity wrong.
2009-08-05 02:56:12 -07:00
Derek Hower
7f012ef8da ruby: made mapAddressToRange based off a bit count 2009-08-04 23:05:37 -05:00
Derek Hower
33b28fde7a slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers
This changeset contains a lot of different changes that are too
mingled to separate.  They are:

1.  Added MOESI_CMP_directory

I made the changes necessary to bring back MOESI_CMP_directory,
including adding a DMA controller.  I got rid of MOESI_CMP_directory_m
and made MOESI_CMP_directory use a memory controller. Added a new
configuration for two level protocols in general, and
MOESI_CMP_directory in particular.

2.  DMA Sequencer uses a generic SequencerMsg

I will eventually make the cache Sequencer use this type as well.  It
doesn't contain an offset field, just a physical address and a length.
MI_example has been updated to deal with this.

3. Parameterized Controllers

SLICC controllers can now take custom parameters to use for mapping,
latencies, etc.  Currently, only int parameters are supported.
2009-08-04 12:52:52 -05:00
Derek Hower
c1e0bd1df4 slicc: generate html by default 2009-08-04 12:42:45 -05:00
Nathan Binkert
bd7af84d5e slicc: better error messages when the python parser fails 2009-08-04 09:37:27 -07:00
Gabe Black
f5c21eaa1a Merged with head. 2009-08-03 11:06:19 -07:00
Gabe Black
676dc6d292 X86: Fix segment override prefixes on instructions that use rbp/rsp and a displacement. 2009-08-03 11:01:40 -07:00
Derek Hower
ac15e42c17 Automated merge with ssh://hg@m5sim.org/m5 2009-08-03 11:39:08 -05:00
Gabe Black
38c2af17a5 X86: Set up the IDE device correctly, ie. with and using legacy ports. 2009-08-02 18:01:13 -07:00
Gabe Black
80aa771dbc IDE: Configure the IDE control to reflect the initial value of the command register. 2009-08-02 18:01:09 -07:00
Gabe Black
aff57202b4 X86: Fix the high result of mul1s, and removed undefined shifts from the mult microops. 2009-08-02 08:39:29 -07:00
Steve Reinhardt
a13a706a20 Fix setting of INST_FETCH flag for O3 CPU.
It's still broken in inorder.
Also enhance DPRINTFs in cache and physical memory so we
can see more easily whether it's getting set or not.
2009-08-01 22:50:14 -07:00
Steve Reinhardt
1c28004654 Clean up some inconsistencies with Request flags. 2009-08-01 22:50:13 -07:00
Steve Reinhardt
c0755e6085 Rename internal Request fields to start with '_'.
The inconsistency was causing a subtle bug with some of the
constructors where the params had the same name as the fields.
This is also a first step to switching the accessors over to
our new "standard", e.g., getVaddr() -> vaddr().
2009-08-01 22:50:10 -07:00
Korey Sewell
aa75b9a7a7 merge mips fix and statetrace changes 2009-07-31 10:40:42 -04:00
Korey Sewell
60063cc700 mips: fix ll/sc pairs working incorrectly because of accidental clobber of LLFLAG 2009-07-31 09:34:29 -04:00
Nathan Binkert
3dd3de5feb compile: fix accidental conversion of == into = 2009-07-30 17:42:57 -07:00
Gabe Black
4971331b4f ARM: Mul and mla ignore the c and v flags, but we were setting them to 1. 2009-07-29 22:24:00 -07:00
Derek Hower
d9ff3021ba ruby: fixed clearStats 2009-07-29 13:46:58 -05:00
Gabe Black
b066e717f4 ARM: Fix an instruction in the cmpxchg kernel provided routine.
The instruction was encoded as a load instead of the intended store.
2009-07-29 00:18:26 -07:00
Gabe Black
c2da5bae17 ARM: Get rid of a stray line in the set_tls handler. 2009-07-29 00:17:20 -07:00
Gabe Black
1e04b6281d ARM: Make the ARM native tracer stop M5 if control diverges.
If the control flow of M5's executable and statetrace's target process get out
of sync even a little, there will be a LOT of output, very little of which
will be useful. There's also almost no hope for recovery. In those cases, we
might as well give up and not generate a huge, mostly worthless trace file.
2009-07-29 00:17:11 -07:00
Gabe Black
2871a13ab3 Simple CPU: Make the simple CPU handle the IntRegs trace flag. 2009-07-29 00:15:26 -07:00
Gabe Black
873112ea99 ARM: Make sure the target process doesn't run away from statetrace. 2009-07-29 00:14:43 -07:00
Ali Saidi
0a9eb59e6f ARM: Ignore the "times" system call. 2009-07-29 00:09:46 -07:00
Ali Saidi
19a4fb0ff3 ARM: Fix an ioctl constant. 2009-07-29 00:09:44 -07:00
Derek Hower
469256d823 ruby: removed unused/incorrect profiler state 2009-07-27 21:43:43 -05:00
Ali Saidi
daf8718da9 ARM: Update some syscall constants and delete others that are Alpha only. 2009-07-27 00:54:55 -07:00
Gabe Black
d3f2992e39 ARM: Decode fstmx and fldmx instructions. We can ignore them for now. 2009-07-27 00:54:50 -07:00
Gabe Black
52b4a7c36f ARM: Only send information that changed between statetrace and M5. 2009-07-27 00:54:30 -07:00
Gabe Black
90d3d3535b imported patch nativetracestreamline.patch 2009-07-27 00:54:24 -07:00
Gabe Black
8ec235c7b1 ARM: Make native trace print out what instruction caused an error. 2009-07-27 00:54:09 -07:00
Gabe Black
c18d6cb1a7 ARM: Implement a basic version of the fmxr instruction. 2009-07-27 00:53:29 -07:00
Gabe Black
2828fa459d ARM: Implement a basic version of the fmrx instruction. 2009-07-27 00:53:24 -07:00