Commit graph

8247 commits

Author SHA1 Message Date
Ali Saidi
59bf0e7eb4 Timesync: Make sure timesync event is setup after curTick is unserialized
Setup initial timesync event in initState or loadState so that curTick has
been updated to the new value, otherwise the event is scheduled in the past.
2011-02-11 18:29:35 -06:00
Brad Beckmann
8ea71c3907 merged with Ali X11 patch 2011-02-10 13:31:52 -08:00
Brad Beckmann
fbebe9a642 MOESI_hammer: fixed wakeup for SS->S transistion 2011-02-10 13:28:23 -08:00
Ali Saidi
b7457fc11e Ext: Add X11 keysym header files to ext directory. 2011-02-09 22:27:37 -06:00
Brad Beckmann
06dfee5cea ruby: removed duplicate make response call 2011-02-09 16:02:09 -08:00
Brad Beckmann
4eab18fd06 regess: protocol regression tester updates 2011-02-08 18:07:54 -08:00
Brad Beckmann
ea9d4c3a97 memtest: due to contention increase, increased deadlock threshold 2011-02-08 15:53:33 -08:00
Brad Beckmann
6ebd7c390b config: fixed minor bug connecting dma devices to ruby 2011-02-08 15:52:44 -08:00
Nilay Vaish
488280e48b MESI CMP: Unset TBE pointer in L2 cache controller
The TBE pointer in the MESI CMP implementation was not being set to NULL
when the TBE is deallocated. This resulted in segmentation fault on testing
the protocol when the ProtocolTrace was switched on.
2011-02-08 07:47:02 -06:00
Gabe Black
0851580aad Stats: Re update stats. 2011-02-07 19:23:13 -08:00
Gabe Black
1b64bfa933 Stats: Back out broken update. 2011-02-07 19:23:11 -08:00
Tim Harris
44e5e7e053 X86: Obey the wp bit of CR0.
If cr0.wp ("write protect" bit) is clear then do not generate page faults when
writing to write-protected pages in kernel mode.
2011-02-07 15:18:52 -08:00
Tim Harris
6da83b8a1b X86: Use all 64 bits of the lstar register in the SYSCALL_64 macroop.
During SYSCALL_64, use dataSize=8 when handling new rip (ref
http://www.intel.com/Assets/PDF/manual/253668.pdf 5.8.8 IA32_LSTAR is a 64-bit
address)
2011-02-07 15:16:27 -08:00
Tim Harris
2ea1aa8a4f X86: Fix JMP_FAR_I to unpack a far pointer correctly.
JMP_FAR_I was unpacking its far pointer operand using sll instead of srl like
it should, and also putting the components in the wrong registers for use by
other microcode.
2011-02-07 15:12:59 -08:00
Tim Harris
5810ab121c X86: Read the LDT/GDT at CPL0 when executing an iret.
During iret access LDT/GDT at CPL0 rather than after transition to user mode
(if I'm reading the Intel IA-64 architecture spec correctly, the contents of
the descriptor table are read before the CPL is updated).
2011-02-07 15:05:28 -08:00
Nilay Vaish
10b4b364d9 Orion: Replace printf() with fatal()
The code for Orion 2.0 makes use of printf() at several places where there as
an error in configuration of the model. These have been replaced with fatal().
2011-02-07 12:42:23 -06:00
Korey Sewell
1b4e788407 ruby: add stdio header in SRAM.hh
missing header file caused RUBY_FS to not compile
2011-02-07 12:19:46 -05:00
Gabe Black
2107258d24 X86: Add stats for the new x86 fs regressions. 2011-02-07 01:23:16 -08:00
Gabe Black
dd53743797 X86: Add scripts to support X86 FS configurations in the regressions. 2011-02-07 01:23:02 -08:00
Gabe Black
f8fc0419c5 X86, Config: Move the setting of work count options to a separate function.
This way things that don't care about work count options and/or aren't called
by something that has those command line options set up doesn't have to build
a fake object to carry in inert values.
2011-02-07 01:22:15 -08:00
Gabe Black
0c4b816d84 X86: Fix compiling vtophys.cc 2011-02-07 01:21:21 -08:00
Brad Beckmann
45f881919f regress: Regression Tester output updates 2011-02-06 22:14:23 -08:00
Brad Beckmann
f5aa75fdc5 ruby: support to stallAndWait the mandatory queue
By stalling and waiting the mandatory queue instead of recycling it, one can
ensure that no incoming messages are starved when the mandatory queue puts
signficant of pressure on the L1 cache controller (i.e. the ruby memtester).

--HG--
rename : src/mem/slicc/ast/WakeUpDependentsStatementAST.py => src/mem/slicc/ast/WakeUpAllDependentsStatementAST.py
2011-02-06 22:14:19 -08:00
Brad Beckmann
194a137498 ruby: minor fix to deadlock panic message 2011-02-06 22:14:19 -08:00
Brad Beckmann
3a388aff69 boot: script that creates a checkpoint after Linux boot up 2011-02-06 22:14:19 -08:00
Joel Hestness
ebe563e531 garnet: Split network power in ruby.stats
Split out dynamic and static power numbers for printing to ruby.stats
2011-02-06 22:14:19 -08:00
Brad Beckmann
5c2f4937b3 MOESI_hammer: fixed dir bug counting received acks 2011-02-06 22:14:19 -08:00
Brad Beckmann
7edab47448 ruby: numa bit fix for sparse memory 2011-02-06 22:14:19 -08:00
Tushar Krishna
4fa690e8ff MOESI_CMP_token: removed unused message fields 2011-02-06 22:14:19 -08:00
Brad Beckmann
273e3d4924 mem: Added support for Null data packet
The packet now identifies whether static or dynamic data has been allocated and
is used by Ruby to determine whehter to copy the data pointer into the ruby
request.  Subsequently, Ruby can be told not to update phys memory when
receiving packets.
2011-02-06 22:14:19 -08:00
Brad Beckmann
dfa8cbeb06 m5: added work completed monitoring support 2011-02-06 22:14:19 -08:00
Brad Beckmann
c41fc138e7 dev: fixed bugs to extend interrupt capability beyond 15 cores 2011-02-06 22:14:18 -08:00
Joel Hestness
3a2d2223e1 x86: Timing support for pagetable walker
Move page table walker state to its own object type, and make the
walker instantiate state for each outstanding walk. By storing the
states in a queue, the walker is able to handle multiple outstanding
timing requests. Note that functional walks use separate state
elements.
2011-02-06 22:14:18 -08:00
Joel Hestness
52b6119228 TimingSimpleCPU: split data sender state fix
In sendSplitData, keep a pointer to the senderState that may be updated after
the call to handle*Packet. This way, if the receiver updates the packet
senderState, it can still be accessed in sendSplitData.
2011-02-06 22:14:18 -08:00
Brad Beckmann
2da54d1285 ruby: Fix RubyPort to properly handle retrys 2011-02-06 22:14:18 -08:00
Joel Hestness
dedb4fbf05 Ruby: Fix to return cache block size to CPU for split data transfers 2011-02-06 22:14:18 -08:00
Joel Hestness
82844618fd Ruby: Add support for locked memory accesses in X86_FS 2011-02-06 22:14:18 -08:00
Joel Hestness
16c1edebd0 Ruby: Update the Ruby request type names for LL/SC 2011-02-06 22:14:18 -08:00
Brad Beckmann
9782ca5def ruby: Assert for x86 misaligned access
This patch ensures only aligned access are passed to ruby and includes a fix
to the DPRINTF address print.
2011-02-06 22:14:18 -08:00
Brad Beckmann
17b4ef52bb ruby: x86 fs config support 2011-02-06 22:14:18 -08:00
Brad Beckmann
1b54344aeb MOESI_hammer: Added full-bit directory support 2011-02-06 22:14:18 -08:00
Joel Hestness
62e05ed78a x86: Add checkpointing capability to devices
Add checkpointing capability to the Intel 8254 timer, CMOS, I8042,
PS2 Keyboard and Mouse, I82094AA, I8237, I8254, I8259, and speaker
devices
2011-02-06 22:14:18 -08:00
Joel Hestness
911ccef6c0 x86: Add checkpointing capability to arch components
Add checkpointing capability to the x86 interrupt device and the TLBs
2011-02-06 22:14:17 -08:00
Joel Hestness
38140b5519 x86: implements vtophys
Calls walker to look up virt. to phys. page mapping
2011-02-06 22:14:17 -08:00
Joel Hestness
eea78f968b IntDev: packet latency fix
The x86 local apic now includes a separate latency parameter for interrupts.
2011-02-06 22:14:17 -08:00
Joel Hestness
d9f0a8288e MessagePort: implement the virtual recvTiming function to avoid double pkt delete
Double packet delete problem is due to an interrupt device deleting a packet that the SimpleTimingPort also deletes. Since MessagePort descends from SimpleTimingPort, simply reimplement the failing code from SimpleTimingPort: recvTiming.
2011-02-06 22:14:17 -08:00
Joel Hestness
02b05bf9be MOESI_hammer: trigge queue fix. 2011-02-06 22:14:17 -08:00
Joel Hestness
b4c10bd680 mcpat: Adds McPAT performance counters
Updated patches from Rick Strong's set that modify performance counters for
McPAT
2011-02-06 22:14:17 -08:00
Tushar Krishna
a679e732ce garnet: added orion2.0 for network power calculation 2011-02-06 22:14:17 -08:00
Tushar Krishna
59163f824c garnet: separate data and ctrl VCs
Separate data VCs and ctrl VCs in garnet, as ctrl VCs have 1 buffer per VC,
while data VCs have > 1 buffers per VC. This is for correct power estimations.
2011-02-06 22:14:16 -08:00