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X86: Read the LDT/GDT at CPL0 when executing an iret.

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During iret access LDT/GDT at CPL0 rather than after transition to user mode
(if I'm reading the Intel IA-64 architecture spec correctly, the contents of
the descriptor table are read before the CPL is updated).
This commit is contained in:
Tim Harris 2011-02-07 15:05:28 -08:00
parent 10b4b364d9
commit 5810ab121c
1 changed files with 4 additions and 4 deletions
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8
src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
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@ -102,10 +102,10 @@ protToVirtFallThrough:
andi t6, t2, 0xF8, dataSize=8
andi t0, t2, 0x4, flags=(EZF,), dataSize=2
br label("globalCSDescriptor"), flags=(CEZF,)
ld t8, tsl, [1, t0, t6], dataSize=8
ld t8, tsl, [1, t0, t6], dataSize=8, atCPL0=True
br label("processCSDescriptor")
globalCSDescriptor:
ld t8, tsg, [1, t0, t6], dataSize=8
ld t8, tsg, [1, t0, t6], dataSize=8, atCPL0=True
processCSDescriptor:
chks t2, t6, dataSize=8
@ -159,10 +159,10 @@ doPopStackStuff:
andi t7, t9, 0xF8, dataSize=8
andi t0, t9, 0x4, flags=(EZF,), dataSize=2
br label("globalSSDescriptor"), flags=(CEZF,)
ld t7, tsl, [1, t0, t7], dataSize=8
ld t7, tsl, [1, t0, t7], dataSize=8, atCPL0=True
br label("processSSDescriptor")
globalSSDescriptor:
ld t7, tsg, [1, t0, t7], dataSize=8
ld t7, tsg, [1, t0, t7], dataSize=8, atCPL0=True
processSSDescriptor:
chks t9, t7, dataSize=8