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Author SHA1 Message Date
Gabe Black
07a4e2cd36 Use the setSyscallReturn defined in arch rather than duplicating it here. 
--HG--
extra : convert_revision : 862ece59aa253b52b6744a0a76738d5ee19561b3
 2006-12-06 11:38:39 -05:00
Gabe Black
ef942ceecb Moved the RegIdx arrays to the base dyninst. 
--HG--
extra : convert_revision : d705cde25c2cf1add20669e99d086add49141518
 2006-12-06 11:37:39 -05:00
Gabe Black
6826ee53db Got rid of some typedefs, moved the tlbs to the base o3 cpu, and called the architecture defined setSyscallReturn function instead of a duplicate copy. 
src/cpu/o3/alpha/cpu.hh:
    Got rid of some typedefs, and moved the tlbs to the base o3 cpu.
src/cpu/o3/alpha/thread_context.hh:
src/cpu/o3/cpu.cc:
    Moved the tlbs to the base o3 cpu.

--HG--
extra : convert_revision : 1805613aa230b8974a226ee3d2584c85f7a578aa
 2006-12-06 11:36:40 -05:00
Gabe Black
0ed6c52c1e Made the alpha setSyscallReturn take a ThreadContext pointer instead of a RegFile *. 
--HG--
extra : convert_revision : 021a1fe6760df1daf6299d46060371a5310f008a
 2006-12-06 11:33:37 -05:00
Gabe Black
b3cfa6ec42 Added a flattenIntIndex function for Alpha. 
--HG--
extra : convert_revision : 5ed79ed18e443118a28d6890327c55a6a3fcd325
 2006-12-06 11:30:41 -05:00
Gabe Black
2dcf00bc8b Merge zizzer:/bk/newmem 
into  zower.eecs.umich.edu:/eecshome/m5/newmem

src/cpu/o3/commit_impl.hh:
    Hand Merge

--HG--
extra : convert_revision : 6984db90d5b5ec71c31f1c345f5a77eed540059e
 2006-12-06 06:05:28 -05:00
Gabe Black
be29adf51c Added a DPRINTF to print out the actual value pulled from memory. 
--HG--
extra : convert_revision : 18780f753a7e98f8de3047dd6781b944b0826b4e
 2006-12-06 06:02:13 -05:00
Gabe Black
75b93179ab Flattening and syscallReturn fixes 
src/cpu/o3/thread_context_impl.hh:
    Use flattened indices
src/cpu/simple_thread.hh:
    Use flattened indices, and pass a thread context to setSyscallReturn rather than a register file.
src/cpu/thread_context.hh:
    The SyscallReturn class is no longer in arch/syscallreturn.hh

--HG--
extra : convert_revision : ed84bb8ac5ef0774526ecd0d7270b0c60cd3708e
 2006-12-06 06:00:04 -05:00
Gabe Black
1886795368 Don't panic, but this needs to be fixed. 
--HG--
extra : convert_revision : 7a4aed238d437dbb2cc5946b3045d53697070a27
 2006-12-06 05:58:07 -05:00
Gabe Black
1d7d7df315 Make syscalls flatten their register indices, and also call into the ISA's setSyscallReturn function rather than having a duplicated one. 
--HG--
extra : convert_revision : 1e83ef629a7fd143f2e35e68abaa56f81d6b9d9e
 2006-12-06 05:56:34 -05:00
Gabe Black
156cf0db51 Change rename to rename the flattened register index instead of the architectural one. 
--HG--
extra : convert_revision : 757866ad7a3c8be7382e1ffa71c60bc00c861f6f
 2006-12-06 05:55:23 -05:00
Gabe Black
6456cb535c Added in endianness conversion on memory accesses as the data goes out. This will break the checker! 
--HG--
extra : convert_revision : b8191cab09ab8f3ced05693293f058382319ed8e
 2006-12-06 05:54:16 -05:00
Gabe Black
20340b5e26 Change how optional delay slot instructions are detected and squashed. 
--HG--
extra : convert_revision : ffd019d4adc2fbbc0a663d8dc6ef73edce12511b
 2006-12-06 05:51:18 -05:00
Gabe Black
8a21635eff Get rid of some typedefs which were hardly used, and move some stuff back here that shouldn't be in the architecture specific DynInst classes. 
--HG--
extra : convert_revision : dad0d7191acf773c16dc3ed9dd911f5e8bfc08b3
 2006-12-06 05:48:59 -05:00
Gabe Black
dc105934f3 Change to use -return_value.value like other implementations. 
--HG--
extra : convert_revision : 513422c1c8c24f3662e6a423d13ee033424aa44b
 2006-12-06 05:47:19 -05:00
Gabe Black
bf5f6c6430 Some changes for misc regs which were changed into unofficial integer registers, and moved the flattenIndex function into the register file. 
--HG--
extra : convert_revision : 6b797c793a6c12c61a23f0f78a1ea1c88609553e
 2006-12-06 05:46:44 -05:00
Gabe Black
5ad1731a12 Reorganize the includes and add an include for misc.hh. 
--HG--
extra : convert_revision : 484b2d07a1e8b3879c35d80bf16b73fd0cc9be1f
 2006-12-06 05:45:18 -05:00
Gabe Black
643cb6dd81 Added some debug output, and made sure not to accidentally ask for the result of a store conditional. 
--HG--
extra : convert_revision : d36ff9e2343fdf78a3bc16a1348975fdba5c55e2
 2006-12-06 05:44:31 -05:00
Gabe Black
a36a59e8d7 Some basic fix ups, and CWP is no longer set explicitly. 
--HG--
extra : convert_revision : 1dde5594a2bcfd9fb5ad974360b3dc035f1624e5
 2006-12-06 05:43:25 -05:00
Gabe Black
c541be3a48 Changed the integer register file to work with flattened indices. 
--HG--
extra : convert_revision : c5153c3c712e5d18b5233e1fd205806adcb30654
 2006-12-06 05:42:09 -05:00
Gabe Black
4d8a0541dd Change MIPS's setSyscallReturn to use a thread context. 
--HG--
extra : convert_revision : 618f8404ec5380615e28170d761b2fcdf9c07d96
 2006-12-06 05:41:08 -05:00
Gabe Black
a3f351ab59 Added basic flatten function for mips. 
--HG--
extra : convert_revision : 2c32851584001734d139f36c4d58c5e61067fcfc
 2006-12-06 05:40:11 -05:00
Kevin Lim
54a946604b Override default SConscript options and only build the SimpleCPUs. 
--HG--
extra : convert_revision : cfcfb787d8442cb76ed766aa5bc947636f067209
 2006-12-05 11:12:18 -05:00
Gabe Black
12c5bd2305 Move the SyscallReturn class into sim/syscallreturn.hh. Also move some miscregs into the integer register file so they get renamed. 
src/arch/alpha/syscallreturn.hh:
src/arch/mips/syscallreturn.hh:
src/sim/syscallreturn.hh:
    Move the SyscallReturn class into sim/syscallreturn.hh
src/arch/sparc/faults.cc:
src/arch/sparc/isa/operands.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/miscregfile.cc:
src/arch/sparc/miscregfile.hh:
src/arch/sparc/process.cc:
src/arch/sparc/sparc_traits.hh:
    Move some miscregs into the integer register file so they get renamed.

--HG--
extra : convert_revision : df5b94fa1e7fdca34816084e0a423d6fdf86c79b
 2006-12-05 01:55:02 -05:00
Steve Reinhardt
6c1b311faf Merge zizzer.eecs.umich.edu:/bk/newmem 
into  vm1.(none):/home/stever/bk/newmem-head

--HG--
extra : convert_revision : df2b33a629ae4298c4da33383b491e3cbefab92d
 2006-12-04 16:10:50 -08:00
Steve Reinhardt
9d39407500 Update SPEC CPU2000 tests with actual benchmark output. 
tests/long/00.gzip/ref/alpha/linux/o3-timing/config.ini:
tests/long/00.gzip/ref/alpha/linux/o3-timing/config.out:
tests/long/00.gzip/ref/alpha/linux/o3-timing/m5stats.txt:
tests/long/00.gzip/ref/alpha/linux/o3-timing/stderr:
tests/long/00.gzip/ref/alpha/linux/o3-timing/stdout:
tests/long/00.gzip/ref/alpha/linux/simple-atomic/config.ini:
tests/long/00.gzip/ref/alpha/linux/simple-atomic/config.out:
tests/long/00.gzip/ref/alpha/linux/simple-atomic/m5stats.txt:
tests/long/00.gzip/ref/alpha/linux/simple-atomic/stderr:
tests/long/00.gzip/ref/alpha/linux/simple-atomic/stdout:
tests/long/00.gzip/ref/alpha/linux/simple-timing/config.ini:
tests/long/00.gzip/ref/alpha/linux/simple-timing/config.out:
tests/long/00.gzip/ref/alpha/linux/simple-timing/m5stats.txt:
tests/long/00.gzip/ref/alpha/linux/simple-timing/stderr:
tests/long/00.gzip/ref/alpha/linux/simple-timing/stdout:
tests/long/30.eon/ref/alpha/linux/simple-atomic/config.ini:
tests/long/30.eon/ref/alpha/linux/simple-atomic/config.out:
tests/long/30.eon/ref/alpha/linux/simple-atomic/m5stats.txt:
tests/long/30.eon/ref/alpha/linux/simple-atomic/stderr:
tests/long/30.eon/ref/alpha/linux/simple-atomic/stdout:
tests/long/30.eon/ref/alpha/linux/simple-timing/config.ini:
tests/long/30.eon/ref/alpha/linux/simple-timing/config.out:
tests/long/30.eon/ref/alpha/linux/simple-timing/m5stats.txt:
tests/long/30.eon/ref/alpha/linux/simple-timing/stderr:
tests/long/30.eon/ref/alpha/linux/simple-timing/stdout:
tests/long/40.perlbmk/ref/alpha/linux/simple-atomic/config.ini:
tests/long/40.perlbmk/ref/alpha/linux/simple-atomic/config.out:
tests/long/40.perlbmk/ref/alpha/linux/simple-atomic/m5stats.txt:
tests/long/40.perlbmk/ref/alpha/linux/simple-atomic/stderr:
tests/long/40.perlbmk/ref/alpha/linux/simple-atomic/stdout:
tests/long/40.perlbmk/ref/alpha/linux/simple-timing/config.ini:
tests/long/40.perlbmk/ref/alpha/linux/simple-timing/config.out:
tests/long/40.perlbmk/ref/alpha/linux/simple-timing/m5stats.txt:
tests/long/40.perlbmk/ref/alpha/linux/simple-timing/stderr:
tests/long/40.perlbmk/ref/alpha/linux/simple-timing/stdout:
tests/long/50.vortex/ref/alpha/linux/o3-timing/config.ini:
tests/long/50.vortex/ref/alpha/linux/o3-timing/config.out:
tests/long/50.vortex/ref/alpha/linux/o3-timing/m5stats.txt:
tests/long/50.vortex/ref/alpha/linux/o3-timing/stderr:
tests/long/50.vortex/ref/alpha/linux/o3-timing/stdout:
tests/long/50.vortex/ref/alpha/linux/simple-atomic/config.ini:
tests/long/50.vortex/ref/alpha/linux/simple-atomic/config.out:
tests/long/50.vortex/ref/alpha/linux/simple-atomic/m5stats.txt:
tests/long/50.vortex/ref/alpha/linux/simple-atomic/stderr:
tests/long/50.vortex/ref/alpha/linux/simple-atomic/stdout:
tests/long/50.vortex/ref/alpha/linux/simple-timing/config.ini:
tests/long/50.vortex/ref/alpha/linux/simple-timing/config.out:
tests/long/50.vortex/ref/alpha/linux/simple-timing/m5stats.txt:
tests/long/50.vortex/ref/alpha/linux/simple-timing/stderr:
tests/long/50.vortex/ref/alpha/linux/simple-timing/stdout:
tests/long/60.bzip2/ref/alpha/linux/o3-timing/config.ini:
tests/long/60.bzip2/ref/alpha/linux/o3-timing/config.out:
tests/long/60.bzip2/ref/alpha/linux/o3-timing/m5stats.txt:
tests/long/60.bzip2/ref/alpha/linux/o3-timing/stderr:
tests/long/60.bzip2/ref/alpha/linux/o3-timing/stdout:
tests/long/60.bzip2/ref/alpha/linux/simple-atomic/config.ini:
tests/long/60.bzip2/ref/alpha/linux/simple-atomic/config.out:
tests/long/60.bzip2/ref/alpha/linux/simple-atomic/m5stats.txt:
tests/long/60.bzip2/ref/alpha/linux/simple-atomic/stderr:
tests/long/60.bzip2/ref/alpha/linux/simple-atomic/stdout:
tests/long/60.bzip2/ref/alpha/linux/simple-timing/config.ini:
tests/long/60.bzip2/ref/alpha/linux/simple-timing/config.out:
tests/long/60.bzip2/ref/alpha/linux/simple-timing/m5stats.txt:
tests/long/60.bzip2/ref/alpha/linux/simple-timing/stderr:
tests/long/60.bzip2/ref/alpha/linux/simple-timing/stdout:
tests/long/70.twolf/ref/alpha/linux/o3-timing/config.ini:
tests/long/70.twolf/ref/alpha/linux/o3-timing/config.out:
tests/long/70.twolf/ref/alpha/linux/o3-timing/m5stats.txt:
tests/long/70.twolf/ref/alpha/linux/o3-timing/stderr:
tests/long/70.twolf/ref/alpha/linux/o3-timing/stdout:
tests/long/70.twolf/ref/alpha/linux/simple-atomic/config.ini:
tests/long/70.twolf/ref/alpha/linux/simple-atomic/config.out:
tests/long/70.twolf/ref/alpha/linux/simple-atomic/m5stats.txt:
tests/long/70.twolf/ref/alpha/linux/simple-atomic/stderr:
tests/long/70.twolf/ref/alpha/linux/simple-atomic/stdout:
tests/long/70.twolf/ref/alpha/linux/simple-timing/config.ini:
tests/long/70.twolf/ref/alpha/linux/simple-timing/config.out:
tests/long/70.twolf/ref/alpha/linux/simple-timing/m5stats.txt:
tests/long/70.twolf/ref/alpha/linux/simple-timing/stderr:
tests/long/70.twolf/ref/alpha/linux/simple-timing/stdout:
    Update with actual benchmark output.

--HG--
extra : convert_revision : 12e8de58172dd717d9cc8c5c27dd926a7257153c
 2006-12-04 19:07:00 -05:00
Steve Reinhardt
34a1f9e14e Only update stderr, stdout, m5stats.txt, and config.* on update_ref, 
since we don't know which of the other files are outputs and which
are inputs.

--HG--
extra : convert_revision : b038bd15930721ab9fceb0a18ab5c895aacb5309
 2006-12-04 19:05:09 -05:00
Steve Reinhardt
66a9697c49 Clean up SPEC CPU2000 reference files. 
Get rid of reference files for o3-atomic (non-existent configuration)
and mcf (doesn't seem to be working).
Left in empty refs for parser/simple-timing... this appears to be
dying because it's running out of memory, so maybe it will be OK
once we get the memory leak fixed.

--HG--
extra : convert_revision : ae3bc8dfec44d09a2a084da5041ec386fe16be8b
 2006-12-04 18:57:17 -05:00
Steve Reinhardt
1431d1f9c2 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  vm1.(none):/home/stever/bk/newmem-head

--HG--
extra : convert_revision : 4a077b463b938c54b546b00e586d8609c24ae465
 2006-12-02 22:12:26 -08:00
Steve Reinhardt
711dc47e8c Delete src/oldmem. 
util/make_release.py:
    src/oldmem gone from repo, no need to delete here.

--HG--
extra : convert_revision : 570fa1b8d7144376cf13a010160a39d1c1cccbc2
 2006-12-03 01:11:24 -05:00
Steve Reinhardt
d3e888ff90 Merge zizzer.eecs.umich.edu:/bk/newmem 
into  vm1.(none):/home/stever/bk/newmem-head

--HG--
extra : convert_revision : 4c8de6e4c6f729c83e92abd81ea6c1347e647756
 2006-12-02 19:52:26 -08:00
Kevin Lim
c0f21b09c8 Fixes for MIPS_SE compiling. Regressions seem to work, but Korey should make sure these changes (commit especially) work okay. 
src/cpu/o3/commit_impl.hh:
src/cpu/o3/fetch_impl.hh:
    Fixes for MIPS_SE compile.

--HG--
extra : convert_revision : fde9616f8e72b397c5ca965774172372cff53790
 2006-12-02 13:33:46 -05:00
Lisa Hsu
dc9438b157 stats update 
--HG--
extra : convert_revision : b47d3817d204a43e0afb89aafc8dacf619c3f910
 2006-12-02 11:11:58 -05:00
Nathan Binkert
5d637417a8 don't blow away the whole destination directory 
--HG--
extra : convert_revision : 7370bad15cc30e75ebb0c8685324d8db06fc2936
 2006-12-01 22:33:18 -08:00
Lisa Hsu
ed50763135 change this to be a quick one so that it's in the regressions every night - it's only maybe 15 min. long. 
tests/configs/twosys-tsunami-simple-atomic.py:
    don't need this import

--HG--
rename : tests/long/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini
rename : tests/long/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out
rename : tests/long/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.drivesys.sim_console => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.drivesys.sim_console
rename : tests/long/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.testsys.sim_console => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/console.testsys.sim_console
rename : tests/long/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/m5stats.txt => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/m5stats.txt
rename : tests/long/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stderr => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stderr
rename : tests/long/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout
rename : tests/long/80.netperf-stream/test.py => tests/quick/80.netperf-stream/test.py
extra : convert_revision : 68497b2ef8b21590cb6c636485703e46dc616513
 2006-12-01 13:51:49 -05:00
Lisa Hsu
66832866be Merge zizzer:/bk/newmem 
into  zed.eecs.umich.edu:/z/hsul/work/m5/newmem

--HG--
extra : convert_revision : b62ca8009105aad7173bdbc5d528de243d21a82c
 2006-12-01 01:24:16 -05:00
Lisa Hsu
161b8d1a23 add a simple netperf-stream test to the long tests. 
tests/SConscript:
    add a new configuration for two-system tests (atomic simple only)

--HG--
extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
 2006-12-01 01:24:01 -05:00
Nathan Binkert
472073baaf Merge zizzer.eecs.umich.edu:/bk/newmem 
into  iceaxe.:/Volumes/work/m5/incoming

--HG--
extra : convert_revision : 05060a06e0b6d66a9c1e7005c233047c6e8ba15f
 2006-11-30 20:53:30 -08:00
Nathan Binkert
6e885ec9ba Get rid of the old release-edits script and create make_release.py 
which takes care of almost everything needed for putting together
a release.

--HG--
extra : convert_revision : b05d418a1002633b1286591eb8a8588ba33f5df1
 2006-11-30 20:50:47 -08:00
Ron Dreslinski
e38e893016 Update stats to match writeback fix that was made 
--HG--
extra : convert_revision : 3e0ed2b374d8d96798ea9b3416c9e5579cafacda
 2006-11-30 15:01:49 -05:00
Lisa Hsu
df6c12e716 netperf-maerts-client.rcS: 
change /netperf/netperf to /netperf-bin/netperf
nat-netperf-maerts-client.rcS:
bad comment that went with the file - accidentally committed but probably doesn't matter, i ust eliminated an ivlb in the script.

configs/boot/nat-netperf-maerts-client.rcS:
    replace netperf/netperf with netperf-bin/netperf
configs/boot/netperf-maerts-client.rcS:
    change /netperf/netperf to /netperf-bin/netperf

--HG--
extra : convert_revision : 32fed0042e267f315d3e688ebc4b66d7002b85f0
 2006-11-30 11:53:33 -05:00
Steve Reinhardt
d2a71f6b2a cscope-find.py: 
Write directly to 'cscope.files' and run 'cscope -b' .
Now this script does everything automatically.
cscope-index.py:
Rename: util/cscope-find.py -> util/cscope-index.py

util/cscope-find.py:
    Write directly to 'cscope.files' and run 'cscope -b' .
    Now this script does everything automatically.

--HG--
rename : util/cscope-find.py => util/cscope-index.py
extra : convert_revision : cd6fa5cc0c2146f7184c9213956aff67c7cb9341
 2006-11-29 13:17:41 -08:00
Kevin Lim
ec3dacc664 Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/test-regress

--HG--
extra : convert_revision : 3142f68356458ecd2677c30e9cf0a65005b782c2
 2006-11-29 16:08:19 -05:00
Kevin Lim
c96160cef5 Change the connecting of the physPort and virtPort to the memory object below the CPU to happen every time activateContext is called. The overhead is probably a little higher than necessary, but allows these connections to properly be made when there are CPUs that are inactive until they are switched in. 
Right now this introduces a minor memory leak as old physPorts and virtPorts are not deleted when new ones are created.  A flyspray task has been created for this issue.  It can not be resolved until we determine how the bus will handle giving out ID's to functional ports that may be deleted.

src/cpu/o3/cpu.cc:
src/cpu/simple/atomic.cc:
src/cpu/simple/timing.cc:
    Change the setup of the physPort and virtPort to instead happen every time the CPU has a context activated.  This is a little high overhead, but keeps it working correctly when the CPU does not have a physical memory attached to it until it switches in (like the case of switch CPUs).
src/cpu/o3/thread_context.hh:
    Change function from being called at init() to just being called whenever the memory ports need to be connected.
src/cpu/o3/thread_context_impl.hh:
    Update this to not delete the port if it's the same as the virtPort.
src/cpu/thread_context.hh:
    Change function from being called at init() to whenever the memory ports need to be connected.
src/cpu/thread_state.cc:
    Instead of initializing the ports, simply connect them, deleting any old ports that might exist.  This allows these functions to be called multiple times.
src/cpu/thread_state.hh:
    Ports are no longer initialized, but rather connected at context activation time.

--HG--
extra : convert_revision : e399ce5dfbd6ad658c953a7c9c7b69b89a70219e
 2006-11-29 16:07:55 -05:00
Kevin Lim
610064c98a Add in O3CPU to default CPU list. 
--HG--
extra : convert_revision : 4aaaae058cb763580ea0b9019d4a9346938121d4
 2006-11-29 11:50:03 -05:00
Ali Saidi
ed78fc257b add 2.0b2 release notes 
--HG--
extra : convert_revision : ce34f8086f682cc732bf868f6b9700e42c604ca3
 2006-11-28 16:02:13 -05:00
Kevin Lim
4fb38e892f Merge ktlim@zizzer:/bk/newmem 
into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/test-regress

--HG--
extra : convert_revision : ffc7931d7da153b421b3c838a0968e484fd182ec
 2006-11-28 11:41:17 -05:00
Kevin Lim
2b5fdf6033 Remove assertion. It's not needed and messes up writebacks when a 2 level cache is used in a uniprocessor setting. 
--HG--
extra : convert_revision : 020a9799cd7177fdb85a767701d6fcb8cf018827
 2006-11-28 11:41:08 -05:00
Steve Reinhardt
6bbb86dfa9 Add TRACING_ON setting for m5.prof. 
--HG--
extra : convert_revision : ebda49bff30d76d3209acce55458d3f4e29594d3
 2006-11-27 02:16:24 -05:00
Kevin Lim
07e525e8b7 Include check for making sure caches are enabled. 
--HG--
extra : convert_revision : e3902b065db524ebe5bf762e44a840133ccb8d75
 2006-11-26 11:46:58 -05:00