Remove assertion. It's not needed and messes up writebacks when a 2 level cache is used in a uniprocessor setting.

--HG--
extra : convert_revision : 020a9799cd7177fdb85a767701d6fcb8cf018827

src/mem/cache/coherence/uni_coherence.cc

@@ -94,10 +94,6 @@ UniCoherence::handleBusRequest(PacketPtr &pkt, CacheBlk *blk, MSHR *mshr,
 bool
 UniCoherence::propogateInvalidate(PacketPtr pkt, bool isTiming)
 {
-    //Make sure we don't snoop a write
-    //we are expecting writeInvalidates on the snoop port of a uni-coherent cache
-    assert(!(!pkt->isInvalidate() && pkt->isWrite()));
-
     if (pkt->isInvalidate()) {
 /*  Temp Fix for now, forward all invalidates up as functional accesses */
         if (isTiming) {