2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
|
================ Begin RubySystem Configuration Print ================
|
|
|
|
|
|
|
|
|
|
RubySystem config:
|
|
|
|
|
random_seed: 1234
|
|
|
|
|
randomization: 1
|
|
|
|
|
cycle_period: 1
|
|
|
|
|
block_size_bytes: 64
|
|
|
|
|
block_size_bits: 6
|
|
|
|
|
memory_size_bytes: 134217728
|
|
|
|
|
memory_size_bits: 27
|
|
|
|
|
|
|
|
|
|
Network Configuration
|
|
|
|
|
---------------------
|
|
|
|
|
network: SIMPLE_NETWORK
|
2011-02-09 03:07:54 +01:00
|
|
|
topology:
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2010-03-22 05:22:22 +01:00
|
|
|
virtual_net_0: active, ordered
|
|
|
|
|
virtual_net_1: active, ordered
|
2010-01-30 05:29:40 +01:00
|
|
|
virtual_net_2: active, unordered
|
|
|
|
|
virtual_net_3: active, unordered
|
2010-03-22 05:22:22 +01:00
|
|
|
virtual_net_4: active, unordered
|
|
|
|
|
virtual_net_5: active, unordered
|
2010-01-30 05:29:40 +01:00
|
|
|
virtual_net_6: inactive
|
|
|
|
|
virtual_net_7: inactive
|
|
|
|
|
virtual_net_8: inactive
|
|
|
|
|
virtual_net_9: inactive
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Profiler Configuration
|
|
|
|
|
----------------------
|
|
|
|
|
periodic_stats_period: 1000000
|
|
|
|
|
|
|
|
|
|
================ End RubySystem Configuration Print ================
|
|
|
|
|
|
|
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
Real time: Dec/01/2011 11:03:43
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
|
Profiler Stats
|
|
|
|
|
--------------
|
2011-12-01 20:54:30 +01:00
|
|
|
Elapsed_time_in_seconds: 1
|
|
|
|
|
Elapsed_time_in_minutes: 0.0166667
|
|
|
|
|
Elapsed_time_in_hours: 0.000277778
|
|
|
|
|
Elapsed_time_in_days: 1.15741e-05
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
Virtual_time_in_seconds: 0.46
|
|
|
|
|
Virtual_time_in_minutes: 0.00766667
|
|
|
|
|
Virtual_time_in_hours: 0.000127778
|
|
|
|
|
Virtual_time_in_days: 5.32407e-06
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
Ruby_current_time: 208411
|
2010-01-30 05:29:40 +01:00
|
|
|
Ruby_start_time: 0
|
2011-12-01 20:54:30 +01:00
|
|
|
Ruby_cycles: 208411
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
mbytes_resident: 37.7227
|
|
|
|
|
mbytes_total: 242.977
|
|
|
|
|
resident_ratio: 0.155268
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
ruby_cycles_executed: [ 208412 ]
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
|
Busy Controller Counts:
|
|
|
|
|
L1Cache-0:0
|
|
|
|
|
Directory-0:0
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Busy Bank Count:0
|
|
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
sequencer_requests_outstanding: [binsize: 1 max: 16 count: 956 average: 15.7887 | standard deviation: 1.16133 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 5 75 863 ]
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
|
All Non-Zero Cycle Demand Cache Accesses
|
|
|
|
|
----------------------------------------
|
2011-12-01 20:54:30 +01:00
|
|
|
miss_latency: [binsize: 64 max: 6811 count: 941 average: 3500.81 | standard deviation: 1691.94 | 69 9 9 1 10 4 14 20 8 15 4 7 3 4 5 3 1 3 1 0 2 1 0 0 0 0 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 2 0 1 0 0 1 2 7 1 9 8 8 18 13 21 17 21 28 37 31 37 40 46 28 35 31 30 27 28 32 25 19 20 32 20 12 11 9 7 4 3 5 2 1 1 0 0 1 2 2 0 0 2 0 0 1 0 0 1 1 1 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
|
|
|
|
|
miss_latency_LD: [binsize: 64 max: 6620 count: 49 average: 3597.61 | standard deviation: 1746.75 | 5 1 1 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 1 0 0 1 1 0 3 0 0 4 2 3 3 1 3 1 1 1 2 1 1 0 0 0 1 2 1 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
|
|
|
|
|
miss_latency_ST: [binsize: 64 max: 6811 count: 841 average: 3677.95 | standard deviation: 1562.59 | 61 8 4 0 5 4 3 14 3 9 2 3 1 3 5 2 1 2 0 0 2 1 0 0 0 0 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 2 0 1 0 0 1 2 5 1 9 7 8 18 12 20 17 18 28 37 27 35 37 43 27 32 30 29 26 26 31 24 19 20 32 19 10 10 9 6 2 3 5 1 1 1 0 0 1 2 2 0 0 2 0 0 1 0 0 1 1 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
|
|
|
|
|
miss_latency_IFETCH: [binsize: 8 max: 1159 count: 51 average: 486.745 | standard deviation: 255.245 | 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 0 0 0 1 0 0 0 0 0 0 0 0 0 0 3 1 0 0 1 0 0 0 0 0 0 0 0 3 1 2 2 1 0 1 1 0 0 0 0 2 0 2 2 1 0 0 0 1 0 2 1 1 2 0 0 2 0 0 0 0 0 0 0 1 0 0 1 1 1 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 ]
|
|
|
|
|
miss_latency_L1Cache: [binsize: 1 max: 116 count: 70 average: 16.2571 | standard deviation: 35.3332 | 0 9 16 14 22 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 1 0 0 0 1 0 1 ]
|
|
|
|
|
miss_latency_L2Cache: [binsize: 32 max: 4640 count: 34 average: 2534.59 | standard deviation: 1878.68 | 8 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 1 0 1 0 2 0 0 0 0 0 1 0 1 0 1 1 1 1 0 1 0 0 0 0 0 0 1 1 2 0 0 0 1 0 1 ]
|
|
|
|
|
miss_latency_Directory: [binsize: 64 max: 6811 count: 837 average: 3831.48 | standard deviation: 1383.91 | 0 0 9 1 9 4 14 19 7 15 4 7 2 4 4 3 1 3 1 0 2 1 0 0 0 0 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 2 0 1 0 0 0 2 6 1 8 8 8 16 12 19 17 21 27 36 30 35 39 45 28 35 30 27 27 27 31 25 19 20 32 20 12 11 9 7 4 3 5 2 1 1 0 0 1 2 2 0 0 2 0 0 1 0 0 1 1 1 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
|
2010-08-21 02:44:26 +02:00
|
|
|
miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
imcomplete_wCC_Times: 0
|
|
|
|
|
miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
2011-12-01 20:54:30 +01:00
|
|
|
imcomplete_dir_Times: 837
|
|
|
|
|
miss_latency_LD_L1Cache: [binsize: 1 max: 104 count: 6 average: 19.8333 | standard deviation: 41.248 | 0 1 0 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
|
|
|
|
|
miss_latency_LD_Directory: [binsize: 64 max: 6620 count: 43 average: 4096.84 | standard deviation: 1184.49 | 0 0 1 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 1 0 0 1 1 0 3 0 0 4 2 3 3 1 3 1 1 1 2 1 1 0 0 0 1 2 1 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
|
|
|
|
|
miss_latency_ST_L1Cache: [binsize: 1 max: 116 count: 64 average: 15.9219 | standard deviation: 35.0852 | 0 8 16 12 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 1 0 0 1 0 0 0 1 0 1 ]
|
|
|
|
|
miss_latency_ST_L2Cache: [binsize: 32 max: 4640 count: 31 average: 2779.26 | standard deviation: 1783.63 | 5 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 1 0 1 0 2 0 0 0 0 0 1 0 1 0 1 1 1 1 0 1 0 0 0 0 0 0 1 1 2 0 0 0 1 0 1 ]
|
|
|
|
|
miss_latency_ST_Directory: [binsize: 64 max: 6811 count: 746 average: 4029.46 | standard deviation: 1146.93 | 0 0 4 0 4 4 3 13 2 9 2 3 0 3 4 2 1 2 0 0 2 1 0 0 0 0 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 2 0 1 0 0 0 2 4 1 8 7 8 16 11 18 17 18 27 36 26 33 36 42 27 32 29 26 26 25 30 24 19 20 32 19 10 10 9 6 2 3 5 1 1 1 0 0 1 2 2 0 0 2 0 0 1 0 0 1 1 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
|
|
|
|
|
miss_latency_IFETCH_L2Cache: [binsize: 1 max: 9 count: 3 average: 6.33333 | standard deviation: 3.08221 | 0 0 0 1 0 0 0 1 0 1 ]
|
|
|
|
|
miss_latency_IFETCH_Directory: [binsize: 8 max: 1159 count: 48 average: 516.771 | standard deviation: 231.637 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 0 0 0 1 0 0 0 0 0 0 0 0 0 0 3 1 0 0 1 0 0 0 0 0 0 0 0 3 1 2 2 1 0 1 1 0 0 0 0 2 0 2 2 1 0 0 0 1 0 2 1 1 2 0 0 2 0 0 0 0 0 0 0 1 0 0 1 1 1 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 ]
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
|
All Non-Zero Cycle SW Prefetch Requests
|
|
|
|
|
------------------------------------
|
|
|
|
|
prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
Request vs. RubySystem State Profile
|
|
|
|
|
--------------------------------
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
|
|
|
|
|
Message Delayed Cycles
|
|
|
|
|
----------------------
|
|
|
|
|
Total_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
|
|
|
|
|
|
|
|
|
|
Resource Usage
|
|
|
|
|
--------------
|
|
|
|
|
page_size: 4096
|
|
|
|
|
user_time: 0
|
|
|
|
|
system_time: 0
|
2011-12-01 20:54:30 +01:00
|
|
|
page_reclaims: 10661
|
2011-02-09 03:07:54 +01:00
|
|
|
page_faults: 0
|
2010-01-30 05:29:40 +01:00
|
|
|
swaps: 0
|
2011-02-08 04:23:11 +01:00
|
|
|
block_inputs: 0
|
2011-04-29 02:18:16 +02:00
|
|
|
block_outputs: 0
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
|
Network Stats
|
|
|
|
|
-------------
|
|
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
total_msg_count_Request_Control: 2511 20088
|
|
|
|
|
total_msg_count_Response_Data: 2511 180792
|
|
|
|
|
total_msg_count_Writeback_Data: 2248 161856
|
|
|
|
|
total_msg_count_Writeback_Control: 5220 41760
|
|
|
|
|
total_msg_count_Unblock_Control: 2506 20048
|
|
|
|
|
total_msgs: 14996 total_bytes: 424544
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2010-01-30 05:29:40 +01:00
|
|
|
switch_0_inlinks: 2
|
|
|
|
|
switch_0_outlinks: 2
|
2011-12-01 20:54:30 +01:00
|
|
|
links_utilized_percent_switch_0: 2.12273
|
|
|
|
|
links_utilized_percent_switch_0_link_0: 2.00637 bw: 16000 base_latency: 1
|
|
|
|
|
links_utilized_percent_switch_0_link_1: 2.23909 bw: 16000 base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
outgoing_messages_switch_0_link_0_Response_Data: 837 60264 [ 0 0 0 0 837 0 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_0_link_0_Writeback_Control: 830 6640 [ 0 0 0 830 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_0_link_1_Request_Control: 837 6696 [ 0 0 837 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_0_link_1_Writeback_Data: 750 54000 [ 0 0 0 0 0 750 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_0_link_1_Writeback_Control: 910 7280 [ 0 0 830 0 0 80 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_0_link_1_Unblock_Control: 836 6688 [ 0 0 0 0 0 836 0 0 0 0 ] base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
|
switch_1_inlinks: 2
|
|
|
|
|
switch_1_outlinks: 2
|
2011-12-01 20:54:30 +01:00
|
|
|
links_utilized_percent_switch_1: 2.12153
|
|
|
|
|
links_utilized_percent_switch_1_link_0: 2.23669 bw: 16000 base_latency: 1
|
|
|
|
|
links_utilized_percent_switch_1_link_1: 2.00637 bw: 16000 base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
outgoing_messages_switch_1_link_0_Request_Control: 837 6696 [ 0 0 837 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_1_link_0_Writeback_Data: 749 53928 [ 0 0 0 0 0 749 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_1_link_0_Writeback_Control: 910 7280 [ 0 0 830 0 0 80 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_1_link_0_Unblock_Control: 835 6680 [ 0 0 0 0 0 835 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_1_link_1_Response_Data: 837 60264 [ 0 0 0 0 837 0 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_1_link_1_Writeback_Control: 830 6640 [ 0 0 0 830 0 0 0 0 0 0 ] base_latency: 1
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
|
switch_2_inlinks: 2
|
|
|
|
|
switch_2_outlinks: 2
|
2011-12-01 20:54:30 +01:00
|
|
|
links_utilized_percent_switch_2: 2.12153
|
|
|
|
|
links_utilized_percent_switch_2_link_0: 2.00637 bw: 16000 base_latency: 1
|
|
|
|
|
links_utilized_percent_switch_2_link_1: 2.23669 bw: 16000 base_latency: 1
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
outgoing_messages_switch_2_link_0_Response_Data: 837 60264 [ 0 0 0 0 837 0 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_2_link_0_Writeback_Control: 830 6640 [ 0 0 0 830 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_2_link_1_Request_Control: 837 6696 [ 0 0 837 0 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_2_link_1_Writeback_Data: 749 53928 [ 0 0 0 0 0 749 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_2_link_1_Writeback_Control: 910 7280 [ 0 0 830 0 0 80 0 0 0 0 ] base_latency: 1
|
|
|
|
|
outgoing_messages_switch_2_link_1_Unblock_Control: 835 6680 [ 0 0 0 0 0 835 0 0 0 0 ] base_latency: 1
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
Cache Stats: system.l1_cntrl0.L1IcacheMemory
|
|
|
|
|
system.l1_cntrl0.L1IcacheMemory_total_misses: 51
|
|
|
|
|
system.l1_cntrl0.L1IcacheMemory_total_demand_misses: 51
|
|
|
|
|
system.l1_cntrl0.L1IcacheMemory_total_prefetches: 0
|
|
|
|
|
system.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0
|
|
|
|
|
system.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
system.l1_cntrl0.L1IcacheMemory_request_type_IFETCH: 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
system.l1_cntrl0.L1IcacheMemory_access_mode_type_Supervisor: 51 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
Cache Stats: system.l1_cntrl0.L1DcacheMemory
|
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_total_misses: 820
|
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 820
|
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
|
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
|
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
system.l1_cntrl0.L1DcacheMemory_request_type_LD: 5.2439%
|
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_request_type_ST: 94.7561%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 820 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
Cache Stats: system.l1_cntrl0.L2cacheMemory
|
2011-12-01 20:54:30 +01:00
|
|
|
system.l1_cntrl0.L2cacheMemory_total_misses: 871
|
|
|
|
|
system.l1_cntrl0.L2cacheMemory_total_demand_misses: 871
|
2010-08-21 02:44:26 +02:00
|
|
|
system.l1_cntrl0.L2cacheMemory_total_prefetches: 0
|
|
|
|
|
system.l1_cntrl0.L2cacheMemory_total_sw_prefetches: 0
|
|
|
|
|
system.l1_cntrl0.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
system.l1_cntrl0.L2cacheMemory_request_type_LD: 4.93685%
|
|
|
|
|
system.l1_cntrl0.L2cacheMemory_request_type_ST: 89.2078%
|
|
|
|
|
system.l1_cntrl0.L2cacheMemory_request_type_IFETCH: 5.85534%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
system.l1_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 871 100%
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
--- L1Cache ---
|
2010-01-30 05:29:40 +01:00
|
|
|
- Event Counts -
|
2011-12-01 20:54:30 +01:00
|
|
|
Load [49 ] 49
|
|
|
|
|
Ifetch [55 ] 55
|
|
|
|
|
Store [863 ] 863
|
|
|
|
|
L2_Replacement [830 ] 830
|
|
|
|
|
L1_to_L2 [15990 ] 15990
|
|
|
|
|
Trigger_L2_to_L1D [31 ] 31
|
|
|
|
|
Trigger_L2_to_L1I [3 ] 3
|
|
|
|
|
Complete_L2_to_L1 [34 ] 34
|
2010-08-21 02:44:26 +02:00
|
|
|
Other_GETX [0 ] 0
|
|
|
|
|
Other_GETS [0 ] 0
|
|
|
|
|
Merged_GETS [0 ] 0
|
|
|
|
|
Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
Invalidate [0 ] 0
|
|
|
|
|
Ack [0 ] 0
|
|
|
|
|
Shared_Ack [0 ] 0
|
|
|
|
|
Data [0 ] 0
|
|
|
|
|
Shared_Data [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
Exclusive_Data [837 ] 837
|
|
|
|
|
Writeback_Ack [830 ] 830
|
2010-08-21 02:44:26 +02:00
|
|
|
Writeback_Nack [0 ] 0
|
|
|
|
|
All_acks [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
All_acks_no_sharers [836 ] 836
|
2011-04-20 03:45:23 +02:00
|
|
|
Flush_line [0 ] 0
|
|
|
|
|
Block_Ack [0 ] 0
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
|
- Transitions -
|
2011-12-01 20:54:30 +01:00
|
|
|
I Load [43 ] 43
|
|
|
|
|
I Ifetch [48 ] 48
|
|
|
|
|
I Store [746 ] 746
|
2010-08-21 02:44:26 +02:00
|
|
|
I L2_Replacement [0 ] 0
|
|
|
|
|
I L1_to_L2 [0 ] 0
|
|
|
|
|
I Trigger_L2_to_L1D [0 ] 0
|
|
|
|
|
I Trigger_L2_to_L1I [0 ] 0
|
|
|
|
|
I Other_GETX [0 ] 0
|
|
|
|
|
I Other_GETS [0 ] 0
|
|
|
|
|
I Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
I NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
I Invalidate [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
I Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
S Load [0 ] 0
|
|
|
|
|
S Ifetch [0 ] 0
|
|
|
|
|
S Store [0 ] 0
|
|
|
|
|
S L2_Replacement [0 ] 0
|
|
|
|
|
S L1_to_L2 [0 ] 0
|
|
|
|
|
S Trigger_L2_to_L1D [0 ] 0
|
|
|
|
|
S Trigger_L2_to_L1I [0 ] 0
|
|
|
|
|
S Other_GETX [0 ] 0
|
|
|
|
|
S Other_GETS [0 ] 0
|
|
|
|
|
S Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
S NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
S Invalidate [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
S Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
O Load [0 ] 0
|
|
|
|
|
O Ifetch [0 ] 0
|
|
|
|
|
O Store [0 ] 0
|
|
|
|
|
O L2_Replacement [0 ] 0
|
|
|
|
|
O L1_to_L2 [0 ] 0
|
|
|
|
|
O Trigger_L2_to_L1D [0 ] 0
|
|
|
|
|
O Trigger_L2_to_L1I [0 ] 0
|
|
|
|
|
O Other_GETX [0 ] 0
|
|
|
|
|
O Other_GETS [0 ] 0
|
|
|
|
|
O Merged_GETS [0 ] 0
|
|
|
|
|
O Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
O NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
O Invalidate [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
O Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
M Load [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
M Ifetch [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
M Store [0 ] 0
|
|
|
|
|
M L2_Replacement [80 ] 80
|
|
|
|
|
M L1_to_L2 [87 ] 87
|
|
|
|
|
M Trigger_L2_to_L1D [7 ] 7
|
2010-08-21 02:44:26 +02:00
|
|
|
M Trigger_L2_to_L1I [0 ] 0
|
|
|
|
|
M Other_GETX [0 ] 0
|
|
|
|
|
M Other_GETS [0 ] 0
|
|
|
|
|
M Merged_GETS [0 ] 0
|
|
|
|
|
M Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
M NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
M Invalidate [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
M Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
MM Load [6 ] 6
|
|
|
|
|
MM Ifetch [0 ] 0
|
|
|
|
|
MM Store [63 ] 63
|
|
|
|
|
MM L2_Replacement [750 ] 750
|
|
|
|
|
MM L1_to_L2 [779 ] 779
|
|
|
|
|
MM Trigger_L2_to_L1D [24 ] 24
|
|
|
|
|
MM Trigger_L2_to_L1I [3 ] 3
|
2010-08-21 02:44:26 +02:00
|
|
|
MM Other_GETX [0 ] 0
|
|
|
|
|
MM Other_GETS [0 ] 0
|
|
|
|
|
MM Merged_GETS [0 ] 0
|
|
|
|
|
MM Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
MM NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
MM Invalidate [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
MM Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
IR Load [0 ] 0
|
|
|
|
|
IR Ifetch [0 ] 0
|
|
|
|
|
IR Store [0 ] 0
|
|
|
|
|
IR L1_to_L2 [0 ] 0
|
|
|
|
|
IR Flush_line [0 ] 0
|
|
|
|
|
|
|
|
|
|
SR Load [0 ] 0
|
|
|
|
|
SR Ifetch [0 ] 0
|
|
|
|
|
SR Store [0 ] 0
|
|
|
|
|
SR L1_to_L2 [0 ] 0
|
|
|
|
|
SR Flush_line [0 ] 0
|
|
|
|
|
|
|
|
|
|
OR Load [0 ] 0
|
|
|
|
|
OR Ifetch [0 ] 0
|
|
|
|
|
OR Store [0 ] 0
|
|
|
|
|
OR L1_to_L2 [0 ] 0
|
|
|
|
|
OR Flush_line [0 ] 0
|
|
|
|
|
|
|
|
|
|
MR Load [0 ] 0
|
|
|
|
|
MR Ifetch [0 ] 0
|
|
|
|
|
MR Store [7 ] 7
|
|
|
|
|
MR L1_to_L2 [52 ] 52
|
|
|
|
|
|
|
|
|
|
MMR Load [0 ] 0
|
|
|
|
|
MMR Ifetch [3 ] 3
|
|
|
|
|
MMR Store [24 ] 24
|
|
|
|
|
MMR L1_to_L2 [92 ] 92
|
|
|
|
|
MMR Flush_line [0 ] 0
|
|
|
|
|
|
2010-08-21 02:44:26 +02:00
|
|
|
IM Load [0 ] 0
|
|
|
|
|
IM Ifetch [0 ] 0
|
|
|
|
|
IM Store [0 ] 0
|
|
|
|
|
IM L2_Replacement [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
IM L1_to_L2 [9590 ] 9590
|
2010-08-21 02:44:26 +02:00
|
|
|
IM Other_GETX [0 ] 0
|
|
|
|
|
IM Other_GETS [0 ] 0
|
|
|
|
|
IM Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
IM NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
IM Invalidate [0 ] 0
|
|
|
|
|
IM Ack [0 ] 0
|
|
|
|
|
IM Data [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
IM Exclusive_Data [746 ] 746
|
2011-04-20 03:45:23 +02:00
|
|
|
IM Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
SM Load [0 ] 0
|
|
|
|
|
SM Ifetch [0 ] 0
|
|
|
|
|
SM Store [0 ] 0
|
|
|
|
|
SM L2_Replacement [0 ] 0
|
|
|
|
|
SM L1_to_L2 [0 ] 0
|
|
|
|
|
SM Other_GETX [0 ] 0
|
|
|
|
|
SM Other_GETS [0 ] 0
|
|
|
|
|
SM Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
SM NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
SM Invalidate [0 ] 0
|
|
|
|
|
SM Ack [0 ] 0
|
|
|
|
|
SM Data [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
SM Exclusive_Data [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
SM Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
OM Load [0 ] 0
|
|
|
|
|
OM Ifetch [0 ] 0
|
|
|
|
|
OM Store [0 ] 0
|
|
|
|
|
OM L2_Replacement [0 ] 0
|
|
|
|
|
OM L1_to_L2 [0 ] 0
|
|
|
|
|
OM Other_GETX [0 ] 0
|
|
|
|
|
OM Other_GETS [0 ] 0
|
|
|
|
|
OM Merged_GETS [0 ] 0
|
|
|
|
|
OM Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
OM NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
OM Invalidate [0 ] 0
|
|
|
|
|
OM Ack [0 ] 0
|
|
|
|
|
OM All_acks [0 ] 0
|
|
|
|
|
OM All_acks_no_sharers [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
OM Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
ISM Load [0 ] 0
|
|
|
|
|
ISM Ifetch [0 ] 0
|
|
|
|
|
ISM Store [0 ] 0
|
|
|
|
|
ISM L2_Replacement [0 ] 0
|
|
|
|
|
ISM L1_to_L2 [0 ] 0
|
|
|
|
|
ISM Ack [0 ] 0
|
|
|
|
|
ISM All_acks_no_sharers [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
ISM Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
M_W Load [0 ] 0
|
|
|
|
|
M_W Ifetch [0 ] 0
|
2011-04-29 02:18:16 +02:00
|
|
|
M_W Store [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
M_W L2_Replacement [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
M_W L1_to_L2 [263 ] 263
|
2010-08-21 02:44:26 +02:00
|
|
|
M_W Ack [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
M_W All_acks_no_sharers [90 ] 90
|
2011-04-20 03:45:23 +02:00
|
|
|
M_W Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
MM_W Load [0 ] 0
|
|
|
|
|
MM_W Ifetch [0 ] 0
|
2011-04-29 02:18:16 +02:00
|
|
|
MM_W Store [1 ] 1
|
2010-08-21 02:44:26 +02:00
|
|
|
MM_W L2_Replacement [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
MM_W L1_to_L2 [4391 ] 4391
|
2010-08-21 02:44:26 +02:00
|
|
|
MM_W Ack [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
MM_W All_acks_no_sharers [746 ] 746
|
2011-04-20 03:45:23 +02:00
|
|
|
MM_W Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
IS Load [0 ] 0
|
|
|
|
|
IS Ifetch [0 ] 0
|
|
|
|
|
IS Store [0 ] 0
|
|
|
|
|
IS L2_Replacement [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
IS L1_to_L2 [619 ] 619
|
2010-08-21 02:44:26 +02:00
|
|
|
IS Other_GETX [0 ] 0
|
|
|
|
|
IS Other_GETS [0 ] 0
|
|
|
|
|
IS Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
IS NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
IS Invalidate [0 ] 0
|
|
|
|
|
IS Ack [0 ] 0
|
|
|
|
|
IS Shared_Ack [0 ] 0
|
|
|
|
|
IS Data [0 ] 0
|
|
|
|
|
IS Shared_Data [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
IS Exclusive_Data [91 ] 91
|
2011-04-20 03:45:23 +02:00
|
|
|
IS Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
SS Load [0 ] 0
|
|
|
|
|
SS Ifetch [0 ] 0
|
|
|
|
|
SS Store [0 ] 0
|
|
|
|
|
SS L2_Replacement [0 ] 0
|
|
|
|
|
SS L1_to_L2 [0 ] 0
|
|
|
|
|
SS Ack [0 ] 0
|
|
|
|
|
SS Shared_Ack [0 ] 0
|
|
|
|
|
SS All_acks [0 ] 0
|
|
|
|
|
SS All_acks_no_sharers [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
SS Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
OI Load [0 ] 0
|
|
|
|
|
OI Ifetch [0 ] 0
|
|
|
|
|
OI Store [0 ] 0
|
|
|
|
|
OI L2_Replacement [0 ] 0
|
|
|
|
|
OI L1_to_L2 [0 ] 0
|
|
|
|
|
OI Other_GETX [0 ] 0
|
|
|
|
|
OI Other_GETS [0 ] 0
|
|
|
|
|
OI Merged_GETS [0 ] 0
|
|
|
|
|
OI Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
OI NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
OI Invalidate [0 ] 0
|
|
|
|
|
OI Writeback_Ack [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
OI Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
MI Load [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
MI Ifetch [3 ] 3
|
|
|
|
|
MI Store [1 ] 1
|
2010-08-21 02:44:26 +02:00
|
|
|
MI L2_Replacement [0 ] 0
|
|
|
|
|
MI L1_to_L2 [0 ] 0
|
|
|
|
|
MI Other_GETX [0 ] 0
|
|
|
|
|
MI Other_GETS [0 ] 0
|
|
|
|
|
MI Merged_GETS [0 ] 0
|
|
|
|
|
MI Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
MI NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
MI Invalidate [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
MI Writeback_Ack [830 ] 830
|
2011-04-20 03:45:23 +02:00
|
|
|
MI Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
II Load [0 ] 0
|
|
|
|
|
II Ifetch [0 ] 0
|
|
|
|
|
II Store [0 ] 0
|
|
|
|
|
II L2_Replacement [0 ] 0
|
|
|
|
|
II L1_to_L2 [0 ] 0
|
|
|
|
|
II Other_GETX [0 ] 0
|
|
|
|
|
II Other_GETS [0 ] 0
|
|
|
|
|
II Other_GETS_No_Mig [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
II NC_DMA_GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
II Invalidate [0 ] 0
|
|
|
|
|
II Writeback_Ack [0 ] 0
|
|
|
|
|
II Writeback_Nack [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
II Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
IT Load [0 ] 0
|
|
|
|
|
IT Ifetch [0 ] 0
|
|
|
|
|
IT Store [0 ] 0
|
|
|
|
|
IT L2_Replacement [0 ] 0
|
|
|
|
|
IT L1_to_L2 [0 ] 0
|
|
|
|
|
IT Complete_L2_to_L1 [0 ] 0
|
|
|
|
|
|
|
|
|
|
ST Load [0 ] 0
|
|
|
|
|
ST Ifetch [0 ] 0
|
|
|
|
|
ST Store [0 ] 0
|
|
|
|
|
ST L2_Replacement [0 ] 0
|
|
|
|
|
ST L1_to_L2 [0 ] 0
|
|
|
|
|
ST Complete_L2_to_L1 [0 ] 0
|
|
|
|
|
|
|
|
|
|
OT Load [0 ] 0
|
|
|
|
|
OT Ifetch [0 ] 0
|
|
|
|
|
OT Store [0 ] 0
|
|
|
|
|
OT L2_Replacement [0 ] 0
|
|
|
|
|
OT L1_to_L2 [0 ] 0
|
|
|
|
|
OT Complete_L2_to_L1 [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
|
|
|
|
|
MT Load [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
MT Ifetch [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
MT Store [2 ] 2
|
2010-08-21 02:44:26 +02:00
|
|
|
MT L2_Replacement [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
MT L1_to_L2 [52 ] 52
|
|
|
|
|
MT Complete_L2_to_L1 [7 ] 7
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
MMT Load [0 ] 0
|
2011-04-29 02:18:16 +02:00
|
|
|
MMT Ifetch [1 ] 1
|
2011-12-01 20:54:30 +01:00
|
|
|
MMT Store [19 ] 19
|
2010-08-21 02:44:26 +02:00
|
|
|
MMT L2_Replacement [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
MMT L1_to_L2 [65 ] 65
|
|
|
|
|
MMT Complete_L2_to_L1 [27 ] 27
|
2011-04-20 03:45:23 +02:00
|
|
|
|
|
|
|
|
MI_F Load [0 ] 0
|
|
|
|
|
MI_F Ifetch [0 ] 0
|
|
|
|
|
MI_F Store [0 ] 0
|
|
|
|
|
MI_F L1_to_L2 [0 ] 0
|
|
|
|
|
MI_F Writeback_Ack [0 ] 0
|
|
|
|
|
MI_F Flush_line [0 ] 0
|
|
|
|
|
|
|
|
|
|
MM_F Load [0 ] 0
|
|
|
|
|
MM_F Ifetch [0 ] 0
|
|
|
|
|
MM_F Store [0 ] 0
|
|
|
|
|
MM_F L1_to_L2 [0 ] 0
|
|
|
|
|
MM_F Other_GETX [0 ] 0
|
|
|
|
|
MM_F Other_GETS [0 ] 0
|
|
|
|
|
MM_F Merged_GETS [0 ] 0
|
|
|
|
|
MM_F Other_GETS_No_Mig [0 ] 0
|
|
|
|
|
MM_F NC_DMA_GETS [0 ] 0
|
|
|
|
|
MM_F Invalidate [0 ] 0
|
|
|
|
|
MM_F Ack [0 ] 0
|
|
|
|
|
MM_F All_acks [0 ] 0
|
|
|
|
|
MM_F All_acks_no_sharers [0 ] 0
|
|
|
|
|
MM_F Flush_line [0 ] 0
|
|
|
|
|
MM_F Block_Ack [0 ] 0
|
|
|
|
|
|
|
|
|
|
IM_F Load [0 ] 0
|
|
|
|
|
IM_F Ifetch [0 ] 0
|
|
|
|
|
IM_F Store [0 ] 0
|
|
|
|
|
IM_F L2_Replacement [0 ] 0
|
|
|
|
|
IM_F L1_to_L2 [0 ] 0
|
|
|
|
|
IM_F Other_GETX [0 ] 0
|
|
|
|
|
IM_F Other_GETS [0 ] 0
|
|
|
|
|
IM_F Other_GETS_No_Mig [0 ] 0
|
|
|
|
|
IM_F NC_DMA_GETS [0 ] 0
|
|
|
|
|
IM_F Invalidate [0 ] 0
|
|
|
|
|
IM_F Ack [0 ] 0
|
|
|
|
|
IM_F Data [0 ] 0
|
|
|
|
|
IM_F Exclusive_Data [0 ] 0
|
|
|
|
|
IM_F Flush_line [0 ] 0
|
|
|
|
|
|
|
|
|
|
ISM_F Load [0 ] 0
|
|
|
|
|
ISM_F Ifetch [0 ] 0
|
|
|
|
|
ISM_F Store [0 ] 0
|
|
|
|
|
ISM_F L2_Replacement [0 ] 0
|
|
|
|
|
ISM_F L1_to_L2 [0 ] 0
|
|
|
|
|
ISM_F Ack [0 ] 0
|
|
|
|
|
ISM_F All_acks_no_sharers [0 ] 0
|
|
|
|
|
ISM_F Flush_line [0 ] 0
|
|
|
|
|
|
|
|
|
|
SM_F Load [0 ] 0
|
|
|
|
|
SM_F Ifetch [0 ] 0
|
|
|
|
|
SM_F Store [0 ] 0
|
|
|
|
|
SM_F L2_Replacement [0 ] 0
|
|
|
|
|
SM_F L1_to_L2 [0 ] 0
|
|
|
|
|
SM_F Other_GETX [0 ] 0
|
|
|
|
|
SM_F Other_GETS [0 ] 0
|
|
|
|
|
SM_F Other_GETS_No_Mig [0 ] 0
|
|
|
|
|
SM_F NC_DMA_GETS [0 ] 0
|
|
|
|
|
SM_F Invalidate [0 ] 0
|
|
|
|
|
SM_F Ack [0 ] 0
|
|
|
|
|
SM_F Data [0 ] 0
|
|
|
|
|
SM_F Exclusive_Data [0 ] 0
|
|
|
|
|
SM_F Flush_line [0 ] 0
|
|
|
|
|
|
|
|
|
|
OM_F Load [0 ] 0
|
|
|
|
|
OM_F Ifetch [0 ] 0
|
|
|
|
|
OM_F Store [0 ] 0
|
|
|
|
|
OM_F L2_Replacement [0 ] 0
|
|
|
|
|
OM_F L1_to_L2 [0 ] 0
|
|
|
|
|
OM_F Other_GETX [0 ] 0
|
|
|
|
|
OM_F Other_GETS [0 ] 0
|
|
|
|
|
OM_F Merged_GETS [0 ] 0
|
|
|
|
|
OM_F Other_GETS_No_Mig [0 ] 0
|
|
|
|
|
OM_F NC_DMA_GETS [0 ] 0
|
|
|
|
|
OM_F Invalidate [0 ] 0
|
|
|
|
|
OM_F Ack [0 ] 0
|
|
|
|
|
OM_F All_acks [0 ] 0
|
|
|
|
|
OM_F All_acks_no_sharers [0 ] 0
|
|
|
|
|
OM_F Flush_line [0 ] 0
|
|
|
|
|
|
|
|
|
|
MM_WF Load [0 ] 0
|
|
|
|
|
MM_WF Ifetch [0 ] 0
|
|
|
|
|
MM_WF Store [0 ] 0
|
|
|
|
|
MM_WF L2_Replacement [0 ] 0
|
|
|
|
|
MM_WF L1_to_L2 [0 ] 0
|
|
|
|
|
MM_WF Ack [0 ] 0
|
|
|
|
|
MM_WF All_acks_no_sharers [0 ] 0
|
|
|
|
|
MM_WF Flush_line [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
Cache Stats: system.dir_cntrl0.probeFilter
|
|
|
|
|
system.dir_cntrl0.probeFilter_total_misses: 0
|
|
|
|
|
system.dir_cntrl0.probeFilter_total_demand_misses: 0
|
|
|
|
|
system.dir_cntrl0.probeFilter_total_prefetches: 0
|
|
|
|
|
system.dir_cntrl0.probeFilter_total_sw_prefetches: 0
|
|
|
|
|
system.dir_cntrl0.probeFilter_total_hw_prefetches: 0
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Memory controller: system.dir_cntrl0.memBuffer:
|
2011-12-01 20:54:30 +01:00
|
|
|
memory_total_requests: 1586
|
|
|
|
|
memory_reads: 837
|
|
|
|
|
memory_writes: 749
|
|
|
|
|
memory_refreshes: 435
|
|
|
|
|
memory_total_request_delays: 1175
|
|
|
|
|
memory_delays_per_request: 0.740858
|
|
|
|
|
memory_delays_in_input_queue: 168
|
2011-04-29 02:18:16 +02:00
|
|
|
memory_delays_behind_head_of_bank_queue: 3
|
2011-12-01 20:54:30 +01:00
|
|
|
memory_delays_stalled_at_head_of_bank_queue: 1004
|
|
|
|
|
memory_stalls_for_bank_busy: 269
|
2010-01-30 05:29:40 +01:00
|
|
|
memory_stalls_for_random_busy: 0
|
|
|
|
|
memory_stalls_for_anti_starvation: 0
|
2011-12-01 20:54:30 +01:00
|
|
|
memory_stalls_for_arbitration: 76
|
|
|
|
|
memory_stalls_for_bus: 376
|
2010-01-30 05:29:40 +01:00
|
|
|
memory_stalls_for_tfaw: 0
|
2011-12-01 20:54:30 +01:00
|
|
|
memory_stalls_for_read_write_turnaround: 160
|
|
|
|
|
memory_stalls_for_read_read_turnaround: 123
|
|
|
|
|
accesses_per_bank: 59 53 47 85 75 57 58 40 39 53 46 64 35 48 41 50 42 53 58 54 53 40 32 36 33 45 49 57 36 47 49 52
|
2010-01-30 05:29:40 +01:00
|
|
|
|
2010-08-21 02:44:26 +02:00
|
|
|
--- Directory ---
|
2010-01-30 05:29:40 +01:00
|
|
|
- Event Counts -
|
2011-12-01 20:54:30 +01:00
|
|
|
GETX [747 ] 747
|
|
|
|
|
GETS [92 ] 92
|
|
|
|
|
PUT [900 ] 900
|
2010-08-21 02:44:26 +02:00
|
|
|
Unblock [0 ] 0
|
|
|
|
|
UnblockS [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
UnblockM [835 ] 835
|
2010-08-21 02:44:26 +02:00
|
|
|
Writeback_Clean [0 ] 0
|
|
|
|
|
Writeback_Dirty [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
Writeback_Exclusive_Clean [79 ] 79
|
|
|
|
|
Writeback_Exclusive_Dirty [749 ] 749
|
2010-08-21 02:44:26 +02:00
|
|
|
Pf_Replacement [0 ] 0
|
|
|
|
|
DMA_READ [0 ] 0
|
|
|
|
|
DMA_WRITE [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
Memory_Data [837 ] 837
|
|
|
|
|
Memory_Ack [749 ] 749
|
2010-08-21 02:44:26 +02:00
|
|
|
Ack [0 ] 0
|
|
|
|
|
Shared_Ack [0 ] 0
|
|
|
|
|
Shared_Data [0 ] 0
|
|
|
|
|
Data [0 ] 0
|
|
|
|
|
Exclusive_Data [0 ] 0
|
|
|
|
|
All_acks_and_shared_data [0 ] 0
|
|
|
|
|
All_acks_and_owner_data [0 ] 0
|
|
|
|
|
All_acks_and_data_no_sharers [0 ] 0
|
|
|
|
|
All_Unblocks [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
GETF [0 ] 0
|
|
|
|
|
PUTF [0 ] 0
|
2010-01-30 05:29:40 +01:00
|
|
|
|
|
|
|
|
- Transitions -
|
2010-08-21 02:44:26 +02:00
|
|
|
NX GETX [0 ] 0
|
|
|
|
|
NX GETS [0 ] 0
|
|
|
|
|
NX PUT [0 ] 0
|
|
|
|
|
NX Pf_Replacement [0 ] 0
|
|
|
|
|
NX DMA_READ [0 ] 0
|
|
|
|
|
NX DMA_WRITE [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NX GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO GETX [0 ] 0
|
|
|
|
|
NO GETS [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
NO PUT [830 ] 830
|
2010-08-21 02:44:26 +02:00
|
|
|
NO Pf_Replacement [0 ] 0
|
|
|
|
|
NO DMA_READ [0 ] 0
|
|
|
|
|
NO DMA_WRITE [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
S GETX [0 ] 0
|
|
|
|
|
S GETS [0 ] 0
|
|
|
|
|
S PUT [0 ] 0
|
|
|
|
|
S Pf_Replacement [0 ] 0
|
|
|
|
|
S DMA_READ [0 ] 0
|
|
|
|
|
S DMA_WRITE [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
S GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
O GETX [0 ] 0
|
|
|
|
|
O GETS [0 ] 0
|
|
|
|
|
O PUT [0 ] 0
|
|
|
|
|
O Pf_Replacement [0 ] 0
|
|
|
|
|
O DMA_READ [0 ] 0
|
|
|
|
|
O DMA_WRITE [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
O GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
E GETX [746 ] 746
|
|
|
|
|
E GETS [91 ] 91
|
2010-08-21 02:44:26 +02:00
|
|
|
E PUT [0 ] 0
|
|
|
|
|
E DMA_READ [0 ] 0
|
|
|
|
|
E DMA_WRITE [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
E GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
O_R GETX [0 ] 0
|
|
|
|
|
O_R GETS [0 ] 0
|
|
|
|
|
O_R PUT [0 ] 0
|
|
|
|
|
O_R Pf_Replacement [0 ] 0
|
|
|
|
|
O_R DMA_READ [0 ] 0
|
|
|
|
|
O_R DMA_WRITE [0 ] 0
|
|
|
|
|
O_R Ack [0 ] 0
|
|
|
|
|
O_R All_acks_and_data_no_sharers [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
O_R GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
S_R GETX [0 ] 0
|
|
|
|
|
S_R GETS [0 ] 0
|
|
|
|
|
S_R PUT [0 ] 0
|
|
|
|
|
S_R Pf_Replacement [0 ] 0
|
|
|
|
|
S_R DMA_READ [0 ] 0
|
|
|
|
|
S_R DMA_WRITE [0 ] 0
|
|
|
|
|
S_R Ack [0 ] 0
|
|
|
|
|
S_R Data [0 ] 0
|
|
|
|
|
S_R All_acks_and_data_no_sharers [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
S_R GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_R GETX [0 ] 0
|
|
|
|
|
NO_R GETS [0 ] 0
|
|
|
|
|
NO_R PUT [0 ] 0
|
|
|
|
|
NO_R Pf_Replacement [0 ] 0
|
|
|
|
|
NO_R DMA_READ [0 ] 0
|
|
|
|
|
NO_R DMA_WRITE [0 ] 0
|
|
|
|
|
NO_R Ack [0 ] 0
|
|
|
|
|
NO_R Data [0 ] 0
|
|
|
|
|
NO_R Exclusive_Data [0 ] 0
|
|
|
|
|
NO_R All_acks_and_data_no_sharers [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_R GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_B GETX [0 ] 0
|
|
|
|
|
NO_B GETS [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
NO_B PUT [70 ] 70
|
2010-08-21 02:44:26 +02:00
|
|
|
NO_B UnblockS [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
NO_B UnblockM [835 ] 835
|
2010-08-21 02:44:26 +02:00
|
|
|
NO_B Pf_Replacement [0 ] 0
|
|
|
|
|
NO_B DMA_READ [0 ] 0
|
|
|
|
|
NO_B DMA_WRITE [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_B GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_B_X GETX [0 ] 0
|
|
|
|
|
NO_B_X GETS [0 ] 0
|
|
|
|
|
NO_B_X PUT [0 ] 0
|
|
|
|
|
NO_B_X UnblockS [0 ] 0
|
|
|
|
|
NO_B_X UnblockM [0 ] 0
|
|
|
|
|
NO_B_X Pf_Replacement [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
NO_B_X DMA_READ [0 ] 0
|
|
|
|
|
NO_B_X DMA_WRITE [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_B_X GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_B_S GETX [0 ] 0
|
|
|
|
|
NO_B_S GETS [0 ] 0
|
|
|
|
|
NO_B_S PUT [0 ] 0
|
|
|
|
|
NO_B_S UnblockS [0 ] 0
|
|
|
|
|
NO_B_S UnblockM [0 ] 0
|
|
|
|
|
NO_B_S Pf_Replacement [0 ] 0
|
|
|
|
|
NO_B_S DMA_READ [0 ] 0
|
|
|
|
|
NO_B_S DMA_WRITE [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_B_S GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_B_S_W GETX [0 ] 0
|
|
|
|
|
NO_B_S_W GETS [0 ] 0
|
|
|
|
|
NO_B_S_W PUT [0 ] 0
|
|
|
|
|
NO_B_S_W UnblockS [0 ] 0
|
|
|
|
|
NO_B_S_W Pf_Replacement [0 ] 0
|
|
|
|
|
NO_B_S_W DMA_READ [0 ] 0
|
|
|
|
|
NO_B_S_W DMA_WRITE [0 ] 0
|
|
|
|
|
NO_B_S_W All_Unblocks [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_B_S_W GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
O_B GETX [0 ] 0
|
|
|
|
|
O_B GETS [0 ] 0
|
|
|
|
|
O_B PUT [0 ] 0
|
|
|
|
|
O_B UnblockS [0 ] 0
|
2011-02-09 03:07:54 +01:00
|
|
|
O_B UnblockM [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
O_B Pf_Replacement [0 ] 0
|
|
|
|
|
O_B DMA_READ [0 ] 0
|
|
|
|
|
O_B DMA_WRITE [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
O_B GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_B_W GETX [0 ] 0
|
|
|
|
|
NO_B_W GETS [0 ] 0
|
|
|
|
|
NO_B_W PUT [0 ] 0
|
|
|
|
|
NO_B_W UnblockS [0 ] 0
|
|
|
|
|
NO_B_W UnblockM [0 ] 0
|
|
|
|
|
NO_B_W Pf_Replacement [0 ] 0
|
|
|
|
|
NO_B_W DMA_READ [0 ] 0
|
|
|
|
|
NO_B_W DMA_WRITE [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
NO_B_W Memory_Data [837 ] 837
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_B_W GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
O_B_W GETX [0 ] 0
|
|
|
|
|
O_B_W GETS [0 ] 0
|
|
|
|
|
O_B_W PUT [0 ] 0
|
|
|
|
|
O_B_W UnblockS [0 ] 0
|
|
|
|
|
O_B_W Pf_Replacement [0 ] 0
|
|
|
|
|
O_B_W DMA_READ [0 ] 0
|
|
|
|
|
O_B_W DMA_WRITE [0 ] 0
|
|
|
|
|
O_B_W Memory_Data [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
O_B_W GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_W GETX [0 ] 0
|
|
|
|
|
NO_W GETS [0 ] 0
|
|
|
|
|
NO_W PUT [0 ] 0
|
|
|
|
|
NO_W Pf_Replacement [0 ] 0
|
|
|
|
|
NO_W DMA_READ [0 ] 0
|
|
|
|
|
NO_W DMA_WRITE [0 ] 0
|
|
|
|
|
NO_W Memory_Data [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_W GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
O_W GETX [0 ] 0
|
|
|
|
|
O_W GETS [0 ] 0
|
|
|
|
|
O_W PUT [0 ] 0
|
|
|
|
|
O_W Pf_Replacement [0 ] 0
|
|
|
|
|
O_W DMA_READ [0 ] 0
|
|
|
|
|
O_W DMA_WRITE [0 ] 0
|
|
|
|
|
O_W Memory_Data [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
O_W GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_DW_B_W GETX [0 ] 0
|
|
|
|
|
NO_DW_B_W GETS [0 ] 0
|
|
|
|
|
NO_DW_B_W PUT [0 ] 0
|
|
|
|
|
NO_DW_B_W Pf_Replacement [0 ] 0
|
|
|
|
|
NO_DW_B_W DMA_READ [0 ] 0
|
|
|
|
|
NO_DW_B_W DMA_WRITE [0 ] 0
|
|
|
|
|
NO_DW_B_W Ack [0 ] 0
|
|
|
|
|
NO_DW_B_W Data [0 ] 0
|
|
|
|
|
NO_DW_B_W Exclusive_Data [0 ] 0
|
|
|
|
|
NO_DW_B_W All_acks_and_data_no_sharers [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_DW_B_W GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_DR_B_W GETX [0 ] 0
|
|
|
|
|
NO_DR_B_W GETS [0 ] 0
|
|
|
|
|
NO_DR_B_W PUT [0 ] 0
|
|
|
|
|
NO_DR_B_W Pf_Replacement [0 ] 0
|
|
|
|
|
NO_DR_B_W DMA_READ [0 ] 0
|
|
|
|
|
NO_DR_B_W DMA_WRITE [0 ] 0
|
|
|
|
|
NO_DR_B_W Memory_Data [0 ] 0
|
|
|
|
|
NO_DR_B_W Ack [0 ] 0
|
|
|
|
|
NO_DR_B_W Shared_Ack [0 ] 0
|
|
|
|
|
NO_DR_B_W Shared_Data [0 ] 0
|
|
|
|
|
NO_DR_B_W Data [0 ] 0
|
|
|
|
|
NO_DR_B_W Exclusive_Data [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_DR_B_W GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_DR_B_D GETX [0 ] 0
|
|
|
|
|
NO_DR_B_D GETS [0 ] 0
|
|
|
|
|
NO_DR_B_D PUT [0 ] 0
|
|
|
|
|
NO_DR_B_D Pf_Replacement [0 ] 0
|
|
|
|
|
NO_DR_B_D DMA_READ [0 ] 0
|
|
|
|
|
NO_DR_B_D DMA_WRITE [0 ] 0
|
|
|
|
|
NO_DR_B_D Ack [0 ] 0
|
|
|
|
|
NO_DR_B_D Shared_Ack [0 ] 0
|
|
|
|
|
NO_DR_B_D Shared_Data [0 ] 0
|
|
|
|
|
NO_DR_B_D Data [0 ] 0
|
|
|
|
|
NO_DR_B_D Exclusive_Data [0 ] 0
|
|
|
|
|
NO_DR_B_D All_acks_and_shared_data [0 ] 0
|
|
|
|
|
NO_DR_B_D All_acks_and_owner_data [0 ] 0
|
|
|
|
|
NO_DR_B_D All_acks_and_data_no_sharers [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_DR_B_D GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_DR_B GETX [0 ] 0
|
|
|
|
|
NO_DR_B GETS [0 ] 0
|
|
|
|
|
NO_DR_B PUT [0 ] 0
|
|
|
|
|
NO_DR_B Pf_Replacement [0 ] 0
|
|
|
|
|
NO_DR_B DMA_READ [0 ] 0
|
|
|
|
|
NO_DR_B DMA_WRITE [0 ] 0
|
|
|
|
|
NO_DR_B Ack [0 ] 0
|
|
|
|
|
NO_DR_B Shared_Ack [0 ] 0
|
|
|
|
|
NO_DR_B Shared_Data [0 ] 0
|
|
|
|
|
NO_DR_B Data [0 ] 0
|
|
|
|
|
NO_DR_B Exclusive_Data [0 ] 0
|
|
|
|
|
NO_DR_B All_acks_and_shared_data [0 ] 0
|
|
|
|
|
NO_DR_B All_acks_and_owner_data [0 ] 0
|
|
|
|
|
NO_DR_B All_acks_and_data_no_sharers [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_DR_B GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
NO_DW_W GETX [0 ] 0
|
|
|
|
|
NO_DW_W GETS [0 ] 0
|
|
|
|
|
NO_DW_W PUT [0 ] 0
|
|
|
|
|
NO_DW_W Pf_Replacement [0 ] 0
|
|
|
|
|
NO_DW_W DMA_READ [0 ] 0
|
|
|
|
|
NO_DW_W DMA_WRITE [0 ] 0
|
|
|
|
|
NO_DW_W Memory_Ack [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
NO_DW_W GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
O_DR_B_W GETX [0 ] 0
|
|
|
|
|
O_DR_B_W GETS [0 ] 0
|
|
|
|
|
O_DR_B_W PUT [0 ] 0
|
|
|
|
|
O_DR_B_W Pf_Replacement [0 ] 0
|
|
|
|
|
O_DR_B_W DMA_READ [0 ] 0
|
|
|
|
|
O_DR_B_W DMA_WRITE [0 ] 0
|
|
|
|
|
O_DR_B_W Memory_Data [0 ] 0
|
|
|
|
|
O_DR_B_W Ack [0 ] 0
|
|
|
|
|
O_DR_B_W Shared_Ack [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
O_DR_B_W GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
O_DR_B GETX [0 ] 0
|
|
|
|
|
O_DR_B GETS [0 ] 0
|
|
|
|
|
O_DR_B PUT [0 ] 0
|
|
|
|
|
O_DR_B Pf_Replacement [0 ] 0
|
|
|
|
|
O_DR_B DMA_READ [0 ] 0
|
|
|
|
|
O_DR_B DMA_WRITE [0 ] 0
|
|
|
|
|
O_DR_B Ack [0 ] 0
|
|
|
|
|
O_DR_B Shared_Ack [0 ] 0
|
|
|
|
|
O_DR_B All_acks_and_owner_data [0 ] 0
|
|
|
|
|
O_DR_B All_acks_and_data_no_sharers [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
O_DR_B GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-12-01 20:54:30 +01:00
|
|
|
WB GETX [1 ] 1
|
|
|
|
|
WB GETS [1 ] 1
|
2010-08-21 02:44:26 +02:00
|
|
|
WB PUT [0 ] 0
|
|
|
|
|
WB Unblock [0 ] 0
|
|
|
|
|
WB Writeback_Clean [0 ] 0
|
|
|
|
|
WB Writeback_Dirty [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
WB Writeback_Exclusive_Clean [79 ] 79
|
|
|
|
|
WB Writeback_Exclusive_Dirty [749 ] 749
|
2010-08-21 02:44:26 +02:00
|
|
|
WB Pf_Replacement [0 ] 0
|
|
|
|
|
WB DMA_READ [0 ] 0
|
|
|
|
|
WB DMA_WRITE [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
WB GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
|
|
|
|
WB_O_W GETX [0 ] 0
|
|
|
|
|
WB_O_W GETS [0 ] 0
|
|
|
|
|
WB_O_W PUT [0 ] 0
|
|
|
|
|
WB_O_W Pf_Replacement [0 ] 0
|
|
|
|
|
WB_O_W DMA_READ [0 ] 0
|
|
|
|
|
WB_O_W DMA_WRITE [0 ] 0
|
|
|
|
|
WB_O_W Memory_Ack [0 ] 0
|
2011-04-20 03:45:23 +02:00
|
|
|
WB_O_W GETF [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
|
2011-02-09 03:07:54 +01:00
|
|
|
WB_E_W GETX [0 ] 0
|
2011-04-29 02:18:16 +02:00
|
|
|
WB_E_W GETS [0 ] 0
|
2010-08-21 02:44:26 +02:00
|
|
|
WB_E_W PUT [0 ] 0
|
|
|
|
|
WB_E_W Pf_Replacement [0 ] 0
|
|
|
|
|
WB_E_W DMA_READ [0 ] 0
|
|
|
|
|
WB_E_W DMA_WRITE [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
WB_E_W Memory_Ack [749 ] 749
|
2011-04-20 03:45:23 +02:00
|
|
|
WB_E_W GETF [0 ] 0
|
|
|
|
|
|
|
|
|
|
NO_F GETX [0 ] 0
|
|
|
|
|
NO_F GETS [0 ] 0
|
|
|
|
|
NO_F PUT [0 ] 0
|
|
|
|
|
NO_F UnblockM [0 ] 0
|
|
|
|
|
NO_F Pf_Replacement [0 ] 0
|
|
|
|
|
NO_F GETF [0 ] 0
|
|
|
|
|
NO_F PUTF [0 ] 0
|
|
|
|
|
|
|
|
|
|
NO_F_W GETX [0 ] 0
|
|
|
|
|
NO_F_W GETS [0 ] 0
|
|
|
|
|
NO_F_W PUT [0 ] 0
|
|
|
|
|
NO_F_W Pf_Replacement [0 ] 0
|
|
|
|
|
NO_F_W DMA_READ [0 ] 0
|
|
|
|
|
NO_F_W DMA_WRITE [0 ] 0
|
|
|
|
|
NO_F_W Memory_Data [0 ] 0
|
2011-12-01 20:54:30 +01:00
|
|
|
NO_F_W GETF [0 ] 0
|
|
|
|
|
|
