2009-05-11 19:38:46 +02:00
|
|
|
|
|
|
|
---------- Begin Simulation Statistics ----------
|
2010-08-21 02:44:26 +02:00
|
|
|
sim_seconds 0.000208 # Number of seconds simulated
|
2011-02-09 03:07:54 +01:00
|
|
|
sim_ticks 208400 # Number of ticks simulated
|
2012-01-11 00:28:49 +01:00
|
|
|
sim_freq 1000000000 # Frequency of simulated ticks
|
|
|
|
host_inst_rate 9071 # Simulator instruction rate (inst/s)
|
|
|
|
host_tick_rate 295192 # Simulator tick rate (ticks/s)
|
|
|
|
host_mem_usage 240380 # Number of bytes of host memory used
|
|
|
|
host_seconds 0.71 # Real time elapsed on the host
|
|
|
|
sim_insts 6404 # Number of instructions simulated
|
2009-05-11 19:38:46 +02:00
|
|
|
system.cpu.dtb.fetch_hits 0 # ITB hits
|
|
|
|
system.cpu.dtb.fetch_misses 0 # ITB misses
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.dtb.fetch_acv 0 # ITB acv
|
|
|
|
system.cpu.dtb.fetch_accesses 0 # ITB accesses
|
2009-05-11 19:38:46 +02:00
|
|
|
system.cpu.dtb.read_hits 1185 # DTB read hits
|
|
|
|
system.cpu.dtb.read_misses 7 # DTB read misses
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.dtb.read_acv 0 # DTB read access violations
|
|
|
|
system.cpu.dtb.read_accesses 1192 # DTB read accesses
|
2009-05-11 19:38:46 +02:00
|
|
|
system.cpu.dtb.write_hits 865 # DTB write hits
|
|
|
|
system.cpu.dtb.write_misses 3 # DTB write misses
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.dtb.write_acv 0 # DTB write access violations
|
|
|
|
system.cpu.dtb.write_accesses 868 # DTB write accesses
|
|
|
|
system.cpu.dtb.data_hits 2050 # DTB hits
|
|
|
|
system.cpu.dtb.data_misses 10 # DTB misses
|
|
|
|
system.cpu.dtb.data_acv 0 # DTB access violations
|
|
|
|
system.cpu.dtb.data_accesses 2060 # DTB accesses
|
2010-01-30 05:29:40 +01:00
|
|
|
system.cpu.itb.fetch_hits 6415 # ITB hits
|
2009-05-11 19:38:46 +02:00
|
|
|
system.cpu.itb.fetch_misses 17 # ITB misses
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.itb.fetch_acv 0 # ITB acv
|
|
|
|
system.cpu.itb.fetch_accesses 6432 # ITB accesses
|
2009-05-11 19:38:46 +02:00
|
|
|
system.cpu.itb.read_hits 0 # DTB read hits
|
|
|
|
system.cpu.itb.read_misses 0 # DTB read misses
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.itb.read_acv 0 # DTB read access violations
|
|
|
|
system.cpu.itb.read_accesses 0 # DTB read accesses
|
2009-05-11 19:38:46 +02:00
|
|
|
system.cpu.itb.write_hits 0 # DTB write hits
|
|
|
|
system.cpu.itb.write_misses 0 # DTB write misses
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.itb.write_acv 0 # DTB write access violations
|
|
|
|
system.cpu.itb.write_accesses 0 # DTB write accesses
|
|
|
|
system.cpu.itb.data_hits 0 # DTB hits
|
|
|
|
system.cpu.itb.data_misses 0 # DTB misses
|
|
|
|
system.cpu.itb.data_acv 0 # DTB access violations
|
|
|
|
system.cpu.itb.data_accesses 0 # DTB accesses
|
|
|
|
system.cpu.workload.num_syscalls 17 # Number of system calls
|
2011-02-09 03:07:54 +01:00
|
|
|
system.cpu.numCycles 208400 # number of cpu cycles simulated
|
|
|
|
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
|
2009-05-11 19:38:46 +02:00
|
|
|
system.cpu.num_insts 6404 # Number of instructions executed
|
2011-02-09 03:07:54 +01:00
|
|
|
system.cpu.num_int_alu_accesses 6331 # Number of integer alu accesses
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.num_fp_alu_accesses 10 # Number of float alu accesses
|
|
|
|
system.cpu.num_func_calls 251 # number of times a function call or return occured
|
|
|
|
system.cpu.num_conditional_control_insts 750 # number of instructions that are conditional controls
|
2011-02-09 03:07:54 +01:00
|
|
|
system.cpu.num_int_insts 6331 # number of integer instructions
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.num_fp_insts 10 # number of float instructions
|
2011-02-09 03:07:54 +01:00
|
|
|
system.cpu.num_int_register_reads 8304 # number of times the integer registers were read
|
|
|
|
system.cpu.num_int_register_writes 4581 # number of times the integer registers were written
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.num_fp_register_reads 8 # number of times the floating registers were read
|
|
|
|
system.cpu.num_fp_register_writes 2 # number of times the floating registers were written
|
2011-02-09 03:07:54 +01:00
|
|
|
system.cpu.num_mem_refs 2060 # number of memory refs
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.num_load_insts 1192 # Number of load instructions
|
2011-02-09 03:07:54 +01:00
|
|
|
system.cpu.num_store_insts 868 # Number of store instructions
|
2012-01-11 00:28:49 +01:00
|
|
|
system.cpu.num_idle_cycles 0 # Number of idle cycles
|
|
|
|
system.cpu.num_busy_cycles 208400 # Number of busy cycles
|
|
|
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
|
|
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
2009-05-11 19:38:46 +02:00
|
|
|
|
|
|
|
---------- End Simulation Statistics ----------
|