sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
gem5/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt

759 lines
86 KiB
Text
Raw Normal View History

ruby: Initial references for ruby regressions
2009-05-11 19:38:46 +02:00
---------- Begin Simulation Statistics ----------
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
sim_seconds 0.007555 # Number of seconds simulated
sim_ticks 7555268 # Number of ticks simulated
final_tick 7555268 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
m5: Regression Tester Update This patch includes the necessary regression updates to test the new ruby configuration system. The patch includes support for multiple ruby protocols and adds the ruby random tester. The patch removes atomic mode test for ruby since ruby does not support atomic mode acceses. These tests can be added back in when ruby supports atomic mode for real. --HG-- rename : tests/quick/50.memtest/test.py => tests/quick/60.rubytest/test.py
2010-01-30 05:29:40 +01:00
sim_freq 1000000000 # Frequency of simulated ticks
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
host_tick_rate 300368 # Simulator tick rate (ticks/s)
host_mem_usage 516584 # Number of bytes of host memory used
host_seconds 25.15 # Real time elapsed on the host
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1 # Clock period in ticks
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.bytes_read::ruby.dir_cntrl0 39518912 # Number of bytes read from this memory
system.mem_ctrls.bytes_read::total 39518912 # Number of bytes read from this memory
system.mem_ctrls.bytes_written::ruby.dir_cntrl0 39517888 # Number of bytes written to this memory
system.mem_ctrls.bytes_written::total 39517888 # Number of bytes written to this memory
system.mem_ctrls.num_reads::ruby.dir_cntrl0 617483 # Number of read requests responded to by this memory
system.mem_ctrls.num_reads::total 617483 # Number of read requests responded to by this memory
system.mem_ctrls.num_writes::ruby.dir_cntrl0 617467 # Number of write requests responded to by this memory
system.mem_ctrls.num_writes::total 617467 # Number of write requests responded to by this memory
system.mem_ctrls.bw_read::ruby.dir_cntrl0 5230643307 # Total read bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_read::total 5230643307 # Total read bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_write::ruby.dir_cntrl0 5230507773 # Write bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_write::total 5230507773 # Write bandwidth from this memory (bytes/s)
system.mem_ctrls.bw_total::ruby.dir_cntrl0 10461151080 # Total bandwidth to/from this memory (bytes/s)
system.mem_ctrls.bw_total::total 10461151080 # Total bandwidth to/from this memory (bytes/s)
system.mem_ctrls.readReqs 617498 # Number of read requests accepted
system.mem_ctrls.writeReqs 617467 # Number of write requests accepted
system.mem_ctrls.readBursts 617498 # Number of DRAM read bursts, including those serviced by the write queue
system.mem_ctrls.writeBursts 617467 # Number of DRAM write bursts, including those merged in the write queue
system.mem_ctrls.bytesReadDRAM 38662976 # Total number of bytes read from DRAM
system.mem_ctrls.bytesReadWrQ 856576 # Total number of bytes read from write queue
system.mem_ctrls.bytesWritten 39021568 # Total number of bytes written to DRAM
system.mem_ctrls.bytesReadSys 39519872 # Total read bytes from the system interface side
system.mem_ctrls.bytesWrittenSys 39517888 # Total written bytes from the system interface side
system.mem_ctrls.servicedByWrQ 13384 # Number of DRAM read bursts serviced by the write queue
system.mem_ctrls.mergedWrBursts 7703 # Number of DRAM write bursts merged with an existing one
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.perBankRdBursts::0 75345 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::1 75630 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::2 75779 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::3 75335 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::4 74961 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::5 75413 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::6 76010 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::7 75636 # Per bank write bursts
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.perBankRdBursts::8 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::9 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::10 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::11 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::12 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::13 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::14 0 # Per bank write bursts
system.mem_ctrls.perBankRdBursts::15 0 # Per bank write bursts
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.perBankWrBursts::0 76025 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::1 76356 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::2 76461 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::3 76035 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::4 75665 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::5 76133 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::6 76696 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::7 76341 # Per bank write bursts
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::9 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::10 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::11 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::12 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::13 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::14 0 # Per bank write bursts
system.mem_ctrls.perBankWrBursts::15 0 # Per bank write bursts
system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.numWrRetry 1313 # Number of times write queue was full causing retry
system.mem_ctrls.totGap 7555254 # Total gap between requests
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.readPktSize::6 617498 # Read request sizes (log2)
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.writePktSize::6 617467 # Write request sizes (log2)
system.mem_ctrls.rdQLenPdf::0 27 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::1 395 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::2 1547 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::3 4803 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::4 10732 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::5 19329 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::6 29926 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::7 39736 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::8 47332 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::9 51238 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::10 49822 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::11 45328 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::12 39038 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::13 34104 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::14 29932 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::15 27412 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::16 25532 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::17 24223 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::18 23465 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::19 22388 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::20 20868 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::21 18295 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::22 14861 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::23 10803 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::24 6963 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::25 3724 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::26 1587 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::27 536 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::28 146 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::29 19 # What read queue length does an incoming req see
system.mem_ctrls.rdQLenPdf::30 3 # What read queue length does an incoming req see
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::15 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::16 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::17 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::18 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::19 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::20 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::21 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::22 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::23 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::24 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::25 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::26 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::27 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::28 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::29 1 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::30 1 # What write queue length does an incoming req see
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.wrQLenPdf::31 6 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::32 72 # What write queue length does an incoming req see
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls.wrQLenPdf::33 237 # What write queue length does an incoming req see
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.wrQLenPdf::34 615 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::35 1345 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::36 2774 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::37 4991 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::38 7821 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::39 10763 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::40 14754 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::41 18194 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::42 20672 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::43 23139 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::44 24969 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::45 25977 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::46 27541 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::47 28269 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::48 29583 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::49 30968 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::50 32545 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::51 33941 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::52 33783 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::53 34127 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::54 36711 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::55 56250 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::56 47740 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::57 20435 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::58 15303 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::59 10488 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::60 7108 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::61 4178 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::62 1989 # What write queue length does an incoming req see
system.mem_ctrls.wrQLenPdf::63 2445 # What write queue length does an incoming req see
system.mem_ctrls.bytesPerActivate::samples 244165 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::mean 318.158098 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::gmean 243.329803 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::stdev 225.133894 # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::0-127 33053 13.54% 13.54% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::128-255 74498 30.51% 44.05% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::256-383 47835 19.59% 63.64% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::384-511 35613 14.59% 78.23% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::512-639 24095 9.87% 88.09% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::640-767 14293 5.85% 93.95% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::768-895 7627 3.12% 97.07% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::896-1023 3851 1.58% 98.65% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::1024-1151 3300 1.35% 100.00% # Bytes accessed per row activation
system.mem_ctrls.bytesPerActivate::total 244165 # Bytes accessed per row activation
system.mem_ctrls.rdPerTurnAround::samples 38107 # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::mean 15.852311 # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::gmean 8.829731 # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::stdev 11.389209 # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::0-3 12433 32.63% 32.63% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::4-7 1821 4.78% 37.41% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::8-11 458 1.20% 38.61% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::12-15 176 0.46% 39.07% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::16-19 3225 8.46% 47.53% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::20-23 7120 18.68% 66.22% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::24-27 6436 16.89% 83.11% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::28-31 5233 13.73% 96.84% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::32-35 1168 3.07% 99.90% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::36-39 36 0.09% 100.00% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::80-83 1 0.00% 100.00% # Reads before turning the bus around for writes
system.mem_ctrls.rdPerTurnAround::total 38107 # Reads before turning the bus around for writes
system.mem_ctrls.wrPerTurnAround::samples 38107 # Writes before turning the bus around for reads
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.wrPerTurnAround::mean 16 # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::gmean 16.000000 # Writes before turning the bus around for reads
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.wrPerTurnAround::16 38107 100.00% 100.00% # Writes before turning the bus around for reads
system.mem_ctrls.wrPerTurnAround::total 38107 # Writes before turning the bus around for reads
system.mem_ctrls.totQLat 111252820 # Total ticks spent queuing
system.mem_ctrls.totMemAccLat 122730891 # Total ticks spent from burst creation until serviced by the DRAM
system.mem_ctrls.totBusLat 3020545 # Total ticks spent in databus transfers
system.mem_ctrls.avgQLat 184.16 # Average queueing delay per DRAM burst
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.avgMemAccLat 203.16 # Average memory access latency per DRAM burst
system.mem_ctrls.avgRdBW 5117.35 # Average DRAM read bandwidth in MiByte/s
system.mem_ctrls.avgWrBW 5164.82 # Average achieved write bandwidth in MiByte/s
system.mem_ctrls.avgRdBWSys 5230.77 # Average system read bandwidth in MiByte/s
system.mem_ctrls.avgWrBWSys 5230.51 # Average system write bandwidth in MiByte/s
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls.busUtil 80.33 # Data bus utilization in percentage
system.mem_ctrls.busUtilRead 39.98 # Data bus utilization in percentage for reads
system.mem_ctrls.busUtilWrite 40.35 # Data bus utilization in percentage for writes
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.avgRdQLen 18.19 # Average read queue length when enqueuing
system.mem_ctrls.avgWrQLen 53.14 # Average write queue length when enqueuing
system.mem_ctrls.readRowHits 369680 # Number of row buffer hits during reads
system.mem_ctrls.writeRowHits 599969 # Number of row buffer hits during writes
system.mem_ctrls.readRowHitRate 61.19 # Row buffer hit rate for reads
system.mem_ctrls.writeRowHitRate 98.39 # Row buffer hit rate for writes
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls.avgGap 6.12 # Average gap between requests
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls.pageHitRate 79.88 # Row buffer hit rate, read and write combined
system.mem_ctrls_0.actEnergy 1845214560 # Energy for activate commands per rank (pJ)
system.mem_ctrls_0.preEnergy 1025119200 # Energy for precharge commands per rank (pJ)
system.mem_ctrls_0.readEnergy 7536484800 # Energy for read commands per rank (pJ)
system.mem_ctrls_0.writeEnergy 6319337472 # Energy for write commands per rank (pJ)
system.mem_ctrls_0.refreshEnergy 493303200 # Energy for refresh commands per rank (pJ)
system.mem_ctrls_0.actBackEnergy 5147480988 # Energy for active background per rank (pJ)
system.mem_ctrls_0.preBackEnergy 16294800 # Energy for precharge background per rank (pJ)
system.mem_ctrls_0.totalEnergy 22383235020 # Total energy per rank (pJ)
system.mem_ctrls_0.averagePower 2963.601171 # Core power per rank (mW)
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls_0.memoryStateTime::IDLE 12 # Time in different power states
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls_0.memoryStateTime::REF 252200 # Time in different power states
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls_0.memoryStateTime::ACT 7300517 # Time in different power states
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states
system.mem_ctrls_1.actEnergy 0 # Energy for activate commands per rank (pJ)
system.mem_ctrls_1.preEnergy 0 # Energy for precharge commands per rank (pJ)
system.mem_ctrls_1.readEnergy 0 # Energy for read commands per rank (pJ)
system.mem_ctrls_1.writeEnergy 0 # Energy for write commands per rank (pJ)
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.mem_ctrls_1.refreshEnergy 493303200 # Energy for refresh commands per rank (pJ)
system.mem_ctrls_1.actBackEnergy 163216080 # Energy for active background per rank (pJ)
system.mem_ctrls_1.preBackEnergy 4388427600 # Energy for precharge background per rank (pJ)
system.mem_ctrls_1.totalEnergy 5044946880 # Total energy per rank (pJ)
system.mem_ctrls_1.averagePower 667.969017 # Core power per rank (mW)
system.mem_ctrls_1.memoryStateTime::IDLE 7300480 # Time in different power states
system.mem_ctrls_1.memoryStateTime::REF 252200 # Time in different power states
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states
system.mem_ctrls_1.memoryStateTime::ACT 0 # Time in different power states
system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states
system.cpu_clk_domain.clock 1 # Clock period in ticks
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.cpu0.num_reads 98710 # number of read accesses completed
system.cpu0.num_writes 55193 # number of write accesses completed
system.cpu1.num_reads 99197 # number of read accesses completed
system.cpu1.num_writes 54876 # number of write accesses completed
system.cpu2.num_reads 99807 # number of read accesses completed
system.cpu2.num_writes 55097 # number of write accesses completed
system.cpu3.num_reads 99629 # number of read accesses completed
system.cpu3.num_writes 55678 # number of write accesses completed
system.cpu4.num_reads 99475 # number of read accesses completed
system.cpu4.num_writes 55578 # number of write accesses completed
system.cpu5.num_reads 100000 # number of read accesses completed
system.cpu5.num_writes 55526 # number of write accesses completed
system.cpu6.num_reads 99558 # number of read accesses completed
system.cpu6.num_writes 55241 # number of write accesses completed
system.cpu7.num_reads 99313 # number of read accesses completed
system.cpu7.num_writes 55346 # number of write accesses completed
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
system.ruby.clk_domain.clock 1 # Clock period in ticks
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.delayHist::bucket_size 32 # delay histogram for all message
system.ruby.delayHist::max_bucket 319 # delay histogram for all message
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.delayHist::samples 1255488 # delay histogram for all message
system.ruby.delayHist::mean 2.169527 # delay histogram for all message
system.ruby.delayHist::stdev 7.600459 # delay histogram for all message
system.ruby.delayHist | 1238674 98.66% 98.66% | 10648 0.85% 99.51% | 5547 0.44% 99.95% | 516 0.04% 99.99% | 82 0.01% 100.00% | 21 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message
system.ruby.delayHist::total 1255488 # delay histogram for all message
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.outstanding_req_hist::bucket_size 2
system.ruby.outstanding_req_hist::max_bucket 19
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.outstanding_req_hist::samples 625936
system.ruby.outstanding_req_hist::mean 15.998449
system.ruby.outstanding_req_hist::gmean 15.997183
system.ruby.outstanding_req_hist::stdev 0.125950
system.ruby.outstanding_req_hist | 8 0.00% 0.00% | 16 0.00% 0.00% | 16 0.00% 0.01% | 16 0.00% 0.01% | 16 0.00% 0.01% | 16 0.00% 0.01% | 16 0.00% 0.02% | 27 0.00% 0.02% | 625805 99.98% 100.00% | 0 0.00% 100.00%
system.ruby.outstanding_req_hist::total 625936
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.latency_hist::bucket_size 512
system.ruby.latency_hist::max_bucket 5119
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.latency_hist::samples 625808
system.ruby.latency_hist::mean 1545.142387
system.ruby.latency_hist::gmean 1522.552701
system.ruby.latency_hist::stdev 264.347793
system.ruby.latency_hist | 80 0.01% 0.01% | 8131 1.30% 1.31% | 315699 50.45% 51.76% | 277984 44.42% 96.18% | 23716 3.79% 99.97% | 198 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.latency_hist::total 625808
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.miss_latency_hist::bucket_size 512
system.ruby.miss_latency_hist::max_bucket 5119
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.miss_latency_hist::samples 625808
system.ruby.miss_latency_hist::mean 1545.142387
system.ruby.miss_latency_hist::gmean 1522.552701
system.ruby.miss_latency_hist::stdev 264.347793
system.ruby.miss_latency_hist | 80 0.01% 0.01% | 8131 1.30% 1.31% | 315699 50.45% 51.76% | 277984 44.42% 96.18% | 23716 3.79% 99.97% | 198 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.miss_latency_hist::total 625808
system.ruby.L1Cache.incomplete_times 8330
system.ruby.Directory.incomplete_times 617475
stats: updates statistics for ruby regressions
2013-05-21 18:32:57 +02:00
system.ruby.l1_cntrl0.cacheMemory.demand_hits 0 # Number of cache demand hits
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.l1_cntrl0.cacheMemory.demand_misses 78125 # Number of cache demand misses
system.ruby.l1_cntrl0.cacheMemory.demand_accesses 78125 # Number of cache demand accesses
stats: Bump stats for filter, crossbar and config changes This patch bumps the stats to reflect the addition of the snoop filter and snoop stats, the change from bus to crossbar, and the updates to the ARM regressions that are now using a different CPU and cache configuration. Lastly, some minor changes are expected due to the activation cleanup of the CPUs.
2014-09-20 23:18:53 +02:00
system.ruby.l1_cntrl1.cacheMemory.demand_hits 0 # Number of cache demand hits
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.l1_cntrl1.cacheMemory.demand_misses 78092 # Number of cache demand misses
system.ruby.l1_cntrl1.cacheMemory.demand_accesses 78092 # Number of cache demand accesses
stats: Bump stats for filter, crossbar and config changes This patch bumps the stats to reflect the addition of the snoop filter and snoop stats, the change from bus to crossbar, and the updates to the ARM regressions that are now using a different CPU and cache configuration. Lastly, some minor changes are expected due to the activation cleanup of the CPUs.
2014-09-20 23:18:53 +02:00
system.ruby.l1_cntrl2.cacheMemory.demand_hits 0 # Number of cache demand hits
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.l1_cntrl2.cacheMemory.demand_misses 78168 # Number of cache demand misses
system.ruby.l1_cntrl2.cacheMemory.demand_accesses 78168 # Number of cache demand accesses
stats: Bump stats for filter, crossbar and config changes This patch bumps the stats to reflect the addition of the snoop filter and snoop stats, the change from bus to crossbar, and the updates to the ARM regressions that are now using a different CPU and cache configuration. Lastly, some minor changes are expected due to the activation cleanup of the CPUs.
2014-09-20 23:18:53 +02:00
system.ruby.l1_cntrl3.cacheMemory.demand_hits 0 # Number of cache demand hits
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.l1_cntrl3.cacheMemory.demand_misses 78501 # Number of cache demand misses
system.ruby.l1_cntrl3.cacheMemory.demand_accesses 78501 # Number of cache demand accesses
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.ruby.l1_cntrl4.cacheMemory.demand_hits 0 # Number of cache demand hits
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.l1_cntrl4.cacheMemory.demand_misses 78224 # Number of cache demand misses
system.ruby.l1_cntrl4.cacheMemory.demand_accesses 78224 # Number of cache demand accesses
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.ruby.l1_cntrl5.cacheMemory.demand_hits 0 # Number of cache demand hits
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.l1_cntrl5.cacheMemory.demand_misses 78367 # Number of cache demand misses
system.ruby.l1_cntrl5.cacheMemory.demand_accesses 78367 # Number of cache demand accesses
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.ruby.l1_cntrl6.cacheMemory.demand_hits 0 # Number of cache demand hits
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.l1_cntrl6.cacheMemory.demand_misses 78095 # Number of cache demand misses
system.ruby.l1_cntrl6.cacheMemory.demand_accesses 78095 # Number of cache demand accesses
stats: Bump stats for decoder, TLB, prefetcher and DRAM changes Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.
2014-12-23 15:31:20 +01:00
system.ruby.l1_cntrl7.cacheMemory.demand_hits 0 # Number of cache demand hits
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.l1_cntrl7.cacheMemory.demand_misses 78258 # Number of cache demand misses
system.ruby.l1_cntrl7.cacheMemory.demand_accesses 78258 # Number of cache demand accesses
stats: update stats for cache occupancy and clock domain changes
2014-01-24 22:29:33 +01:00
system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.network.routers0.percent_links_utilized 5.185365
system.ruby.network.routers0.msg_count.Control::2 78125
system.ruby.network.routers0.msg_count.Data::2 77570
system.ruby.network.routers0.msg_count.Response_Data::4 79137
system.ruby.network.routers0.msg_count.Writeback_Control::3 78585
system.ruby.network.routers0.msg_bytes.Control::2 625000
system.ruby.network.routers0.msg_bytes.Data::2 5585040
system.ruby.network.routers0.msg_bytes.Response_Data::4 5697864
system.ruby.network.routers0.msg_bytes.Writeback_Control::3 628680
system.ruby.network.routers1.percent_links_utilized 5.183506
system.ruby.network.routers1.msg_count.Control::2 78092
system.ruby.network.routers1.msg_count.Data::2 77517
system.ruby.network.routers1.msg_count.Response_Data::4 79134
system.ruby.network.routers1.msg_count.Writeback_Control::3 78560
system.ruby.network.routers1.msg_bytes.Control::2 624736
system.ruby.network.routers1.msg_bytes.Data::2 5581224
system.ruby.network.routers1.msg_bytes.Response_Data::4 5697648
system.ruby.network.routers1.msg_bytes.Writeback_Control::3 628480
system.ruby.network.routers2.percent_links_utilized 5.188578
system.ruby.network.routers2.msg_count.Control::2 78168
system.ruby.network.routers2.msg_count.Data::2 77620
system.ruby.network.routers2.msg_count.Response_Data::4 79184
system.ruby.network.routers2.msg_count.Writeback_Control::3 78640
system.ruby.network.routers2.msg_bytes.Control::2 625344
system.ruby.network.routers2.msg_bytes.Data::2 5588640
system.ruby.network.routers2.msg_bytes.Response_Data::4 5701248
system.ruby.network.routers2.msg_bytes.Writeback_Control::3 629120
system.ruby.network.routers3.percent_links_utilized 5.211370
system.ruby.network.routers3.msg_count.Control::2 78501
system.ruby.network.routers3.msg_count.Data::2 77919
system.ruby.network.routers3.msg_count.Response_Data::4 79574
system.ruby.network.routers3.msg_count.Writeback_Control::3 78994
system.ruby.network.routers3.msg_bytes.Control::2 628008
system.ruby.network.routers3.msg_bytes.Data::2 5610168
system.ruby.network.routers3.msg_bytes.Response_Data::4 5729328
system.ruby.network.routers3.msg_bytes.Writeback_Control::3 631952
system.ruby.network.routers4.percent_links_utilized 5.192410
system.ruby.network.routers4.msg_count.Control::2 78224
system.ruby.network.routers4.msg_count.Data::2 77649
system.ruby.network.routers4.msg_count.Response_Data::4 79271
system.ruby.network.routers4.msg_count.Writeback_Control::3 78698
system.ruby.network.routers4.msg_bytes.Control::2 625792
system.ruby.network.routers4.msg_bytes.Data::2 5590728
system.ruby.network.routers4.msg_bytes.Response_Data::4 5707512
system.ruby.network.routers4.msg_bytes.Writeback_Control::3 629584
system.ruby.network.routers5.percent_links_utilized 5.202986
system.ruby.network.routers5.msg_count.Control::2 78366
system.ruby.network.routers5.msg_count.Data::2 77813
system.ruby.network.routers5.msg_count.Response_Data::4 79427
system.ruby.network.routers5.msg_count.Writeback_Control::3 78875
system.ruby.network.routers5.msg_bytes.Control::2 626928
system.ruby.network.routers5.msg_bytes.Data::2 5602536
system.ruby.network.routers5.msg_bytes.Response_Data::4 5718744
system.ruby.network.routers5.msg_bytes.Writeback_Control::3 631000
system.ruby.network.routers6.percent_links_utilized 5.183810
system.ruby.network.routers6.msg_count.Control::2 78095
system.ruby.network.routers6.msg_count.Data::2 77543
system.ruby.network.routers6.msg_count.Response_Data::4 79117
system.ruby.network.routers6.msg_count.Writeback_Control::3 78568
system.ruby.network.routers6.msg_bytes.Control::2 624760
system.ruby.network.routers6.msg_bytes.Data::2 5583096
system.ruby.network.routers6.msg_bytes.Response_Data::4 5696424
system.ruby.network.routers6.msg_bytes.Writeback_Control::3 628544
system.ruby.network.routers7.percent_links_utilized 5.195587
system.ruby.network.routers7.msg_count.Control::2 78258
system.ruby.network.routers7.msg_count.Data::2 77722
system.ruby.network.routers7.msg_count.Response_Data::4 79294
system.ruby.network.routers7.msg_count.Writeback_Control::3 78760
system.ruby.network.routers7.msg_bytes.Control::2 626064
system.ruby.network.routers7.msg_bytes.Data::2 5595984
system.ruby.network.routers7.msg_bytes.Response_Data::4 5709168
system.ruby.network.routers7.msg_bytes.Writeback_Control::3 630080
system.ruby.network.routers8.percent_links_utilized 41.047495
system.ruby.network.routers8.msg_count.Control::2 625829
system.ruby.network.routers8.msg_count.Data::2 621353
system.ruby.network.routers8.msg_count.Response_Data::4 617479
system.ruby.network.routers8.msg_count.Writeback_Control::3 629681
system.ruby.network.routers8.msg_bytes.Control::2 5006632
system.ruby.network.routers8.msg_bytes.Data::2 44737416
system.ruby.network.routers8.msg_bytes.Response_Data::4 44458488
system.ruby.network.routers8.msg_bytes.Writeback_Control::3 5037448
system.ruby.network.routers9.percent_links_utilized 9.176790
system.ruby.network.routers9.msg_count.Control::2 625829
system.ruby.network.routers9.msg_count.Data::2 621353
system.ruby.network.routers9.msg_count.Response_Data::4 625808
system.ruby.network.routers9.msg_count.Writeback_Control::3 629681
system.ruby.network.routers9.msg_bytes.Control::2 5006632
system.ruby.network.routers9.msg_bytes.Data::2 44737416
system.ruby.network.routers9.msg_bytes.Response_Data::4 45058176
system.ruby.network.routers9.msg_bytes.Writeback_Control::3 5037448
system.ruby.network.msg_count.Control 1877487
system.ruby.network.msg_count.Data 1864059
system.ruby.network.msg_count.Response_Data 1877425
system.ruby.network.msg_count.Writeback_Control 1889042
system.ruby.network.msg_byte.Control 15019896
system.ruby.network.msg_byte.Data 134212248
system.ruby.network.msg_byte.Response_Data 135174600
system.ruby.network.msg_byte.Writeback_Control 15112336
system.ruby.network.routers0.throttle0.link_utilization 5.173099
system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 78122
system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 78585
system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 5624784
system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 628680
system.ruby.network.routers0.throttle1.link_utilization 5.197632
system.ruby.network.routers0.throttle1.msg_count.Control::2 78125
system.ruby.network.routers0.throttle1.msg_count.Data::2 77570
system.ruby.network.routers0.throttle1.msg_count.Response_Data::4 1015
system.ruby.network.routers0.throttle1.msg_bytes.Control::2 625000
system.ruby.network.routers0.throttle1.msg_bytes.Data::2 5585040
system.ruby.network.routers0.throttle1.msg_bytes.Response_Data::4 73080
system.ruby.network.routers1.throttle0.link_utilization 5.171087
system.ruby.network.routers1.throttle0.msg_count.Response_Data::4 78091
system.ruby.network.routers1.throttle0.msg_count.Writeback_Control::3 78560
system.ruby.network.routers1.throttle0.msg_bytes.Response_Data::4 5622552
system.ruby.network.routers1.throttle0.msg_bytes.Writeback_Control::3 628480
system.ruby.network.routers1.throttle1.link_utilization 5.195924
system.ruby.network.routers1.throttle1.msg_count.Control::2 78092
system.ruby.network.routers1.throttle1.msg_count.Data::2 77517
system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1043
system.ruby.network.routers1.throttle1.msg_bytes.Control::2 624736
system.ruby.network.routers1.throttle1.msg_bytes.Data::2 5581224
system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 75096
system.ruby.network.routers2.throttle0.link_utilization 5.175965
system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 78164
system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 78640
system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 5627808
system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 629120
system.ruby.network.routers2.throttle1.link_utilization 5.201192
system.ruby.network.routers2.throttle1.msg_count.Control::2 78168
system.ruby.network.routers2.throttle1.msg_count.Data::2 77620
system.ruby.network.routers2.throttle1.msg_count.Response_Data::4 1020
system.ruby.network.routers2.throttle1.msg_bytes.Control::2 625344
system.ruby.network.routers2.throttle1.msg_bytes.Data::2 5588640
system.ruby.network.routers2.throttle1.msg_bytes.Response_Data::4 73440
system.ruby.network.routers3.throttle0.link_utilization 5.198141
system.ruby.network.routers3.throttle0.msg_count.Response_Data::4 78497
system.ruby.network.routers3.throttle0.msg_count.Writeback_Control::3 78994
system.ruby.network.routers3.throttle0.msg_bytes.Response_Data::4 5651784
system.ruby.network.routers3.throttle0.msg_bytes.Writeback_Control::3 631952
system.ruby.network.routers3.throttle1.link_utilization 5.224600
system.ruby.network.routers3.throttle1.msg_count.Control::2 78501
system.ruby.network.routers3.throttle1.msg_count.Data::2 77919
system.ruby.network.routers3.throttle1.msg_count.Response_Data::4 1077
system.ruby.network.routers3.throttle1.msg_bytes.Control::2 628008
system.ruby.network.routers3.throttle1.msg_bytes.Data::2 5610168
system.ruby.network.routers3.throttle1.msg_bytes.Response_Data::4 77544
system.ruby.network.routers4.throttle0.link_utilization 5.179743
system.ruby.network.routers4.throttle0.msg_count.Response_Data::4 78221
system.ruby.network.routers4.throttle0.msg_count.Writeback_Control::3 78698
system.ruby.network.routers4.throttle0.msg_bytes.Response_Data::4 5631912
system.ruby.network.routers4.throttle0.msg_bytes.Writeback_Control::3 629584
system.ruby.network.routers4.throttle1.link_utilization 5.205077
system.ruby.network.routers4.throttle1.msg_count.Control::2 78224
system.ruby.network.routers4.throttle1.msg_count.Data::2 77649
system.ruby.network.routers4.throttle1.msg_count.Response_Data::4 1050
system.ruby.network.routers4.throttle1.msg_bytes.Control::2 625792
system.ruby.network.routers4.throttle1.msg_bytes.Data::2 5590728
system.ruby.network.routers4.throttle1.msg_bytes.Response_Data::4 75600
system.ruby.network.routers5.throttle0.link_utilization 5.189472
system.ruby.network.routers5.throttle0.msg_count.Response_Data::4 78365
system.ruby.network.routers5.throttle0.msg_count.Writeback_Control::3 78875
system.ruby.network.routers5.throttle0.msg_bytes.Response_Data::4 5642280
system.ruby.network.routers5.throttle0.msg_bytes.Writeback_Control::3 631000
system.ruby.network.routers5.throttle1.link_utilization 5.216499
system.ruby.network.routers5.throttle1.msg_count.Control::2 78366
system.ruby.network.routers5.throttle1.msg_count.Data::2 77813
system.ruby.network.routers5.throttle1.msg_count.Response_Data::4 1062
system.ruby.network.routers5.throttle1.msg_bytes.Control::2 626928
system.ruby.network.routers5.throttle1.msg_bytes.Data::2 5602536
system.ruby.network.routers5.throttle1.msg_bytes.Response_Data::4 76464
system.ruby.network.routers6.throttle0.link_utilization 5.171200
system.ruby.network.routers6.throttle0.msg_count.Response_Data::4 78092
system.ruby.network.routers6.throttle0.msg_count.Writeback_Control::3 78568
system.ruby.network.routers6.throttle0.msg_bytes.Response_Data::4 5622624
system.ruby.network.routers6.throttle0.msg_bytes.Writeback_Control::3 628544
system.ruby.network.routers6.throttle1.link_utilization 5.196421
system.ruby.network.routers6.throttle1.msg_count.Control::2 78095
system.ruby.network.routers6.throttle1.msg_count.Data::2 77543
system.ruby.network.routers6.throttle1.msg_count.Response_Data::4 1025
system.ruby.network.routers6.throttle1.msg_bytes.Control::2 624760
system.ruby.network.routers6.throttle1.msg_bytes.Data::2 5583096
system.ruby.network.routers6.throttle1.msg_bytes.Response_Data::4 73800
system.ruby.network.routers7.throttle0.link_utilization 5.182238
system.ruby.network.routers7.throttle0.msg_count.Response_Data::4 78256
system.ruby.network.routers7.throttle0.msg_count.Writeback_Control::3 78760
system.ruby.network.routers7.throttle0.msg_bytes.Response_Data::4 5634432
system.ruby.network.routers7.throttle0.msg_bytes.Writeback_Control::3 630080
system.ruby.network.routers7.throttle1.link_utilization 5.208935
system.ruby.network.routers7.throttle1.msg_count.Control::2 78258
system.ruby.network.routers7.throttle1.msg_count.Data::2 77722
system.ruby.network.routers7.throttle1.msg_count.Response_Data::4 1038
system.ruby.network.routers7.throttle1.msg_bytes.Control::2 626064
system.ruby.network.routers7.throttle1.msg_bytes.Data::2 5595984
system.ruby.network.routers7.throttle1.msg_bytes.Response_Data::4 74736
system.ruby.network.routers8.throttle0.link_utilization 41.150135
system.ruby.network.routers8.throttle0.msg_count.Control::2 625829
system.ruby.network.routers8.throttle0.msg_count.Data::2 621353
system.ruby.network.routers8.throttle0.msg_bytes.Control::2 5006632
system.ruby.network.routers8.throttle0.msg_bytes.Data::2 44737416
system.ruby.network.routers8.throttle1.link_utilization 40.944855
system.ruby.network.routers8.throttle1.msg_count.Response_Data::4 617479
system.ruby.network.routers8.throttle1.msg_count.Writeback_Control::3 629681
system.ruby.network.routers8.throttle1.msg_bytes.Response_Data::4 44458488
system.ruby.network.routers8.throttle1.msg_bytes.Writeback_Control::3 5037448
system.ruby.network.routers9.throttle0.link_utilization 5.173099
system.ruby.network.routers9.throttle0.msg_count.Response_Data::4 78122
system.ruby.network.routers9.throttle0.msg_count.Writeback_Control::3 78585
system.ruby.network.routers9.throttle0.msg_bytes.Response_Data::4 5624784
system.ruby.network.routers9.throttle0.msg_bytes.Writeback_Control::3 628680
system.ruby.network.routers9.throttle1.link_utilization 5.171087
system.ruby.network.routers9.throttle1.msg_count.Response_Data::4 78091
system.ruby.network.routers9.throttle1.msg_count.Writeback_Control::3 78560
system.ruby.network.routers9.throttle1.msg_bytes.Response_Data::4 5622552
system.ruby.network.routers9.throttle1.msg_bytes.Writeback_Control::3 628480
system.ruby.network.routers9.throttle2.link_utilization 5.175965
system.ruby.network.routers9.throttle2.msg_count.Response_Data::4 78164
system.ruby.network.routers9.throttle2.msg_count.Writeback_Control::3 78640
system.ruby.network.routers9.throttle2.msg_bytes.Response_Data::4 5627808
system.ruby.network.routers9.throttle2.msg_bytes.Writeback_Control::3 629120
system.ruby.network.routers9.throttle3.link_utilization 5.198148
system.ruby.network.routers9.throttle3.msg_count.Response_Data::4 78497
system.ruby.network.routers9.throttle3.msg_count.Writeback_Control::3 78995
system.ruby.network.routers9.throttle3.msg_bytes.Response_Data::4 5651784
system.ruby.network.routers9.throttle3.msg_bytes.Writeback_Control::3 631960
system.ruby.network.routers9.throttle4.link_utilization 5.179743
system.ruby.network.routers9.throttle4.msg_count.Response_Data::4 78221
system.ruby.network.routers9.throttle4.msg_count.Writeback_Control::3 78698
system.ruby.network.routers9.throttle4.msg_bytes.Response_Data::4 5631912
system.ruby.network.routers9.throttle4.msg_bytes.Writeback_Control::3 629584
system.ruby.network.routers9.throttle5.link_utilization 5.189492
system.ruby.network.routers9.throttle5.msg_count.Response_Data::4 78365
system.ruby.network.routers9.throttle5.msg_count.Writeback_Control::3 78875
system.ruby.network.routers9.throttle5.msg_bytes.Response_Data::4 5642280
system.ruby.network.routers9.throttle5.msg_bytes.Writeback_Control::3 631000
system.ruby.network.routers9.throttle6.link_utilization 5.171200
system.ruby.network.routers9.throttle6.msg_count.Response_Data::4 78092
system.ruby.network.routers9.throttle6.msg_count.Writeback_Control::3 78568
system.ruby.network.routers9.throttle6.msg_bytes.Response_Data::4 5622624
system.ruby.network.routers9.throttle6.msg_bytes.Writeback_Control::3 628544
system.ruby.network.routers9.throttle7.link_utilization 5.182238
system.ruby.network.routers9.throttle7.msg_count.Response_Data::4 78256
system.ruby.network.routers9.throttle7.msg_count.Writeback_Control::3 78760
system.ruby.network.routers9.throttle7.msg_bytes.Response_Data::4 5634432
system.ruby.network.routers9.throttle7.msg_bytes.Writeback_Control::3 630080
system.ruby.network.routers9.throttle8.link_utilization 41.150135
system.ruby.network.routers9.throttle8.msg_count.Control::2 625829
system.ruby.network.routers9.throttle8.msg_count.Data::2 621353
system.ruby.network.routers9.throttle8.msg_bytes.Control::2 5006632
system.ruby.network.routers9.throttle8.msg_bytes.Data::2 44737416
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.delayVCHist.vnet_1::bucket_size 4 # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1::max_bucket 39 # delay histogram for vnet_1
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.delayVCHist.vnet_1::samples 625808 # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1::mean 0.264720 # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1::stdev 1.304410 # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1 | 600768 96.00% 96.00% | 18387 2.94% 98.94% | 5734 0.92% 99.85% | 745 0.12% 99.97% | 149 0.02% 100.00% | 19 0.00% 100.00% | 5 0.00% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1
system.ruby.delayVCHist.vnet_1::total 625808 # delay histogram for vnet_1
stats: updates due to changes to ruby
2014-11-06 12:42:21 +01:00
system.ruby.delayVCHist.vnet_2::bucket_size 32 # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2::max_bucket 319 # delay histogram for vnet_2
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.delayVCHist.vnet_2::samples 629680 # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2::mean 4.062621 # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2::stdev 10.310093 # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2 | 612866 97.33% 97.33% | 10648 1.69% 99.02% | 5547 0.88% 99.90% | 516 0.08% 99.98% | 82 0.01% 100.00% | 21 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2
system.ruby.delayVCHist.vnet_2::total 629680 # delay histogram for vnet_2
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.LD.latency_hist::bucket_size 512
system.ruby.LD.latency_hist::max_bucket 5119
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.LD.latency_hist::samples 403166
system.ruby.LD.latency_hist::mean 1544.913271
system.ruby.LD.latency_hist::gmean 1522.275613
system.ruby.LD.latency_hist::stdev 264.561950
system.ruby.LD.latency_hist | 54 0.01% 0.01% | 5301 1.31% 1.33% | 203466 50.47% 51.80% | 178892 44.37% 96.17% | 15319 3.80% 99.97% | 134 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.latency_hist::total 403166
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.LD.miss_latency_hist::bucket_size 512
system.ruby.LD.miss_latency_hist::max_bucket 5119
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.LD.miss_latency_hist::samples 403166
system.ruby.LD.miss_latency_hist::mean 1544.913271
system.ruby.LD.miss_latency_hist::gmean 1522.275613
system.ruby.LD.miss_latency_hist::stdev 264.561950
system.ruby.LD.miss_latency_hist | 54 0.01% 0.01% | 5301 1.31% 1.33% | 203466 50.47% 51.80% | 178892 44.37% 96.17% | 15319 3.80% 99.97% | 134 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.miss_latency_hist::total 403166
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.ST.latency_hist::bucket_size 512
system.ruby.ST.latency_hist::max_bucket 5119
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.ST.latency_hist::samples 222642
system.ruby.ST.latency_hist::mean 1545.557276
system.ruby.ST.latency_hist::gmean 1523.054587
system.ruby.ST.latency_hist::stdev 263.959637
system.ruby.ST.latency_hist | 26 0.01% 0.01% | 2830 1.27% 1.28% | 112233 50.41% 51.69% | 99092 44.51% 96.20% | 8397 3.77% 99.97% | 64 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.ST.latency_hist::total 222642
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.ST.miss_latency_hist::bucket_size 512
system.ruby.ST.miss_latency_hist::max_bucket 5119
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.ST.miss_latency_hist::samples 222642
system.ruby.ST.miss_latency_hist::mean 1545.557276
system.ruby.ST.miss_latency_hist::gmean 1523.054587
system.ruby.ST.miss_latency_hist::stdev 263.959637
system.ruby.ST.miss_latency_hist | 26 0.01% 0.01% | 2830 1.27% 1.28% | 112233 50.41% 51.69% | 99092 44.51% 96.20% | 8397 3.77% 99.97% | 64 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.ST.miss_latency_hist::total 222642
system.ruby.L1Cache.miss_mach_latency_hist::bucket_size 256
system.ruby.L1Cache.miss_mach_latency_hist::max_bucket 2559
system.ruby.L1Cache.miss_mach_latency_hist::samples 8330
system.ruby.L1Cache.miss_mach_latency_hist::mean 1434.603121
system.ruby.L1Cache.miss_mach_latency_hist::gmean 1410.421846
system.ruby.L1Cache.miss_mach_latency_hist::stdev 264.603090
system.ruby.L1Cache.miss_mach_latency_hist | 0 0.00% 0.00% | 1 0.01% 0.01% | 5 0.06% 0.07% | 356 4.27% 4.35% | 2133 25.61% 29.95% | 3056 36.69% 66.64% | 1973 23.69% 90.32% | 656 7.88% 98.20% | 135 1.62% 99.82% | 15 0.18% 100.00%
system.ruby.L1Cache.miss_mach_latency_hist::total 8330
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.Directory.miss_mach_latency_hist::bucket_size 512
system.ruby.Directory.miss_mach_latency_hist::max_bucket 5119
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.Directory.miss_mach_latency_hist::samples 617478
system.ruby.Directory.miss_mach_latency_hist::mean 1546.633602
system.ruby.Directory.miss_mach_latency_hist::gmean 1524.124795
system.ruby.Directory.miss_mach_latency_hist::stdev 264.028380
system.ruby.Directory.miss_mach_latency_hist | 79 0.01% 0.01% | 7770 1.26% 1.27% | 310510 50.29% 51.56% | 275355 44.59% 96.15% | 23566 3.82% 99.97% | 198 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.Directory.miss_mach_latency_hist::total 617478
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.Directory.miss_latency_hist.issue_to_initial_request::bucket_size 1
system.ruby.Directory.miss_latency_hist.issue_to_initial_request::max_bucket 9
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.Directory.miss_latency_hist.issue_to_initial_request::samples 3
system.ruby.Directory.miss_latency_hist.issue_to_initial_request | 3 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.Directory.miss_latency_hist.issue_to_initial_request::total 3
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.Directory.miss_latency_hist.initial_to_forward::bucket_size 1
system.ruby.Directory.miss_latency_hist.initial_to_forward::max_bucket 9
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.Directory.miss_latency_hist.initial_to_forward::samples 3
system.ruby.Directory.miss_latency_hist.initial_to_forward | 3 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.Directory.miss_latency_hist.initial_to_forward::total 3
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.Directory.miss_latency_hist.forward_to_first_response::bucket_size 1
system.ruby.Directory.miss_latency_hist.forward_to_first_response::max_bucket 9
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.Directory.miss_latency_hist.forward_to_first_response::samples 3
system.ruby.Directory.miss_latency_hist.forward_to_first_response | 3 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.Directory.miss_latency_hist.forward_to_first_response::total 3
stats: Update stats for CPU and cache changes This patch updates the stats to reflect the fixes and changes to the CPU (mainly the o3), and the caches.
2014-09-03 13:42:59 +02:00
system.ruby.Directory.miss_latency_hist.first_response_to_completion::bucket_size 16
system.ruby.Directory.miss_latency_hist.first_response_to_completion::max_bucket 159
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.Directory.miss_latency_hist.first_response_to_completion::samples 3
system.ruby.Directory.miss_latency_hist.first_response_to_completion::mean 80
system.ruby.Directory.miss_latency_hist.first_response_to_completion::gmean 79.895697
system.ruby.Directory.miss_latency_hist.first_response_to_completion::stdev 5
system.ruby.Directory.miss_latency_hist.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 33.33% 33.33% | 2 66.67% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.Directory.miss_latency_hist.first_response_to_completion::total 3
system.ruby.LD.L1Cache.miss_type_mach_latency_hist::bucket_size 256
system.ruby.LD.L1Cache.miss_type_mach_latency_hist::max_bucket 2559
system.ruby.LD.L1Cache.miss_type_mach_latency_hist::samples 5325
system.ruby.LD.L1Cache.miss_type_mach_latency_hist::mean 1437.811643
system.ruby.LD.L1Cache.miss_type_mach_latency_hist::gmean 1413.385470
system.ruby.LD.L1Cache.miss_type_mach_latency_hist::stdev 266.536201
system.ruby.LD.L1Cache.miss_type_mach_latency_hist | 0 0.00% 0.00% | 1 0.02% 0.02% | 2 0.04% 0.06% | 221 4.15% 4.21% | 1362 25.58% 29.78% | 1962 36.85% 66.63% | 1238 23.25% 89.88% | 433 8.13% 98.01% | 97 1.82% 99.83% | 9 0.17% 100.00%
system.ruby.LD.L1Cache.miss_type_mach_latency_hist::total 5325
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.LD.Directory.miss_type_mach_latency_hist::bucket_size 512
system.ruby.LD.Directory.miss_type_mach_latency_hist::max_bucket 5119
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.LD.Directory.miss_type_mach_latency_hist::samples 397841
system.ruby.LD.Directory.miss_type_mach_latency_hist::mean 1546.346799
system.ruby.LD.Directory.miss_type_mach_latency_hist::gmean 1523.788586
system.ruby.LD.Directory.miss_type_mach_latency_hist::stdev 264.241520
system.ruby.LD.Directory.miss_type_mach_latency_hist | 53 0.01% 0.01% | 5078 1.28% 1.29% | 200142 50.31% 51.60% | 177221 44.55% 96.14% | 15213 3.82% 99.97% | 134 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.LD.Directory.miss_type_mach_latency_hist::total 397841
system.ruby.ST.L1Cache.miss_type_mach_latency_hist::bucket_size 256
system.ruby.ST.L1Cache.miss_type_mach_latency_hist::max_bucket 2559
system.ruby.ST.L1Cache.miss_type_mach_latency_hist::samples 3005
system.ruby.ST.L1Cache.miss_type_mach_latency_hist::mean 1428.917471
system.ruby.ST.L1Cache.miss_type_mach_latency_hist::gmean 1405.185421
system.ruby.ST.L1Cache.miss_type_mach_latency_hist::stdev 261.089644
system.ruby.ST.L1Cache.miss_type_mach_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 3 0.10% 0.10% | 135 4.49% 4.59% | 771 25.66% 30.25% | 1094 36.41% 66.66% | 735 24.46% 91.11% | 223 7.42% 98.54% | 38 1.26% 99.80% | 6 0.20% 100.00%
system.ruby.ST.L1Cache.miss_type_mach_latency_hist::total 3005
stats: updates due to changes to ruby
2014-01-10 23:19:58 +01:00
system.ruby.ST.Directory.miss_type_mach_latency_hist::bucket_size 512
system.ruby.ST.Directory.miss_type_mach_latency_hist::max_bucket 5119
stats: Bump the MemTest regression stats Reflect changes in the tester behaviour.
2015-02-11 16:23:31 +01:00
system.ruby.ST.Directory.miss_type_mach_latency_hist::samples 219637
system.ruby.ST.Directory.miss_type_mach_latency_hist::mean 1547.153103
system.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 1524.733978
system.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 263.641675
system.ruby.ST.Directory.miss_type_mach_latency_hist | 26 0.01% 0.01% | 2692 1.23% 1.24% | 110368 50.25% 51.49% | 98134 44.68% 96.17% | 8353 3.80% 99.97% | 64 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
system.ruby.ST.Directory.miss_type_mach_latency_hist::total 219637
system.ruby.Directory_Controller.GETX 689360 0.00% 0.00%
system.ruby.Directory_Controller.PUTX 617467 0.00% 0.00%
system.ruby.Directory_Controller.PUTX_NotOwner 3886 0.00% 0.00%
system.ruby.Directory_Controller.Memory_Data 617479 0.00% 0.00%
system.ruby.Directory_Controller.Memory_Ack 617466 0.00% 0.00%
system.ruby.Directory_Controller.I.GETX 617498 0.00% 0.00%
system.ruby.Directory_Controller.M.GETX 8330 0.00% 0.00%
system.ruby.Directory_Controller.M.PUTX 617467 0.00% 0.00%
system.ruby.Directory_Controller.M.PUTX_NotOwner 3886 0.00% 0.00%
system.ruby.Directory_Controller.IM.GETX 63241 0.00% 0.00%
system.ruby.Directory_Controller.IM.Memory_Data 617479 0.00% 0.00%
system.ruby.Directory_Controller.MI.GETX 291 0.00% 0.00%
system.ruby.Directory_Controller.MI.Memory_Ack 617466 0.00% 0.00%
system.ruby.L1Cache_Controller.Load | 50298 12.48% 12.48% | 50313 12.48% 24.95% | 50604 12.55% 37.51% | 50559 12.54% 50.05% | 50335 12.48% 62.53% | 50365 12.49% 75.02% | 50340 12.49% 87.51% | 50369 12.49% 100.00%
system.ruby.L1Cache_Controller.Load::total 403183
system.ruby.L1Cache_Controller.Store | 27827 12.50% 12.50% | 27779 12.48% 24.97% | 27564 12.38% 37.36% | 27942 12.55% 49.91% | 27889 12.53% 62.43% | 28002 12.58% 75.01% | 27755 12.47% 87.47% | 27889 12.53% 100.00%
system.ruby.L1Cache_Controller.Store::total 222647
system.ruby.L1Cache_Controller.Data | 78122 12.48% 12.48% | 78091 12.48% 24.96% | 78164 12.49% 37.45% | 78497 12.54% 50.00% | 78221 12.50% 62.49% | 78365 12.52% 75.02% | 78092 12.48% 87.50% | 78256 12.50% 100.00%
system.ruby.L1Cache_Controller.Data::total 625808
system.ruby.L1Cache_Controller.Fwd_GETX | 1015 12.18% 12.18% | 1043 12.52% 24.71% | 1020 12.24% 36.95% | 1077 12.93% 49.88% | 1050 12.61% 62.48% | 1062 12.75% 75.23% | 1025 12.30% 87.54% | 1038 12.46% 100.00%
system.ruby.L1Cache_Controller.Fwd_GETX::total 8330
system.ruby.L1Cache_Controller.Replacement | 78121 12.48% 12.48% | 78088 12.48% 24.96% | 78164 12.49% 37.45% | 78497 12.54% 50.00% | 78220 12.50% 62.49% | 78363 12.52% 75.02% | 78091 12.48% 87.50% | 78254 12.50% 100.00%
system.ruby.L1Cache_Controller.Replacement::total 625798
system.ruby.L1Cache_Controller.Writeback_Ack | 77106 12.49% 12.49% | 77045 12.48% 24.97% | 77144 12.49% 37.46% | 77418 12.54% 50.00% | 77169 12.50% 62.49% | 77300 12.52% 75.01% | 77066 12.48% 87.49% | 77216 12.51% 100.00%
system.ruby.L1Cache_Controller.Writeback_Ack::total 617464
system.ruby.L1Cache_Controller.Writeback_Nack | 464 11.94% 11.94% | 472 12.15% 24.09% | 476 12.25% 36.34% | 499 12.84% 49.18% | 479 12.33% 61.50% | 513 13.20% 74.70% | 477 12.27% 86.98% | 506 13.02% 100.00%
system.ruby.L1Cache_Controller.Writeback_Nack::total 3886
system.ruby.L1Cache_Controller.I.Load | 50298 12.48% 12.48% | 50313 12.48% 24.95% | 50604 12.55% 37.51% | 50559 12.54% 50.05% | 50335 12.48% 62.53% | 50365 12.49% 75.02% | 50340 12.49% 87.51% | 50369 12.49% 100.00%
system.ruby.L1Cache_Controller.I.Load::total 403183
system.ruby.L1Cache_Controller.I.Store | 27827 12.50% 12.50% | 27779 12.48% 24.97% | 27564 12.38% 37.36% | 27942 12.55% 49.91% | 27889 12.53% 62.43% | 28002 12.58% 75.01% | 27755 12.47% 87.47% | 27889 12.53% 100.00%
system.ruby.L1Cache_Controller.I.Store::total 222647
system.ruby.L1Cache_Controller.I.Replacement | 551 12.40% 12.40% | 571 12.85% 25.25% | 544 12.24% 37.49% | 578 13.01% 50.50% | 571 12.85% 63.34% | 549 12.35% 75.70% | 548 12.33% 88.03% | 532 11.97% 100.00%
system.ruby.L1Cache_Controller.I.Replacement::total 4444
system.ruby.L1Cache_Controller.II.Writeback_Nack | 464 11.94% 11.94% | 472 12.15% 24.09% | 476 12.25% 36.34% | 499 12.84% 49.18% | 479 12.33% 61.50% | 513 13.20% 74.70% | 477 12.27% 86.98% | 506 13.02% 100.00%
system.ruby.L1Cache_Controller.II.Writeback_Nack::total 3886
system.ruby.L1Cache_Controller.M.Fwd_GETX | 551 12.40% 12.40% | 571 12.85% 25.25% | 544 12.24% 37.49% | 578 13.01% 50.50% | 571 12.85% 63.34% | 549 12.35% 75.70% | 548 12.33% 88.03% | 532 11.97% 100.00%
system.ruby.L1Cache_Controller.M.Fwd_GETX::total 4444
system.ruby.L1Cache_Controller.M.Replacement | 77570 12.48% 12.48% | 77517 12.48% 24.96% | 77620 12.49% 37.45% | 77919 12.54% 49.99% | 77649 12.50% 62.49% | 77814 12.52% 75.01% | 77543 12.48% 87.49% | 77722 12.51% 100.00%
system.ruby.L1Cache_Controller.M.Replacement::total 621354
system.ruby.L1Cache_Controller.MI.Fwd_GETX | 464 11.94% 11.94% | 472 12.15% 24.09% | 476 12.25% 36.34% | 499 12.84% 49.18% | 479 12.33% 61.50% | 513 13.20% 74.70% | 477 12.27% 86.98% | 506 13.02% 100.00%
system.ruby.L1Cache_Controller.MI.Fwd_GETX::total 3886
system.ruby.L1Cache_Controller.MI.Writeback_Ack | 77106 12.49% 12.49% | 77045 12.48% 24.97% | 77144 12.49% 37.46% | 77418 12.54% 50.00% | 77169 12.50% 62.49% | 77300 12.52% 75.01% | 77066 12.48% 87.49% | 77216 12.51% 100.00%
system.ruby.L1Cache_Controller.MI.Writeback_Ack::total 617464
system.ruby.L1Cache_Controller.IS.Data | 50296 12.48% 12.48% | 50312 12.48% 24.95% | 50601 12.55% 37.51% | 50556 12.54% 50.05% | 50332 12.48% 62.53% | 50363 12.49% 75.02% | 50339 12.49% 87.51% | 50367 12.49% 100.00%
system.ruby.L1Cache_Controller.IS.Data::total 403166
system.ruby.L1Cache_Controller.IM.Data | 27826 12.50% 12.50% | 27779 12.48% 24.98% | 27563 12.38% 37.36% | 27941 12.55% 49.90% | 27889 12.53% 62.43% | 28002 12.58% 75.01% | 27753 12.47% 87.47% | 27889 12.53% 100.00%
system.ruby.L1Cache_Controller.IM.Data::total 222642
ruby: Initial references for ruby regressions
2009-05-11 19:38:46 +02:00
---------- End Simulation Statistics ----------
Reference in a new issue Copy permalink