2006-01-31 18:12:49 +01:00
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/*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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2006-06-01 01:26:56 +02:00
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*
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* Authors: Ron Dreslinski
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* Steve Reinhardt
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* Ali Saidi
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2006-01-31 18:12:49 +01:00
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*/
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/**
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2006-08-15 01:25:07 +02:00
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* @file
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* Declaration of a request, the overall memory request consisting of
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2006-01-31 18:12:49 +01:00
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the parts of the request that are persistent throughout the transaction.
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*/
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#ifndef __MEM_REQUEST_HH__
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#define __MEM_REQUEST_HH__
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2007-06-21 19:50:35 +02:00
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#include "base/fast_alloc.hh"
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2006-08-15 11:07:15 +02:00
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#include "sim/host.hh"
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2007-03-06 20:13:43 +01:00
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#include "sim/core.hh"
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2006-02-15 20:21:09 +01:00
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2006-08-15 23:41:22 +02:00
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#include <cassert>
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2006-02-15 20:21:09 +01:00
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class Request;
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typedef Request* RequestPtr;
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2006-06-28 23:28:33 +02:00
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2006-11-29 23:11:10 +01:00
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/** ASI information for this request if it exsits. */
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const uint32_t ASI_BITS = 0x000FF;
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2006-02-15 20:53:02 +01:00
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/** The request is a Load locked/store conditional. */
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2006-11-29 23:11:10 +01:00
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const uint32_t LOCKED = 0x00100;
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2006-02-15 20:53:02 +01:00
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/** The virtual address is also the physical address. */
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2006-11-29 23:11:10 +01:00
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const uint32_t PHYSICAL = 0x00200;
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2006-02-15 20:53:02 +01:00
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/** The request is an ALPHA VPTE pal access (hw_ld). */
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2006-11-29 23:11:10 +01:00
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const uint32_t VPTE = 0x00400;
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2006-02-15 20:53:02 +01:00
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/** Use the alternate mode bits in ALPHA. */
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2006-11-29 23:11:10 +01:00
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const uint32_t ALTMODE = 0x00800;
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2006-02-15 20:53:02 +01:00
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/** The request is to an uncacheable address. */
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2006-11-29 23:11:10 +01:00
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const uint32_t UNCACHEABLE = 0x01000;
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2006-02-15 20:53:02 +01:00
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/** The request should not cause a page fault. */
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2006-11-29 23:11:10 +01:00
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const uint32_t NO_FAULT = 0x02000;
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2006-02-15 23:52:49 +01:00
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/** The request should be prefetched into the exclusive state. */
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2006-11-29 23:11:10 +01:00
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const uint32_t PF_EXCLUSIVE = 0x10000;
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2006-02-15 23:52:49 +01:00
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/** The request should be marked as LRU. */
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2006-11-29 23:11:10 +01:00
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const uint32_t EVICT_NEXT = 0x20000;
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2006-04-10 18:23:17 +02:00
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/** The request should ignore unaligned access faults */
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2006-11-29 23:11:10 +01:00
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const uint32_t NO_ALIGN_FAULT = 0x40000;
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2006-06-30 16:25:25 +02:00
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/** The request was an instruction read. */
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2006-11-29 23:11:10 +01:00
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const uint32_t INST_READ = 0x80000;
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2007-02-12 19:06:30 +01:00
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/** This request is for a memory swap. */
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const uint32_t MEM_SWAP = 0x100000;
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const uint32_t MEM_SWAP_COND = 0x200000;
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2006-02-15 20:53:02 +01:00
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2007-06-21 19:50:35 +02:00
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class Request : public FastAlloc
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2006-01-31 18:12:49 +01:00
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{
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private:
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2006-05-31 06:12:29 +02:00
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/**
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* The physical address of the request. Valid only if validPaddr
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* is set. */
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2006-01-31 18:12:49 +01:00
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Addr paddr;
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2006-05-31 06:12:29 +02:00
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/**
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* The size of the request. This field must be set when vaddr or
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* paddr is written via setVirt() or setPhys(), so it is always
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* valid as long as one of the address fields is valid. */
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2006-01-31 18:12:49 +01:00
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int size;
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2006-02-15 20:53:02 +01:00
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2006-04-07 21:54:48 +02:00
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/** Flag structure for the request. */
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2006-02-15 20:53:02 +01:00
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uint32_t flags;
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2006-01-31 20:20:39 +01:00
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2006-05-31 06:12:29 +02:00
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/**
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* The time this request was started. Used to calculate
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* latencies. This field is set to curTick any time paddr or vaddr
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* is written. */
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Tick time;
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2006-01-31 20:20:39 +01:00
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/** The address space ID. */
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int asid;
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2006-11-29 23:11:10 +01:00
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2006-11-23 07:42:57 +01:00
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/** This request is to a memory mapped register. */
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2006-11-29 23:11:10 +01:00
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bool mmapedIpr;
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2006-11-23 07:42:57 +01:00
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2006-05-31 06:12:29 +02:00
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/** The virtual address of the request. */
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Addr vaddr;
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2006-01-31 20:20:39 +01:00
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2007-02-12 19:06:30 +01:00
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/** Extra data for the request, such as the return value of
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* store conditional or the compare value for a CAS. */
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uint64_t extraData;
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2006-01-31 18:12:49 +01:00
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2006-05-31 06:12:29 +02:00
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/** The cpu number (for statistics, typically). */
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2006-01-31 20:20:39 +01:00
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int cpuNum;
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2006-05-31 06:12:29 +02:00
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/** The requesting thread id (for statistics, typically). */
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2006-01-31 20:20:39 +01:00
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int threadNum;
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2006-01-31 18:12:49 +01:00
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/** program counter of initiating access; for tracing/debugging */
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Addr pc;
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2006-05-31 06:12:29 +02:00
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/** Whether or not paddr is valid (has been written yet). */
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bool validPaddr;
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/** Whether or not the asid & vaddr are valid. */
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bool validAsidVaddr;
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/** Whether or not the sc result is valid. */
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2007-02-12 19:06:30 +01:00
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bool validExData;
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2006-05-31 06:12:29 +02:00
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/** Whether or not the cpu number & thread ID are valid. */
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bool validCpuAndThreadNums;
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/** Whether or not the pc is valid. */
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2006-04-07 21:54:48 +02:00
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bool validPC;
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public:
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2006-05-31 06:12:29 +02:00
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/** Minimal constructor. No fields are initialized. */
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Request()
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: validPaddr(false), validAsidVaddr(false),
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2007-02-12 19:06:30 +01:00
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validExData(false), validCpuAndThreadNums(false), validPC(false)
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2006-05-31 06:12:29 +02:00
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{}
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/**
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* Constructor for physical (e.g. device) requests. Initializes
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* just physical address, size, flags, and timestamp (to curTick).
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* These fields are adequate to perform a request. */
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Request(Addr _paddr, int _size, int _flags)
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: validCpuAndThreadNums(false)
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{ setPhys(_paddr, _size, _flags); }
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2006-06-03 00:15:20 +02:00
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Request(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc,
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int _cpuNum, int _threadNum)
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{
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setThreadContext(_cpuNum, _threadNum);
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setVirt(_asid, _vaddr, _size, _flags, _pc);
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}
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2007-06-21 19:50:35 +02:00
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~Request() {} // for FastAlloc
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2006-05-31 06:12:29 +02:00
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/**
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* Set up CPU and thread numbers. */
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void setThreadContext(int _cpuNum, int _threadNum)
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{
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cpuNum = _cpuNum;
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threadNum = _threadNum;
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validCpuAndThreadNums = true;
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}
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/**
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* Set up a physical (e.g. device) request in a previously
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* allocated Request object. */
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void setPhys(Addr _paddr, int _size, int _flags)
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{
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paddr = _paddr;
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size = _size;
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flags = _flags;
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time = curTick;
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validPaddr = true;
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validAsidVaddr = false;
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validPC = false;
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2007-02-12 19:06:30 +01:00
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validExData = false;
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2006-11-29 23:11:10 +01:00
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mmapedIpr = false;
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2006-05-31 06:12:29 +02:00
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}
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/**
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* Set up a virtual (e.g., CPU) request in a previously
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* allocated Request object. */
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void setVirt(int _asid, Addr _vaddr, int _size, int _flags, Addr _pc)
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{
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asid = _asid;
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vaddr = _vaddr;
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size = _size;
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flags = _flags;
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pc = _pc;
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time = curTick;
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validPaddr = false;
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validAsidVaddr = true;
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validPC = true;
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2007-02-12 19:06:30 +01:00
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validExData = false;
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2006-11-29 23:11:10 +01:00
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mmapedIpr = false;
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2006-05-31 06:12:29 +02:00
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}
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/** Set just the physical address. This should only be used to
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* record the result of a translation, and thus the vaddr must be
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* valid before this method is called. Otherwise, use setPhys()
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* to guarantee that the size and flags are also set.
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*/
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void setPaddr(Addr _paddr)
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{
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assert(validAsidVaddr);
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paddr = _paddr;
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validPaddr = true;
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}
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/** Accessor for paddr. */
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Addr getPaddr() { assert(validPaddr); return paddr; }
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/** Accessor for size. */
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int getSize() { assert(validPaddr || validAsidVaddr); return size; }
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/** Accessor for time. */
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Tick getTime() { assert(validPaddr || validAsidVaddr); return time; }
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/** Accessor for flags. */
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uint32_t getFlags() { assert(validPaddr || validAsidVaddr); return flags; }
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/** Accessor for paddr. */
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void setFlags(uint32_t _flags)
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{ assert(validPaddr || validAsidVaddr); flags = _flags; }
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/** Accessor function for vaddr.*/
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Addr getVaddr() { assert(validAsidVaddr); return vaddr; }
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/** Accessor function for asid.*/
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int getAsid() { assert(validAsidVaddr); return asid; }
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2006-11-23 07:42:57 +01:00
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/** Accessor function for asi.*/
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2006-11-29 23:11:10 +01:00
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uint8_t getAsi() { assert(validAsidVaddr); return flags & ASI_BITS; }
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2006-11-23 07:42:57 +01:00
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/** Accessor function for asi.*/
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2006-11-29 23:11:10 +01:00
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void setAsi(uint8_t a)
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{ assert(validAsidVaddr); flags = (flags & ~ASI_BITS) | a; }
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2006-11-23 07:42:57 +01:00
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/** Accessor function for asi.*/
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2006-11-29 23:11:10 +01:00
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bool isMmapedIpr() { assert(validPaddr); return mmapedIpr; }
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2006-11-23 07:42:57 +01:00
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/** Accessor function for asi.*/
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2006-12-06 20:29:10 +01:00
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void setMmapedIpr(bool r) { assert(validAsidVaddr); mmapedIpr = r; }
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2006-11-23 07:42:57 +01:00
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2006-06-06 20:06:30 +02:00
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/** Accessor function to check if sc result is valid. */
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2007-02-12 19:06:30 +01:00
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bool extraDataValid() { return validExData; }
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2006-05-31 06:12:29 +02:00
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/** Accessor function for store conditional return value.*/
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2007-02-12 19:06:30 +01:00
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uint64_t getExtraData() { assert(validExData); return extraData; }
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2006-05-31 06:12:29 +02:00
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/** Accessor function for store conditional return value.*/
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void setExtraData(uint64_t _extraData)
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{ extraData = _extraData; validExData = true; }
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2006-05-31 06:12:29 +02:00
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/** Accessor function for cpu number.*/
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int getCpuNum() { assert(validCpuAndThreadNums); return cpuNum; }
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/** Accessor function for thread number.*/
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int getThreadNum() { assert(validCpuAndThreadNums); return threadNum; }
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/** Accessor function for pc.*/
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Addr getPC() { assert(validPC); return pc; }
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2006-04-07 21:54:48 +02:00
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2006-06-28 20:35:00 +02:00
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/** Accessor Function to Check Cacheability. */
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2006-10-08 19:53:24 +02:00
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bool isUncacheable() { return (getFlags() & UNCACHEABLE) != 0; }
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2006-06-28 20:35:00 +02:00
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2006-10-08 19:53:24 +02:00
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bool isInstRead() { return (getFlags() & INST_READ) != 0; }
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bool isLocked() { return (getFlags() & LOCKED) != 0; }
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2006-06-30 16:25:25 +02:00
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2007-02-12 19:06:30 +01:00
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bool isSwap() { return (getFlags() & MEM_SWAP ||
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getFlags() & MEM_SWAP_COND); }
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bool isCondSwap() { return (getFlags() & MEM_SWAP_COND) != 0; }
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2006-05-26 20:17:33 +02:00
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friend class Packet;
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2006-01-31 20:20:39 +01:00
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};
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2006-01-31 18:12:49 +01:00
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#endif // __MEM_REQUEST_HH__
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