sanchayanmaity/gem5
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More progress toward compiling... partly by

Browse source 
fixing things, partly by ignoring CPU models
that don't currently compile.

SConscript:
    Split sources for fast, simple, and o3 CPU models into
    separate source lists.  For now none of these are included
    in the base source list, so you won't get any CPU models
    at all... but we still can't compile the other stuff so
    it's not an issue.

    Also get rid of obsolete encumbered/mem file.
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.hh:
cpu/exec_context.cc:
sim/process.cc:
sim/system.cc:
sim/system.hh:
    FunctionalMemory -> Memory
cpu/pc_event.hh:
    Get rid of unused badpc.
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Move Port functions into .cc file.
mem/port.hh:
    Make recvAddressRangesQuery panic by default instead
    of being abstract... do CPUs need to implement this?
mem/request.hh:
    Add prefetch flags.
sim/syscall_emul.hh:
    Start to fix...

--HG--
extra : convert_revision : ece53b3855f20916caaa381598ac37e8c7adfba7
This commit is contained in:
Steve Reinhardt 2006-02-15 17:52:49 -05:00
parent 091e6b72cf
commit b8a2d1e5c7
18 changed files with 123 additions and 97 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

82
SConscript
View file

@ -45,9 +45,6 @@ Import('env')
# Base sources used by all configurations.
base_sources = Split('''
arch/alpha/decoder.cc
arch/alpha/alpha_o3_exec.cc
arch/alpha/fast_cpu_exec.cc
arch/alpha/simple_cpu_exec.cc
arch/alpha/faults.cc
arch/alpha/isa_traits.cc
@ -87,44 +84,11 @@ base_sources = Split('''
base/stats/text.cc
cpu/base.cc
cpu/base_dyn_inst.cc
cpu/exec_context.cc
cpu/exetrace.cc
cpu/pc_event.cc
cpu/static_inst.cc
cpu/o3/2bit_local_pred.cc
cpu/o3/alpha_dyn_inst.cc
cpu/o3/alpha_cpu.cc
cpu/o3/alpha_cpu_builder.cc
cpu/o3/bpred_unit.cc
cpu/o3/btb.cc
cpu/o3/commit.cc
cpu/o3/decode.cc
cpu/o3/fetch.cc
cpu/o3/free_list.cc
cpu/o3/cpu.cc
cpu/o3/iew.cc
cpu/o3/inst_queue.cc
cpu/o3/ldstq.cc
cpu/o3/mem_dep_unit.cc
cpu/o3/ras.cc
cpu/o3/rename.cc
cpu/o3/rename_map.cc
cpu/o3/rob.cc
cpu/o3/sat_counter.cc
cpu/o3/store_set.cc
cpu/o3/tournament_pred.cc
cpu/fast/cpu.cc
cpu/sampler/sampler.cc
cpu/simple/cpu.cc
cpu/trace/reader/mem_trace_reader.cc
cpu/trace/reader/ibm_reader.cc
cpu/trace/reader/itx_reader.cc
cpu/trace/reader/m5_reader.cc
cpu/trace/opt_cpu.cc
cpu/trace/trace_cpu.cc
encumbered/mem/functional/main.cc
mem/memory.cc
mem/page_table.cc
@ -153,8 +117,28 @@ base_sources = Split('''
sim/trace_context.cc
''')
fast_cpu_sources = Split('''
arch/alpha/fast_cpu_exec.cc
cpu/fast/cpu.cc
''')
simple_cpu_sources = Split('''
arch/alpha/simple_cpu_exec.cc
cpu/simple/cpu.cc
''')
trace_reader_sources = Split('''
cpu/trace/reader/mem_trace_reader.cc
cpu/trace/reader/ibm_reader.cc
cpu/trace/reader/itx_reader.cc
cpu/trace/reader/m5_reader.cc
cpu/trace/opt_cpu.cc
cpu/trace/trace_cpu.cc
''')
full_cpu_sources = Split('''
arch/alpha/full_cpu_exec.cc
cpu/base_dyn_inst.cc
encumbered/cpu/full/bpred.cc
encumbered/cpu/full/commit.cc
encumbered/cpu/full/cpu.cc
@ -191,6 +175,32 @@ full_cpu_sources = Split('''
encumbered/cpu/full/iq/standard/iq_standard.cc
''')
o3_cpu_sources = Split('''
arch/alpha/alpha_o3_exec.cc
cpu/o3/2bit_local_pred.cc
cpu/o3/alpha_dyn_inst.cc
cpu/o3/alpha_cpu.cc
cpu/o3/alpha_cpu_builder.cc
cpu/o3/bpred_unit.cc
cpu/o3/btb.cc
cpu/o3/commit.cc
cpu/o3/decode.cc
cpu/o3/fetch.cc
cpu/o3/free_list.cc
cpu/o3/cpu.cc
cpu/o3/iew.cc
cpu/o3/inst_queue.cc
cpu/o3/ldstq.cc
cpu/o3/mem_dep_unit.cc
cpu/o3/ras.cc
cpu/o3/rename.cc
cpu/o3/rename_map.cc
cpu/o3/rob.cc
cpu/o3/sat_counter.cc
cpu/o3/store_set.cc
cpu/o3/tournament_pred.cc
''')
# MySql sources
mysql_sources = Split('''
base/mysql.cc

4
base/loader/aout_object.cc
View file

@ -30,7 +30,7 @@
#include "base/loader/aout_object.hh"
#include "mem/functional/functional.hh"
#include "mem/memory.hh"
#include "base/loader/symtab.hh"
#include "base/trace.hh" // for DPRINTF
@ -78,7 +78,7 @@ AoutObject::AoutObject(const string &_filename, int _fd,
bool
AoutObject::loadSections(FunctionalMemory *mem, bool loadPhys)
AoutObject::loadSections(Memory *mem, bool loadPhys)
{
Addr textAddr = text.baseAddr;
Addr dataAddr = data.baseAddr;

3
base/loader/aout_object.hh
View file

@ -46,8 +46,7 @@ class AoutObject : public ObjectFile
public:
virtual ~AoutObject() {}
virtual bool loadSections(FunctionalMemory *mem,
bool loadPhys = false);
virtual bool loadSections(Memory *mem, bool loadPhys = false);
virtual bool loadGlobalSymbols(SymbolTable *symtab);
virtual bool loadLocalSymbols(SymbolTable *symtab);

4
base/loader/ecoff_object.cc
View file

@ -30,7 +30,7 @@
#include "base/loader/ecoff_object.hh"
#include "mem/functional/functional.hh"
#include "mem/memory.hh"
#include "base/loader/symtab.hh"
#include "base/trace.hh" // for DPRINTF
@ -82,7 +82,7 @@ EcoffObject::EcoffObject(const string &_filename, int _fd,
bool
EcoffObject::loadSections(FunctionalMemory *mem, bool loadPhys)
EcoffObject::loadSections(Memory *mem, bool loadPhys)
{
Addr textAddr = text.baseAddr;
Addr dataAddr = data.baseAddr;

3
base/loader/ecoff_object.hh
View file

@ -50,8 +50,7 @@ class EcoffObject : public ObjectFile
public:
virtual ~EcoffObject() {}
virtual bool loadSections(FunctionalMemory *mem,
bool loadPhys = false);
virtual bool loadSections(Memory *mem, bool loadPhys = false);
virtual bool loadGlobalSymbols(SymbolTable *symtab);
virtual bool loadLocalSymbols(SymbolTable *symtab);

4
base/loader/elf_object.cc
View file

@ -43,7 +43,7 @@
#include "base/loader/elf_object.hh"
#include "mem/functional/functional.hh"
#include "mem/memory.hh"
#include "base/loader/symtab.hh"
#include "base/trace.hh" // for DPRINTF
@ -170,7 +170,7 @@ ElfObject::ElfObject(const string &_filename, int _fd,
bool
ElfObject::loadSections(FunctionalMemory *mem, bool loadPhys)
ElfObject::loadSections(Memory *mem, bool loadPhys)
{
Addr textAddr = text.baseAddr;
Addr dataAddr = data.baseAddr;

3
base/loader/elf_object.hh
View file

@ -48,8 +48,7 @@ class ElfObject : public ObjectFile
public:
virtual ~ElfObject() {}
virtual bool loadSections(FunctionalMemory *mem,
bool loadPhys = false);
virtual bool loadSections(Memory *mem, bool loadPhys = false);
virtual bool loadGlobalSymbols(SymbolTable *symtab);
virtual bool loadLocalSymbols(SymbolTable *symtab);

5
base/loader/object_file.hh
View file

@ -31,7 +31,7 @@
#include "targetarch/isa_traits.hh" // for Addr
class FunctionalMemory;
class Memory;
class SymbolTable;
class ObjectFile
@ -67,8 +67,7 @@ class ObjectFile
void close();
virtual bool loadSections(FunctionalMemory *mem,
bool loadPhys = false) = 0;
virtual bool loadSections(Memory *mem, bool loadPhys = false) = 0;
virtual bool loadGlobalSymbols(SymbolTable *symtab) = 0;
virtual bool loadLocalSymbols(SymbolTable *symtab) = 0;

4
cpu/exec_context.cc
View file

@ -51,7 +51,7 @@ using namespace std;
#if FULL_SYSTEM
ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys,
AlphaITB *_itb, AlphaDTB *_dtb,
FunctionalMemory *_mem)
Memory *_mem)
: _status(ExecContext::Unallocated), cpu(_cpu), thread_num(_thread_num),
cpu_id(-1), mem(_mem), itb(_itb), dtb(_dtb), system(_sys),
memctrl(_sys->memctrl), physmem(_sys->physmem),
@ -77,7 +77,7 @@ ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys,
}
#else
ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_system,
FunctionalMemory *_mem, Process *_process, int _asid)
Memory *_mem, Process *_process, int _asid)
: _status(ExecContext::Unallocated),
cpu(_cpu), thread_num(_thread_num), cpu_id(-1),
system(_system), mem(_mem),

5
cpu/pc_event.hh
View file

@ -31,16 +31,11 @@
#include <vector>
#include "mem/mem_req.hh"
class ExecContext;
class PCEventQueue;
class PCEvent
{
protected:
static const Addr badpc = MemReq::inval_addr;
protected:
std::string description;
PCEventQueue *queue;

41
cpu/simple/cpu.cc
View file

@ -102,17 +102,42 @@ SimpleCPU::CacheCompletionEvent::CacheCompletionEvent(SimpleCPU *_cpu)
{
}
void SimpleCPU::CacheCompletionEvent::process()
bool
SimpleCPU::CpuPort::recvTiming(Packet &pkt)
{
cpu->processCacheCompletion();
cpu->processResponse(pkt);
return true;
}
const char *
SimpleCPU::CacheCompletionEvent::description()
Tick
SimpleCPU::CpuPort::recvAtomic(Packet &pkt)
{
return "SimpleCPU cache completion event";
panic("CPU doesn't expect callback!");
return curTick;
}
void
SimpleCPU::CpuPort::recvFunctional(Packet &pkt)
{
panic("CPU doesn't expect callback!");
}
void
SimpleCPU::CpuPort::recvStatusChange(Status status)
{
cpu->recvStatusChange(status);
}
Packet *
SimpleCPU::CpuPort::recvRetry()
{
return cpu->processRetry();
}
SimpleCPU::SimpleCPU(Params *p)
: BaseCPU(p), tickEvent(this, p->width), xc(NULL),
cacheCompletionEvent(this), dcachePort(this), icachePort(this)
@ -697,9 +722,9 @@ SimpleCPU::sendDcacheRequest()
void
SimpleCPU::processResponse(Packet *response)
{
// For what things is the CPU the consumer of the packet it sent out?
// This may create a memory leak if that's the case and it's expected of the
// SimpleCPU to delete its own packet.
// For what things is the CPU the consumer of the packet it sent
// out? This may create a memory leak if that's the case and it's
// expected of the SimpleCPU to delete its own packet.
pkt = response;
switch (status()) {

14
cpu/simple/cpu.hh
View file

@ -79,19 +79,15 @@ class SimpleCPU : public BaseCPU
protected:
virtual bool recvTiming(Packet &pkt)
{ cpu->processCacheCompletion(pkt); return true; }
virtual bool recvTiming(Packet &pkt);
virtual Tick recvAtomic(Packet &pkt)
{ panic("CPU doesn't expect callback!"); return curTick; }
virtual Tick recvAtomic(Packet &pkt);
virtual void recvFunctional(Packet &pkt)
{ panic("CPU doesn't expect callback!"); }
virtual void recvFunctional(Packet &pkt);
virtual void recvStatusChange(Status status)
{ cpu->recvStatusChange(status); }
virtual void recvStatusChange(Status status);
virtual Packet *recvRetry() { return cpu->processRetry(); }
virtual Packet *recvRetry();
};
CpuPort icachePort;

2
mem/port.hh
View file

@ -121,7 +121,7 @@ class Port
need to use two different ports.
*/
virtual void recvAddressRangesQuery(std::list<Range<Addr> > &range_list,
bool &owner) = 0;
bool &owner) { panic("??"); }
public:

4
mem/request.hh
View file

@ -54,6 +54,10 @@ const unsigned ALTMODE = 0x008;
const unsigned UNCACHEABLE = 0x010;
/** The request should not cause a page fault. */
const unsigned NO_FAULT = 0x020;
/** The request should be prefetched into the exclusive state. */
const unsigned PF_EXCLUSIVE = 0x100;
/** The request should be marked as LRU. */
const unsigned EVICT_NEXT = 0x200;
class Request
{

8
sim/process.cc
View file

@ -42,8 +42,8 @@
#include "encumbered/cpu/full/thread.hh"
#include "encumbered/eio/eio.hh"
#include "mem/page_table.hh"
#include "mem/functional/physical.hh"
#include "mem/functional/proxy.hh"
#include "mem/memory.hh"
#include "mem/proxy.hh"
#include "sim/builder.hh"
#include "sim/fake_syscall.hh"
#include "sim/process.hh"
@ -154,7 +154,7 @@ Process::startup()
if (execContexts.empty())
fatal("Process %s is not associated with any CPUs!\n", name());
initVirtMem = new ProxyMemory<FunctionalMemory>(system->physmem, pTable);
initVirtMem = new ProxyMemory<Memory>(system->physmem, pTable);
// first exec context for this process... initialize & enable
ExecContext *xc = execContexts[0];
@ -245,7 +245,7 @@ DEFINE_SIM_OBJECT_CLASS_NAME("Process", Process)
static void
copyStringArray(vector<string> &strings, Addr array_ptr, Addr data_ptr,
FunctionalMemory *func)
Memory *func)
{
for (int i = 0; i < strings.size(); ++i) {
func->prot_write(array_ptr, (uint8_t*)&data_ptr, sizeof(Addr));

24
sim/syscall_emul.hh
View file

@ -43,7 +43,7 @@
#include <sys/uio.h>
#include "base/intmath.hh" // for RoundUp
#include "mem/functional/functional.hh"
#include "mem/port.hh"
#include "targetarch/isa_traits.hh" // for Addr
#include "base/trace.hh"
@ -103,18 +103,18 @@ class BaseBufferArg {
//
// copy data into simulator space (read from target memory)
//
virtual bool copyIn(FunctionalMemory *mem)
virtual bool copyIn(Port *memport)
{
mem->access(Read, addr, bufPtr, size);
memport->readBlobFunctional(addr, bufPtr, size);
return true; // no EFAULT detection for now
}
//
// copy data out of simulator space (write to target memory)
//
virtual bool copyOut(FunctionalMemory *mem)
virtual bool copyOut(Port *memport)
{
mem->access(Write, addr, bufPtr, size);
memport->writeBlobFunctional(addr, bufPtr, size);
return true; // no EFAULT detection for now
}
@ -314,7 +314,7 @@ openFunc(SyscallDesc *desc, int callnum, Process *process,
{
std::string path;
if (xc->mem->readString(path, xc->getSyscallArg(0)) != No_Fault)
if (xc->mem->readStringFunctional(path, xc->getSyscallArg(0)) != No_Fault)
return -EFAULT;
if (path == "/dev/sysdev0") {
@ -361,7 +361,7 @@ chmodFunc(SyscallDesc *desc, int callnum, Process *process,
{
std::string path;
if (xc->mem->readString(path, xc->getSyscallArg(0)) != No_Fault)
if (xc->mem->readStringFunctional(path, xc->getSyscallArg(0)) != No_Fault)
return -EFAULT;
uint32_t mode = xc->getSyscallArg(1);
@ -414,7 +414,7 @@ statFunc(SyscallDesc *desc, int callnum, Process *process,
{
std::string path;
if (xc->mem->readString(path, xc->getSyscallArg(0)) != No_Fault)
if (xc->mem->readStringFunctional(path, xc->getSyscallArg(0)) != No_Fault)
return -EFAULT;
struct stat hostBuf;
@ -461,7 +461,7 @@ lstatFunc(SyscallDesc *desc, int callnum, Process *process,
{
std::string path;
if (xc->mem->readString(path, xc->getSyscallArg(0)) != No_Fault)
if (xc->mem->readStringFunctional(path, xc->getSyscallArg(0)) != No_Fault)
return -EFAULT;
struct stat hostBuf;
@ -483,7 +483,7 @@ lstat64Func(SyscallDesc *desc, int callnum, Process *process,
{
std::string path;
if (xc->mem->readString(path, xc->getSyscallArg(0)) != No_Fault)
if (xc->mem->readStringFunctional(path, xc->getSyscallArg(0)) != No_Fault)
return -EFAULT;
struct stat64 hostBuf;
@ -530,7 +530,7 @@ statfsFunc(SyscallDesc *desc, int callnum, Process *process,
{
std::string path;
if (xc->mem->readString(path, xc->getSyscallArg(0)) != No_Fault)
if (xc->mem->readStringFunctional(path, xc->getSyscallArg(0)) != No_Fault)
return -EFAULT;
struct statfs hostBuf;
@ -700,7 +700,7 @@ utimesFunc(SyscallDesc *desc, int callnum, Process *process,
{
std::string path;
if (xc->mem->readString(path, xc->getSyscallArg(0)) != No_Fault)
if (xc->mem->readStringFunctional(path, xc->getSyscallArg(0)) != No_Fault)
return -EFAULT;
TypedBufferArg<typename OS::timeval [2]> tp(xc->getSyscallArg(1));

4
sim/system.cc
View file

@ -29,7 +29,7 @@
#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
#include "cpu/exec_context.hh"
#include "mem/functional/physical.hh"
#include "mem/memory.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
#include "base/trace.hh"
@ -410,7 +410,7 @@ printSystems()
BEGIN_DECLARE_SIM_OBJECT_PARAMS(System)
SimObjectParam<PhysicalMemory *> physmem;
SimObjectParam<Memory *> physmem;
#if FULL_SYSTEM
Param<Tick> boot_cpu_frequency;

6
sim/system.hh
View file

@ -44,7 +44,7 @@ class BaseCPU;
class ExecContext;
class MemoryController;
class ObjectFile;
class PhysicalMemory;
class Memory;
#if FULL_SYSTEM
class Platform;
@ -56,7 +56,7 @@ namespace Kernel { class Binning; }
class System : public SimObject
{
public:
PhysicalMemory *physmem;
Memory *physmem;
PCEventQueue pcEventQueue;
std::vector<ExecContext *> execContexts;
@ -176,7 +176,7 @@ class System : public SimObject
struct Params
{
std::string name;
PhysicalMemory *physmem;
Memory *physmem;
#if FULL_SYSTEM
Tick boot_cpu_frequency;