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gem5/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt

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add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
---------- Begin Simulation Statistics ----------
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
sim_seconds 0.200392 # Number of seconds simulated
sim_ticks 200392337000 # Number of ticks simulated
final_tick 4320161594000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
sim_freq 1000000000000 # Frequency of simulated ticks
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
host_inst_rate 246693534 # Simulator instruction rate (inst/s)
host_op_rate 246690485 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 182041258854 # Simulator tick rate (ticks/s)
host_mem_usage 459700 # Number of bytes of host memory used
host_seconds 1.10 # Real time elapsed on the host
sim_insts 271555592 # Number of instructions simulated
sim_ops 271555592 # Number of ops (including micro ops) simulated
testsys.physmem.bytes_read::cpu.inst 13229896 # Number of bytes read from this memory
testsys.physmem.bytes_read::cpu.data 4514804 # Number of bytes read from this memory
testsys.physmem.bytes_read::tsunami.ethernet 1464 # Number of bytes read from this memory
testsys.physmem.bytes_read::total 17746164 # Number of bytes read from this memory
testsys.physmem.bytes_inst_read::cpu.inst 13229896 # Number of instructions bytes read from this memory
testsys.physmem.bytes_inst_read::total 13229896 # Number of instructions bytes read from this memory
testsys.physmem.bytes_written::cpu.data 3697636 # Number of bytes written to this memory
all: Update stats for memory per master and total fix.
2012-06-05 07:23:16 +02:00
testsys.physmem.bytes_written::tsunami.ethernet 902 # Number of bytes written to this memory
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.physmem.bytes_written::total 3698538 # Number of bytes written to this memory
testsys.physmem.num_reads::cpu.inst 3307474 # Number of read requests responded to by this memory
testsys.physmem.num_reads::cpu.data 615757 # Number of read requests responded to by this memory
testsys.physmem.num_reads::tsunami.ethernet 43 # Number of read requests responded to by this memory
testsys.physmem.num_reads::total 3923274 # Number of read requests responded to by this memory
testsys.physmem.num_writes::cpu.data 478509 # Number of write requests responded to by this memory
all: Update stats for memory per master and total fix.
2012-06-05 07:23:16 +02:00
testsys.physmem.num_writes::tsunami.ethernet 31 # Number of write requests responded to by this memory
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.physmem.num_writes::total 478540 # Number of write requests responded to by this memory
testsys.physmem.bw_read::cpu.inst 66019970 # Total read bandwidth from this memory (bytes/s)
testsys.physmem.bw_read::cpu.data 22529824 # Total read bandwidth from this memory (bytes/s)
testsys.physmem.bw_read::tsunami.ethernet 7306 # Total read bandwidth from this memory (bytes/s)
testsys.physmem.bw_read::total 88557099 # Total read bandwidth from this memory (bytes/s)
testsys.physmem.bw_inst_read::cpu.inst 66019970 # Instruction read bandwidth from this memory (bytes/s)
testsys.physmem.bw_inst_read::total 66019970 # Instruction read bandwidth from this memory (bytes/s)
testsys.physmem.bw_write::cpu.data 18451983 # Write bandwidth from this memory (bytes/s)
testsys.physmem.bw_write::tsunami.ethernet 4501 # Write bandwidth from this memory (bytes/s)
testsys.physmem.bw_write::total 18456484 # Write bandwidth from this memory (bytes/s)
testsys.physmem.bw_total::cpu.inst 66019970 # Total bandwidth to/from this memory (bytes/s)
testsys.physmem.bw_total::cpu.data 40981807 # Total bandwidth to/from this memory (bytes/s)
testsys.physmem.bw_total::tsunami.ethernet 11807 # Total bandwidth to/from this memory (bytes/s)
testsys.physmem.bw_total::total 107013583 # Total bandwidth to/from this memory (bytes/s)
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
testsys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
testsys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD).
testsys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes.
testsys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
testsys.disk0.dma_write_txs 0 # Number of DMA write transactions.
testsys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
testsys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
testsys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
testsys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes.
testsys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
testsys.disk2.dma_write_txs 0 # Number of DMA write transactions.
tests: update tests for TLB unification
2009-04-09 07:21:30 +02:00
testsys.cpu.dtb.fetch_hits 0 # ITB hits
testsys.cpu.dtb.fetch_misses 0 # ITB misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.dtb.fetch_acv 0 # ITB acv
testsys.cpu.dtb.fetch_accesses 0 # ITB accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.dtb.read_hits 611875 # DTB read hits
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.cpu.dtb.read_misses 3287 # DTB read misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.dtb.read_acv 80 # DTB read access violations
testsys.cpu.dtb.read_accesses 225414 # DTB read accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.dtb.write_hits 478325 # DTB write hits
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.cpu.dtb.write_misses 528 # DTB write misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.dtb.write_acv 81 # DTB write access violations
testsys.cpu.dtb.write_accesses 109988 # DTB write accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.dtb.data_hits 1090200 # DTB hits
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.dtb.data_misses 3815 # DTB misses
testsys.cpu.dtb.data_acv 161 # DTB access violations
testsys.cpu.dtb.data_accesses 335402 # DTB accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.itb.fetch_hits 1215641 # ITB hits
tests: update tests for TLB unification
2009-04-09 07:21:30 +02:00
testsys.cpu.itb.fetch_misses 1497 # ITB misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.itb.fetch_acv 69 # ITB acv
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.itb.fetch_accesses 1217138 # ITB accesses
tests: update tests for TLB unification
2009-04-09 07:21:30 +02:00
testsys.cpu.itb.read_hits 0 # DTB read hits
testsys.cpu.itb.read_misses 0 # DTB read misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.itb.read_acv 0 # DTB read access violations
testsys.cpu.itb.read_accesses 0 # DTB read accesses
tests: update tests for TLB unification
2009-04-09 07:21:30 +02:00
testsys.cpu.itb.write_hits 0 # DTB write hits
testsys.cpu.itb.write_misses 0 # DTB write misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.itb.write_acv 0 # DTB write access violations
testsys.cpu.itb.write_accesses 0 # DTB write accesses
testsys.cpu.itb.data_hits 0 # DTB hits
testsys.cpu.itb.data_misses 0 # DTB misses
testsys.cpu.itb.data_acv 0 # DTB access violations
testsys.cpu.itb.data_accesses 0 # DTB accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.numCycles 399134827 # number of cpu cycles simulated
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.numWorkItemsStarted 0 # number of work items this cpu started
testsys.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.committedInsts 3303498 # Number of instructions committed
testsys.cpu.committedOps 3303498 # Number of ops (including micro ops) committed
testsys.cpu.num_int_alu_accesses 3114409 # Number of integer alu accesses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.num_fp_alu_accesses 17380 # Number of float alu accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.num_func_calls 87506 # number of times a function call or return occured
testsys.cpu.num_conditional_control_insts 347031 # number of instructions that are conditional controls
testsys.cpu.num_int_insts 3114409 # number of integer instructions
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.num_fp_insts 17380 # number of float instructions
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.num_int_register_reads 4292439 # number of times the integer registers were read
testsys.cpu.num_int_register_writes 2256595 # number of times the integer registers were written
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.num_fp_register_reads 11166 # number of times the floating registers were read
testsys.cpu.num_fp_register_writes 10823 # number of times the floating registers were written
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.num_mem_refs 1099884 # number of memory refs
testsys.cpu.num_load_insts 619431 # Number of load instructions
testsys.cpu.num_store_insts 480453 # Number of store instructions
testsys.cpu.num_idle_cycles 395839404.829048 # Number of idle cycles
testsys.cpu.num_busy_cycles 3295422.170952 # Number of busy cycles
testsys.cpu.not_idle_fraction 0.008256 # Percentage of non-idle cycles
testsys.cpu.idle_fraction 0.991744 # Percentage of idle cycles
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.cpu.kern.inst.arm 0 # number of arm instructions executed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.kern.inst.quiesce 213 # number of quiesce instructions executed
testsys.cpu.kern.inst.hwrei 16709 # number of hwrei instructions executed
testsys.cpu.kern.ipl_count::0 4122 40.57% 40.57% # number of times we switched to this ipl
testsys.cpu.kern.ipl_count::21 54 0.53% 41.10% # number of times we switched to this ipl
testsys.cpu.kern.ipl_count::22 205 2.02% 43.12% # number of times we switched to this ipl
testsys.cpu.kern.ipl_count::31 5779 56.88% 100.00% # number of times we switched to this ipl
testsys.cpu.kern.ipl_count::total 10160 # number of times we switched to this ipl
testsys.cpu.kern.ipl_good::0 4116 48.47% 48.47% # number of times we switched to this ipl from a different ipl
testsys.cpu.kern.ipl_good::21 54 0.64% 49.11% # number of times we switched to this ipl from a different ipl
testsys.cpu.kern.ipl_good::22 205 2.41% 51.53% # number of times we switched to this ipl from a different ipl
testsys.cpu.kern.ipl_good::31 4116 48.47% 100.00% # number of times we switched to this ipl from a different ipl
testsys.cpu.kern.ipl_good::total 8491 # number of times we switched to this ipl from a different ipl
testsys.cpu.kern.ipl_ticks::0 199321085500 99.88% 99.88% # number of cycles we spent at this ipl
testsys.cpu.kern.ipl_ticks::21 4521000 0.00% 99.88% # number of cycles we spent at this ipl
testsys.cpu.kern.ipl_ticks::22 8815000 0.00% 99.88% # number of cycles we spent at this ipl
testsys.cpu.kern.ipl_ticks::31 233213000 0.12% 100.00% # number of cycles we spent at this ipl
testsys.cpu.kern.ipl_ticks::total 199567634500 # number of cycles we spent at this ipl
testsys.cpu.kern.ipl_used::0 0.998544 # fraction of swpipl calls that actually changed the ipl
stats: update reference outputs now that compatibility is gone Because of the initialization bug, it wasn't consistent anyway.
2009-04-22 19:25:17 +02:00
testsys.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl
testsys.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.kern.ipl_used::31 0.712234 # fraction of swpipl calls that actually changed the ipl
testsys.cpu.kern.ipl_used::total 0.835728 # fraction of swpipl calls that actually changed the ipl
tests: stats outputs now include CDFs, update tests that use those so they're easier to diff
2009-07-07 00:49:48 +02:00
testsys.cpu.kern.syscall::2 3 3.61% 3.61% # number of syscalls executed
testsys.cpu.kern.syscall::3 7 8.43% 12.05% # number of syscalls executed
testsys.cpu.kern.syscall::4 1 1.20% 13.25% # number of syscalls executed
testsys.cpu.kern.syscall::6 7 8.43% 21.69% # number of syscalls executed
testsys.cpu.kern.syscall::17 7 8.43% 30.12% # number of syscalls executed
testsys.cpu.kern.syscall::19 2 2.41% 32.53% # number of syscalls executed
testsys.cpu.kern.syscall::20 1 1.20% 33.73% # number of syscalls executed
testsys.cpu.kern.syscall::33 3 3.61% 37.35% # number of syscalls executed
testsys.cpu.kern.syscall::45 10 12.05% 49.40% # number of syscalls executed
testsys.cpu.kern.syscall::48 5 6.02% 55.42% # number of syscalls executed
testsys.cpu.kern.syscall::54 1 1.20% 56.63% # number of syscalls executed
testsys.cpu.kern.syscall::59 3 3.61% 60.24% # number of syscalls executed
testsys.cpu.kern.syscall::71 15 18.07% 78.31% # number of syscalls executed
testsys.cpu.kern.syscall::74 4 4.82% 83.13% # number of syscalls executed
testsys.cpu.kern.syscall::97 2 2.41% 85.54% # number of syscalls executed
testsys.cpu.kern.syscall::98 2 2.41% 87.95% # number of syscalls executed
testsys.cpu.kern.syscall::101 2 2.41% 90.36% # number of syscalls executed
testsys.cpu.kern.syscall::102 2 2.41% 92.77% # number of syscalls executed
testsys.cpu.kern.syscall::104 1 1.20% 93.98% # number of syscalls executed
testsys.cpu.kern.syscall::105 3 3.61% 97.59% # number of syscalls executed
testsys.cpu.kern.syscall::118 2 2.41% 100.00% # number of syscalls executed
stats: update reference outputs now that compatibility is gone Because of the initialization bug, it wasn't consistent anyway.
2009-04-22 19:25:17 +02:00
testsys.cpu.kern.syscall::total 83 # number of syscalls executed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.kern.callpal::swpctx 438 4.02% 4.02% # number of callpals executed
testsys.cpu.kern.callpal::tbi 20 0.18% 4.20% # number of callpals executed
testsys.cpu.kern.callpal::swpipl 8990 82.42% 86.62% # number of callpals executed
testsys.cpu.kern.callpal::rdps 359 3.29% 89.91% # number of callpals executed
testsys.cpu.kern.callpal::wrusp 3 0.03% 89.93% # number of callpals executed
testsys.cpu.kern.callpal::rdusp 3 0.03% 89.96% # number of callpals executed
testsys.cpu.kern.callpal::rti 911 8.35% 98.31% # number of callpals executed
testsys.cpu.kern.callpal::callsys 140 1.28% 99.60% # number of callpals executed
testsys.cpu.kern.callpal::imb 44 0.40% 100.00% # number of callpals executed
testsys.cpu.kern.callpal::total 10908 # number of callpals executed
testsys.cpu.kern.mode_switch::kernel 1133 # number of protection mode switches
testsys.cpu.kern.mode_switch::user 647 # number of protection mode switches
testsys.cpu.kern.mode_switch::idle 217 # number of protection mode switches
testsys.cpu.kern.mode_good::kernel 652
testsys.cpu.kern.mode_good::user 647
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.kern.mode_good::idle 5
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.kern.mode_switch_good::kernel 0.575463 # fraction of useful protection mode switches
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.kern.mode_switch_good::idle 0.023041 # fraction of useful protection mode switches
testsys.cpu.kern.mode_switch_good::total 0.652979 # fraction of useful protection mode switches
testsys.cpu.kern.mode_ticks::kernel 931595000 57.07% 57.07% # number of ticks spent at the given mode
testsys.cpu.kern.mode_ticks::user 532793000 32.64% 89.71% # number of ticks spent at the given mode
testsys.cpu.kern.mode_ticks::idle 168009000 10.29% 100.00% # number of ticks spent at the given mode
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.kern.swap_context 438 # number of times the context was actually changed
testsys.tsunami.ethernet.txBytes 960 # Bytes Transmitted
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.tsunami.ethernet.rxBytes 798 # Bytes Received
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.txPackets 8 # Number of Packets Transmitted
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.tsunami.ethernet.rxPackets 5 # Number of Packets Received
testsys.tsunami.ethernet.txIpChecksums 2 # Number of tx IP Checksums done by device
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.rxIpChecksums 5 # Number of rx IP Checksums done by device
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.tsunami.ethernet.txTcpChecksums 2 # Number of tx TCP Checksums done by device
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.rxTcpChecksums 5 # Number of rx TCP Checksums done by device
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.tsunami.ethernet.txUdpChecksums 0 # Number of tx UDP Checksums done by device
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.rxUdpChecksums 0 # Number of rx UDP Checksums done by device
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.tsunami.ethernet.descDMAReads 8 # Number of descriptors the device read w/ DMA
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.descDMAWrites 13 # Number of descriptors the device wrote w/ DMA
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.tsunami.ethernet.descDmaReadBytes 192 # number of descriptor bytes read w/ DMA
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.descDmaWriteBytes 104 # number of descriptor bytes write w/ DMA
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.tsunami.ethernet.totBandwidth 70182 # Total Bandwidth (bits/s)
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.totPackets 13 # Total Packets
testsys.tsunami.ethernet.totBytes 1758 # Total Bytes
testsys.tsunami.ethernet.totPPS 65 # Total Tranmission Rate (packets/s)
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.tsunami.ethernet.txBandwidth 38325 # Transmit Bandwidth (bits/s)
testsys.tsunami.ethernet.rxBandwidth 31858 # Receive Bandwidth (bits/s)
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.txPPS 40 # Packet Tranmission Rate (packets/s)
testsys.tsunami.ethernet.rxPPS 25 # Packet Reception Rate (packets/s)
testsys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
testsys.tsunami.ethernet.coalescedSwi 0 # average number of Swi's coalesced into each post
testsys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
testsys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
testsys.tsunami.ethernet.coalescedRxIdle 0 # average number of RxIdle's coalesced into each post
testsys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
testsys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU
testsys.tsunami.ethernet.coalescedRxOk 0 # average number of RxOk's coalesced into each post
testsys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.tsunami.ethernet.postedRxDesc 5 # number of RxDesc interrupts posted to CPU
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.coalescedRxDesc 0 # average number of RxDesc's coalesced into each post
testsys.tsunami.ethernet.totalRxDesc 5 # total number of RxDesc written to ISR
testsys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU
testsys.tsunami.ethernet.coalescedTxOk 0 # average number of TxOk's coalesced into each post
testsys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.tsunami.ethernet.postedTxIdle 7 # number of TxIdle interrupts posted to CPU
testsys.tsunami.ethernet.coalescedTxIdle 1 # average number of TxIdle's coalesced into each post
testsys.tsunami.ethernet.totalTxIdle 8 # total number of TxIdle written to ISR
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU
testsys.tsunami.ethernet.coalescedTxDesc 0 # average number of TxDesc's coalesced into each post
testsys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
testsys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
testsys.tsunami.ethernet.coalescedRxOrn 0 # average number of RxOrn's coalesced into each post
testsys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
testsys.tsunami.ethernet.coalescedTotal 1 # average number of interrupts coalesced into each post
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.tsunami.ethernet.postedInterrupts 14 # number of posts to CPU
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.droppedPackets 0 # number of packets dropped
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.physmem.bytes_read::cpu.inst 7829376 # Number of bytes read from this memory
drivesys.physmem.bytes_read::cpu.data 2782760 # Number of bytes read from this memory
drivesys.physmem.bytes_read::tsunami.ethernet 1230 # Number of bytes read from this memory
drivesys.physmem.bytes_read::total 10613366 # Number of bytes read from this memory
drivesys.physmem.bytes_inst_read::cpu.inst 7829376 # Number of instructions bytes read from this memory
drivesys.physmem.bytes_inst_read::total 7829376 # Number of instructions bytes read from this memory
drivesys.physmem.bytes_written::cpu.data 1606716 # Number of bytes written to this memory
all: Update stats for memory per master and total fix.
2012-06-05 07:23:16 +02:00
drivesys.physmem.bytes_written::tsunami.ethernet 1064 # Number of bytes written to this memory
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.physmem.bytes_written::total 1607780 # Number of bytes written to this memory
drivesys.physmem.num_reads::cpu.inst 1957344 # Number of read requests responded to by this memory
drivesys.physmem.num_reads::cpu.data 393865 # Number of read requests responded to by this memory
drivesys.physmem.num_reads::tsunami.ethernet 34 # Number of read requests responded to by this memory
drivesys.physmem.num_reads::total 2351243 # Number of read requests responded to by this memory
drivesys.physmem.num_writes::cpu.data 230560 # Number of write requests responded to by this memory
all: Update stats for memory per master and total fix.
2012-06-05 07:23:16 +02:00
drivesys.physmem.num_writes::tsunami.ethernet 37 # Number of write requests responded to by this memory
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.physmem.num_writes::total 230597 # Number of write requests responded to by this memory
drivesys.physmem.bw_read::cpu.inst 39070237 # Total read bandwidth from this memory (bytes/s)
drivesys.physmem.bw_read::cpu.data 13886559 # Total read bandwidth from this memory (bytes/s)
drivesys.physmem.bw_read::tsunami.ethernet 6138 # Total read bandwidth from this memory (bytes/s)
drivesys.physmem.bw_read::total 52962933 # Total read bandwidth from this memory (bytes/s)
drivesys.physmem.bw_inst_read::cpu.inst 39070237 # Instruction read bandwidth from this memory (bytes/s)
drivesys.physmem.bw_inst_read::total 39070237 # Instruction read bandwidth from this memory (bytes/s)
drivesys.physmem.bw_write::cpu.data 8017852 # Write bandwidth from this memory (bytes/s)
drivesys.physmem.bw_write::tsunami.ethernet 5310 # Write bandwidth from this memory (bytes/s)
drivesys.physmem.bw_write::total 8023161 # Write bandwidth from this memory (bytes/s)
drivesys.physmem.bw_total::cpu.inst 39070237 # Total bandwidth to/from this memory (bytes/s)
drivesys.physmem.bw_total::cpu.data 21904410 # Total bandwidth to/from this memory (bytes/s)
drivesys.physmem.bw_total::tsunami.ethernet 11448 # Total bandwidth to/from this memory (bytes/s)
drivesys.physmem.bw_total::total 60986094 # Total bandwidth to/from this memory (bytes/s)
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
drivesys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
drivesys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD).
drivesys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes.
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
drivesys.disk0.dma_write_txs 0 # Number of DMA write transactions.
drivesys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
drivesys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
drivesys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes.
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
drivesys.disk2.dma_write_txs 0 # Number of DMA write transactions.
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.dtb.fetch_hits 0 # ITB hits
drivesys.cpu.dtb.fetch_misses 0 # ITB misses
drivesys.cpu.dtb.fetch_acv 0 # ITB acv
drivesys.cpu.dtb.fetch_accesses 0 # ITB accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.dtb.read_hits 393226 # DTB read hits
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.dtb.read_misses 487 # DTB read misses
drivesys.cpu.dtb.read_acv 30 # DTB read access violations
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.dtb.read_accesses 267991 # DTB read accesses
drivesys.cpu.dtb.write_hits 230718 # DTB write hits
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.dtb.write_misses 82 # DTB write misses
drivesys.cpu.dtb.write_acv 10 # DTB write access violations
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.dtb.write_accesses 133239 # DTB write accesses
drivesys.cpu.dtb.data_hits 623944 # DTB hits
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.dtb.data_misses 569 # DTB misses
drivesys.cpu.dtb.data_acv 40 # DTB access violations
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.dtb.data_accesses 401230 # DTB accesses
drivesys.cpu.itb.fetch_hits 1338285 # ITB hits
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.itb.fetch_misses 194 # ITB misses
drivesys.cpu.itb.fetch_acv 22 # ITB acv
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.itb.fetch_accesses 1338479 # ITB accesses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.itb.read_hits 0 # DTB read hits
drivesys.cpu.itb.read_misses 0 # DTB read misses
drivesys.cpu.itb.read_acv 0 # DTB read access violations
drivesys.cpu.itb.read_accesses 0 # DTB read accesses
drivesys.cpu.itb.write_hits 0 # DTB write hits
drivesys.cpu.itb.write_misses 0 # DTB write misses
drivesys.cpu.itb.write_acv 0 # DTB write access violations
drivesys.cpu.itb.write_accesses 0 # DTB write accesses
drivesys.cpu.itb.data_hits 0 # DTB hits
drivesys.cpu.itb.data_misses 0 # DTB misses
drivesys.cpu.itb.data_acv 0 # DTB access violations
drivesys.cpu.itb.data_accesses 0 # DTB accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.numCycles 800780792 # number of cpu cycles simulated
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.numWorkItemsStarted 0 # number of work items this cpu started
drivesys.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.committedInsts 1956735 # Number of instructions committed
drivesys.cpu.committedOps 1956735 # Number of ops (including micro ops) committed
drivesys.cpu.num_int_alu_accesses 1888716 # Number of integer alu accesses
drivesys.cpu.num_fp_alu_accesses 1412 # Number of float alu accesses
drivesys.cpu.num_func_calls 121668 # number of times a function call or return occured
drivesys.cpu.num_conditional_control_insts 160826 # number of instructions that are conditional controls
drivesys.cpu.num_int_insts 1888716 # number of integer instructions
drivesys.cpu.num_fp_insts 1412 # number of float instructions
drivesys.cpu.num_int_register_reads 2409464 # number of times the integer registers were read
drivesys.cpu.num_int_register_writes 1441433 # number of times the integer registers were written
drivesys.cpu.num_fp_register_reads 760 # number of times the floating registers were read
drivesys.cpu.num_fp_register_writes 766 # number of times the floating registers were written
drivesys.cpu.num_mem_refs 625666 # number of memory refs
drivesys.cpu.num_load_insts 394435 # Number of load instructions
drivesys.cpu.num_store_insts 231231 # Number of store instructions
drivesys.cpu.num_idle_cycles 798825150.814200 # Number of idle cycles
drivesys.cpu.num_busy_cycles 1955641.185800 # Number of busy cycles
drivesys.cpu.not_idle_fraction 0.002442 # Percentage of non-idle cycles
drivesys.cpu.idle_fraction 0.997558 # Percentage of idle cycles
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.inst.arm 0 # number of arm instructions executed
drivesys.cpu.kern.inst.quiesce 215 # number of quiesce instructions executed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.kern.inst.hwrei 5510 # number of hwrei instructions executed
drivesys.cpu.kern.ipl_count::0 1199 28.41% 28.41% # number of times we switched to this ipl
drivesys.cpu.kern.ipl_count::21 12 0.28% 28.69% # number of times we switched to this ipl
drivesys.cpu.kern.ipl_count::22 205 4.86% 33.55% # number of times we switched to this ipl
drivesys.cpu.kern.ipl_count::31 2805 66.45% 100.00% # number of times we switched to this ipl
drivesys.cpu.kern.ipl_count::total 4221 # number of times we switched to this ipl
drivesys.cpu.kern.ipl_good::0 1199 45.85% 45.85% # number of times we switched to this ipl from a different ipl
drivesys.cpu.kern.ipl_good::21 12 0.46% 46.31% # number of times we switched to this ipl from a different ipl
drivesys.cpu.kern.ipl_good::22 205 7.84% 54.15% # number of times we switched to this ipl from a different ipl
drivesys.cpu.kern.ipl_good::31 1199 45.85% 100.00% # number of times we switched to this ipl from a different ipl
drivesys.cpu.kern.ipl_good::total 2615 # number of times we switched to this ipl from a different ipl
drivesys.cpu.kern.ipl_ticks::0 200114646000 99.96% 99.96% # number of cycles we spent at this ipl
drivesys.cpu.kern.ipl_ticks::21 486000 0.00% 99.96% # number of cycles we spent at this ipl
drivesys.cpu.kern.ipl_ticks::22 4407500 0.00% 99.96% # number of cycles we spent at this ipl
drivesys.cpu.kern.ipl_ticks::31 75660250 0.04% 100.00% # number of cycles we spent at this ipl
drivesys.cpu.kern.ipl_ticks::total 200195199750 # number of cycles we spent at this ipl
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.ipl_used::0 1 # fraction of swpipl calls that actually changed the ipl
drivesys.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl
drivesys.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.kern.ipl_used::31 0.427451 # fraction of swpipl calls that actually changed the ipl
drivesys.cpu.kern.ipl_used::total 0.619521 # fraction of swpipl calls that actually changed the ipl
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.syscall::2 1 4.55% 4.55% # number of syscalls executed
drivesys.cpu.kern.syscall::6 3 13.64% 18.18% # number of syscalls executed
drivesys.cpu.kern.syscall::17 2 9.09% 27.27% # number of syscalls executed
drivesys.cpu.kern.syscall::97 1 4.55% 31.82% # number of syscalls executed
drivesys.cpu.kern.syscall::99 2 9.09% 40.91% # number of syscalls executed
drivesys.cpu.kern.syscall::101 2 9.09% 50.00% # number of syscalls executed
drivesys.cpu.kern.syscall::102 3 13.64% 63.64% # number of syscalls executed
drivesys.cpu.kern.syscall::104 1 4.55% 68.18% # number of syscalls executed
drivesys.cpu.kern.syscall::105 3 13.64% 81.82% # number of syscalls executed
drivesys.cpu.kern.syscall::106 1 4.55% 86.36% # number of syscalls executed
drivesys.cpu.kern.syscall::118 2 9.09% 95.45% # number of syscalls executed
drivesys.cpu.kern.syscall::150 1 4.55% 100.00% # number of syscalls executed
drivesys.cpu.kern.syscall::total 22 # number of syscalls executed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.kern.callpal::swpctx 72 1.61% 1.61% # number of callpals executed
drivesys.cpu.kern.callpal::tbi 5 0.11% 1.72% # number of callpals executed
drivesys.cpu.kern.callpal::swpipl 3680 82.36% 84.09% # number of callpals executed
drivesys.cpu.kern.callpal::rdps 354 7.92% 92.01% # number of callpals executed
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.callpal::rdusp 1 0.02% 92.03% # number of callpals executed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.kern.callpal::rti 324 7.25% 99.28% # number of callpals executed
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.callpal::callsys 25 0.56% 99.84% # number of callpals executed
drivesys.cpu.kern.callpal::imb 7 0.16% 100.00% # number of callpals executed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.kern.callpal::total 4468 # number of callpals executed
drivesys.cpu.kern.mode_switch::kernel 177 # number of protection mode switches
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.mode_switch::user 107 # number of protection mode switches
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.kern.mode_switch::idle 219 # number of protection mode switches
drivesys.cpu.kern.mode_good::kernel 111
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.mode_good::user 107
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.kern.mode_good::idle 4
drivesys.cpu.kern.mode_switch_good::kernel 0.627119 # fraction of useful protection mode switches
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.kern.mode_switch_good::idle 0.018265 # fraction of useful protection mode switches
drivesys.cpu.kern.mode_switch_good::total 0.441352 # fraction of useful protection mode switches
drivesys.cpu.kern.mode_ticks::kernel 66889000 2.31% 2.31% # number of ticks spent at the given mode
drivesys.cpu.kern.mode_ticks::user 319585750 11.03% 13.34% # number of ticks spent at the given mode
drivesys.cpu.kern.mode_ticks::idle 2511439250 86.66% 100.00% # number of ticks spent at the given mode
drivesys.cpu.kern.swap_context 72 # number of times the context was actually changed
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.txBytes 798 # Bytes Transmitted
drivesys.tsunami.ethernet.rxBytes 960 # Bytes Received
drivesys.tsunami.ethernet.txPackets 5 # Number of Packets Transmitted
drivesys.tsunami.ethernet.rxPackets 8 # Number of Packets Received
drivesys.tsunami.ethernet.txIpChecksums 2 # Number of tx IP Checksums done by device
drivesys.tsunami.ethernet.rxIpChecksums 8 # Number of rx IP Checksums done by device
drivesys.tsunami.ethernet.txTcpChecksums 2 # Number of tx TCP Checksums done by device
drivesys.tsunami.ethernet.rxTcpChecksums 8 # Number of rx TCP Checksums done by device
drivesys.tsunami.ethernet.txUdpChecksums 0 # Number of tx UDP Checksums done by device
drivesys.tsunami.ethernet.rxUdpChecksums 0 # Number of rx UDP Checksums done by device
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.tsunami.ethernet.descDMAReads 5 # Number of descriptors the device read w/ DMA
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.descDMAWrites 13 # Number of descriptors the device wrote w/ DMA
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.tsunami.ethernet.descDmaReadBytes 120 # number of descriptor bytes read w/ DMA
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.descDmaWriteBytes 104 # number of descriptor bytes write w/ DMA
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.tsunami.ethernet.totBandwidth 70182 # Total Bandwidth (bits/s)
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.totPackets 13 # Total Packets
drivesys.tsunami.ethernet.totBytes 1758 # Total Bytes
drivesys.tsunami.ethernet.totPPS 65 # Total Tranmission Rate (packets/s)
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.tsunami.ethernet.txBandwidth 31858 # Transmit Bandwidth (bits/s)
drivesys.tsunami.ethernet.rxBandwidth 38325 # Receive Bandwidth (bits/s)
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.txPPS 25 # Packet Tranmission Rate (packets/s)
drivesys.tsunami.ethernet.rxPPS 40 # Packet Reception Rate (packets/s)
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
drivesys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.coalescedSwi 0 # average number of Swi's coalesced into each post
drivesys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
drivesys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
drivesys.tsunami.ethernet.coalescedRxIdle 0 # average number of RxIdle's coalesced into each post
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
drivesys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU
drivesys.tsunami.ethernet.coalescedRxOk 0 # average number of RxOk's coalesced into each post
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
drivesys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.tsunami.ethernet.postedRxDesc 7 # number of RxDesc interrupts posted to CPU
drivesys.tsunami.ethernet.coalescedRxDesc 1 # average number of RxDesc's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.totalRxDesc 8 # total number of RxDesc written to ISR
drivesys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU
drivesys.tsunami.ethernet.coalescedTxOk 0 # average number of TxOk's coalesced into each post
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
drivesys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.tsunami.ethernet.postedTxIdle 5 # number of TxIdle interrupts posted to CPU
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.coalescedTxIdle 0 # average number of TxIdle's coalesced into each post
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.tsunami.ethernet.totalTxIdle 5 # total number of TxIdle written to ISR
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU
drivesys.tsunami.ethernet.coalescedTxDesc 0 # average number of TxDesc's coalesced into each post
drivesys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
drivesys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
drivesys.tsunami.ethernet.coalescedRxOrn 0 # average number of RxOrn's coalesced into each post
drivesys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
drivesys.tsunami.ethernet.coalescedTotal 1 # average number of interrupts coalesced into each post
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.tsunami.ethernet.postedInterrupts 14 # number of posts to CPU
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.droppedPackets 0 # number of packets dropped
---------- End Simulation Statistics ----------
---------- Begin Simulation Statistics ----------
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
sim_seconds 0.000390 # Number of seconds simulated
sim_ticks 390393500 # Number of ticks simulated
final_tick 4320551987500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
sim_freq 1000000000000 # Frequency of simulated ticks
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
host_inst_rate 309018358448 # Simulator instruction rate (inst/s)
host_op_rate 304755215914 # Simulator op (including micro ops) rate (op/s)
host_tick_rate 428792748186 # Simulator tick rate (ticks/s)
host_mem_usage 459700 # Number of bytes of host memory used
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
host_seconds 0.00 # Real time elapsed on the host
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
sim_insts 271558535 # Number of instructions simulated
sim_ops 271558535 # Number of ops (including micro ops) simulated
testsys.physmem.bytes_read::cpu.inst 5888 # Number of bytes read from this memory
testsys.physmem.bytes_read::cpu.data 2272 # Number of bytes read from this memory
testsys.physmem.bytes_read::total 8160 # Number of bytes read from this memory
testsys.physmem.bytes_inst_read::cpu.inst 5888 # Number of instructions bytes read from this memory
testsys.physmem.bytes_inst_read::total 5888 # Number of instructions bytes read from this memory
testsys.physmem.bytes_written::cpu.data 1288 # Number of bytes written to this memory
testsys.physmem.bytes_written::total 1288 # Number of bytes written to this memory
testsys.physmem.num_reads::cpu.inst 1472 # Number of read requests responded to by this memory
testsys.physmem.num_reads::cpu.data 309 # Number of read requests responded to by this memory
testsys.physmem.num_reads::total 1781 # Number of read requests responded to by this memory
testsys.physmem.num_writes::cpu.data 172 # Number of write requests responded to by this memory
testsys.physmem.num_writes::total 172 # Number of write requests responded to by this memory
testsys.physmem.bw_read::cpu.inst 15082218 # Total read bandwidth from this memory (bytes/s)
testsys.physmem.bw_read::cpu.data 5819769 # Total read bandwidth from this memory (bytes/s)
testsys.physmem.bw_read::total 20901987 # Total read bandwidth from this memory (bytes/s)
testsys.physmem.bw_inst_read::cpu.inst 15082218 # Instruction read bandwidth from this memory (bytes/s)
testsys.physmem.bw_inst_read::total 15082218 # Instruction read bandwidth from this memory (bytes/s)
testsys.physmem.bw_write::cpu.data 3299235 # Write bandwidth from this memory (bytes/s)
testsys.physmem.bw_write::total 3299235 # Write bandwidth from this memory (bytes/s)
testsys.physmem.bw_total::cpu.inst 15082218 # Total bandwidth to/from this memory (bytes/s)
testsys.physmem.bw_total::cpu.data 9119004 # Total bandwidth to/from this memory (bytes/s)
testsys.physmem.bw_total::total 24201223 # Total bandwidth to/from this memory (bytes/s)
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
testsys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
testsys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD).
testsys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes.
testsys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
testsys.disk0.dma_write_txs 0 # Number of DMA write transactions.
testsys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
testsys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
testsys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
testsys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes.
testsys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
testsys.disk2.dma_write_txs 0 # Number of DMA write transactions.
tests: update tests for TLB unification
2009-04-09 07:21:30 +02:00
testsys.cpu.dtb.fetch_hits 0 # ITB hits
testsys.cpu.dtb.fetch_misses 0 # ITB misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.dtb.fetch_acv 0 # ITB acv
testsys.cpu.dtb.fetch_accesses 0 # ITB accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.dtb.read_hits 309 # DTB read hits
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.cpu.dtb.read_misses 0 # DTB read misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.dtb.read_acv 0 # DTB read access violations
testsys.cpu.dtb.read_accesses 0 # DTB read accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.dtb.write_hits 173 # DTB write hits
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.cpu.dtb.write_misses 0 # DTB write misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.dtb.write_acv 0 # DTB write access violations
testsys.cpu.dtb.write_accesses 0 # DTB write accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.dtb.data_hits 482 # DTB hits
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.dtb.data_misses 0 # DTB misses
testsys.cpu.dtb.data_acv 0 # DTB access violations
testsys.cpu.dtb.data_accesses 0 # DTB accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.itb.fetch_hits 192 # ITB hits
tests: update tests for TLB unification
2009-04-09 07:21:30 +02:00
testsys.cpu.itb.fetch_misses 0 # ITB misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.itb.fetch_acv 0 # ITB acv
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.itb.fetch_accesses 192 # ITB accesses
tests: update tests for TLB unification
2009-04-09 07:21:30 +02:00
testsys.cpu.itb.read_hits 0 # DTB read hits
testsys.cpu.itb.read_misses 0 # DTB read misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.itb.read_acv 0 # DTB read access violations
testsys.cpu.itb.read_accesses 0 # DTB read accesses
tests: update tests for TLB unification
2009-04-09 07:21:30 +02:00
testsys.cpu.itb.write_hits 0 # DTB write hits
testsys.cpu.itb.write_misses 0 # DTB write misses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.itb.write_acv 0 # DTB write access violations
testsys.cpu.itb.write_accesses 0 # DTB write accesses
testsys.cpu.itb.data_hits 0 # DTB hits
testsys.cpu.itb.data_misses 0 # DTB misses
testsys.cpu.itb.data_acv 0 # DTB access violations
testsys.cpu.itb.data_accesses 0 # DTB accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.numCycles 1953126 # number of cpu cycles simulated
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.numWorkItemsStarted 0 # number of work items this cpu started
testsys.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.committedInsts 1472 # Number of instructions committed
testsys.cpu.committedOps 1472 # Number of ops (including micro ops) committed
testsys.cpu.num_int_alu_accesses 1356 # Number of integer alu accesses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.num_func_calls 68 # number of times a function call or return occured
testsys.cpu.num_conditional_control_insts 107 # number of instructions that are conditional controls
testsys.cpu.num_int_insts 1356 # number of integer instructions
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.num_fp_insts 0 # number of float instructions
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.num_int_register_reads 1852 # number of times the integer registers were read
testsys.cpu.num_int_register_writes 1059 # number of times the integer registers were written
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.num_fp_register_reads 0 # number of times the floating registers were read
testsys.cpu.num_fp_register_writes 0 # number of times the floating registers were written
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.num_mem_refs 483 # number of memory refs
testsys.cpu.num_load_insts 309 # Number of load instructions
testsys.cpu.num_store_insts 174 # Number of store instructions
testsys.cpu.num_idle_cycles 1949443.815916 # Number of idle cycles
testsys.cpu.num_busy_cycles 3682.184084 # Number of busy cycles
testsys.cpu.not_idle_fraction 0.001885 # Percentage of non-idle cycles
testsys.cpu.idle_fraction 0.998115 # Percentage of idle cycles
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.cpu.kern.inst.arm 0 # number of arm instructions executed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.kern.inst.quiesce 1 # number of quiesce instructions executed
testsys.cpu.kern.inst.hwrei 15 # number of hwrei instructions executed
testsys.cpu.kern.ipl_count::0 3 21.43% 21.43% # number of times we switched to this ipl
testsys.cpu.kern.ipl_count::22 1 7.14% 28.57% # number of times we switched to this ipl
testsys.cpu.kern.ipl_count::31 10 71.43% 100.00% # number of times we switched to this ipl
testsys.cpu.kern.ipl_count::total 14 # number of times we switched to this ipl
testsys.cpu.kern.ipl_good::0 3 42.86% 42.86% # number of times we switched to this ipl from a different ipl
testsys.cpu.kern.ipl_good::22 1 14.29% 57.14% # number of times we switched to this ipl from a different ipl
testsys.cpu.kern.ipl_good::31 3 42.86% 100.00% # number of times we switched to this ipl from a different ipl
testsys.cpu.kern.ipl_good::total 7 # number of times we switched to this ipl from a different ipl
testsys.cpu.kern.ipl_ticks::0 975901000 99.93% 99.93% # number of cycles we spent at this ipl
testsys.cpu.kern.ipl_ticks::22 43000 0.00% 99.94% # number of cycles we spent at this ipl
testsys.cpu.kern.ipl_ticks::31 619000 0.06% 100.00% # number of cycles we spent at this ipl
testsys.cpu.kern.ipl_ticks::total 976563000 # number of cycles we spent at this ipl
testsys.cpu.kern.ipl_used::0 1 # fraction of swpipl calls that actually changed the ipl
testsys.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
testsys.cpu.kern.ipl_used::31 0.300000 # fraction of swpipl calls that actually changed the ipl
testsys.cpu.kern.ipl_used::total 0.500000 # fraction of swpipl calls that actually changed the ipl
testsys.cpu.kern.callpal::swpipl 12 85.71% 85.71% # number of callpals executed
testsys.cpu.kern.callpal::rdps 1 7.14% 92.86% # number of callpals executed
testsys.cpu.kern.callpal::rti 1 7.14% 100.00% # number of callpals executed
testsys.cpu.kern.callpal::total 14 # number of callpals executed
stats: update reference outputs now that compatibility is gone Because of the initialization bug, it wasn't consistent anyway.
2009-04-22 19:25:17 +02:00
testsys.cpu.kern.mode_switch::kernel 0 # number of protection mode switches
testsys.cpu.kern.mode_switch::user 0 # number of protection mode switches
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.kern.mode_switch::idle 1 # number of protection mode switches
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.cpu.kern.mode_good::kernel 0
testsys.cpu.kern.mode_good::user 0
testsys.cpu.kern.mode_good::idle 0
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
testsys.cpu.kern.mode_switch_good::kernel nan # fraction of useful protection mode switches
testsys.cpu.kern.mode_switch_good::user nan # fraction of useful protection mode switches
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
testsys.cpu.kern.mode_switch_good::idle 0 # fraction of useful protection mode switches
testsys.cpu.kern.mode_switch_good::total 0 # fraction of useful protection mode switches
stats: update reference outputs now that compatibility is gone Because of the initialization bug, it wasn't consistent anyway.
2009-04-22 19:25:17 +02:00
testsys.cpu.kern.mode_ticks::kernel 0 # number of ticks spent at the given mode
testsys.cpu.kern.mode_ticks::user 0 # number of ticks spent at the given mode
testsys.cpu.kern.mode_ticks::idle 0 # number of ticks spent at the given mode
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.cpu.kern.swap_context 0 # number of times the context was actually changed
testsys.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
testsys.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
testsys.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
testsys.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
testsys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
testsys.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
testsys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
testsys.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
testsys.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
testsys.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR
testsys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
testsys.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
testsys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
testsys.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR
testsys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
testsys.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
testsys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
testsys.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
testsys.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
testsys.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
testsys.tsunami.ethernet.droppedPackets 0 # number of packets dropped
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.physmem.bytes_read::cpu.inst 5884 # Number of bytes read from this memory
drivesys.physmem.bytes_read::cpu.data 2272 # Number of bytes read from this memory
drivesys.physmem.bytes_read::total 8156 # Number of bytes read from this memory
drivesys.physmem.bytes_inst_read::cpu.inst 5884 # Number of instructions bytes read from this memory
drivesys.physmem.bytes_inst_read::total 5884 # Number of instructions bytes read from this memory
drivesys.physmem.bytes_written::cpu.data 1288 # Number of bytes written to this memory
drivesys.physmem.bytes_written::total 1288 # Number of bytes written to this memory
drivesys.physmem.num_reads::cpu.inst 1471 # Number of read requests responded to by this memory
drivesys.physmem.num_reads::cpu.data 309 # Number of read requests responded to by this memory
drivesys.physmem.num_reads::total 1780 # Number of read requests responded to by this memory
drivesys.physmem.num_writes::cpu.data 172 # Number of write requests responded to by this memory
drivesys.physmem.num_writes::total 172 # Number of write requests responded to by this memory
drivesys.physmem.bw_read::cpu.inst 15071972 # Total read bandwidth from this memory (bytes/s)
drivesys.physmem.bw_read::cpu.data 5819769 # Total read bandwidth from this memory (bytes/s)
drivesys.physmem.bw_read::total 20891741 # Total read bandwidth from this memory (bytes/s)
drivesys.physmem.bw_inst_read::cpu.inst 15071972 # Instruction read bandwidth from this memory (bytes/s)
drivesys.physmem.bw_inst_read::total 15071972 # Instruction read bandwidth from this memory (bytes/s)
drivesys.physmem.bw_write::cpu.data 3299235 # Write bandwidth from this memory (bytes/s)
drivesys.physmem.bw_write::total 3299235 # Write bandwidth from this memory (bytes/s)
drivesys.physmem.bw_total::cpu.inst 15071972 # Total bandwidth to/from this memory (bytes/s)
drivesys.physmem.bw_total::cpu.data 9119004 # Total bandwidth to/from this memory (bytes/s)
drivesys.physmem.bw_total::total 24190977 # Total bandwidth to/from this memory (bytes/s)
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
drivesys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
drivesys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD).
drivesys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes.
drivesys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
drivesys.disk0.dma_write_txs 0 # Number of DMA write transactions.
drivesys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
drivesys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
drivesys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
drivesys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes.
drivesys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
drivesys.disk2.dma_write_txs 0 # Number of DMA write transactions.
drivesys.cpu.dtb.fetch_hits 0 # ITB hits
drivesys.cpu.dtb.fetch_misses 0 # ITB misses
drivesys.cpu.dtb.fetch_acv 0 # ITB acv
drivesys.cpu.dtb.fetch_accesses 0 # ITB accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.dtb.read_hits 309 # DTB read hits
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.dtb.read_misses 0 # DTB read misses
drivesys.cpu.dtb.read_acv 0 # DTB read access violations
drivesys.cpu.dtb.read_accesses 0 # DTB read accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.dtb.write_hits 173 # DTB write hits
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.dtb.write_misses 0 # DTB write misses
drivesys.cpu.dtb.write_acv 0 # DTB write access violations
drivesys.cpu.dtb.write_accesses 0 # DTB write accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.dtb.data_hits 482 # DTB hits
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.dtb.data_misses 0 # DTB misses
drivesys.cpu.dtb.data_acv 0 # DTB access violations
drivesys.cpu.dtb.data_accesses 0 # DTB accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.itb.fetch_hits 192 # ITB hits
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.itb.fetch_misses 0 # ITB misses
drivesys.cpu.itb.fetch_acv 0 # ITB acv
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.itb.fetch_accesses 192 # ITB accesses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.itb.read_hits 0 # DTB read hits
drivesys.cpu.itb.read_misses 0 # DTB read misses
drivesys.cpu.itb.read_acv 0 # DTB read access violations
drivesys.cpu.itb.read_accesses 0 # DTB read accesses
drivesys.cpu.itb.write_hits 0 # DTB write hits
drivesys.cpu.itb.write_misses 0 # DTB write misses
drivesys.cpu.itb.write_acv 0 # DTB write access violations
drivesys.cpu.itb.write_accesses 0 # DTB write accesses
drivesys.cpu.itb.data_hits 0 # DTB hits
drivesys.cpu.itb.data_misses 0 # DTB misses
drivesys.cpu.itb.data_acv 0 # DTB access violations
drivesys.cpu.itb.data_accesses 0 # DTB accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.numCycles 3906249 # number of cpu cycles simulated
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.numWorkItemsStarted 0 # number of work items this cpu started
drivesys.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.committedInsts 1471 # Number of instructions committed
drivesys.cpu.committedOps 1471 # Number of ops (including micro ops) committed
drivesys.cpu.num_int_alu_accesses 1354 # Number of integer alu accesses
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.num_func_calls 68 # number of times a function call or return occured
drivesys.cpu.num_conditional_control_insts 108 # number of instructions that are conditional controls
drivesys.cpu.num_int_insts 1354 # number of integer instructions
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.num_fp_insts 0 # number of float instructions
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.num_int_register_reads 1848 # number of times the integer registers were read
drivesys.cpu.num_int_register_writes 1056 # number of times the integer registers were written
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.num_fp_register_reads 0 # number of times the floating registers were read
drivesys.cpu.num_fp_register_writes 0 # number of times the floating registers were written
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.num_mem_refs 483 # number of memory refs
drivesys.cpu.num_load_insts 309 # Number of load instructions
drivesys.cpu.num_store_insts 174 # Number of store instructions
drivesys.cpu.num_idle_cycles 3902569.320225 # Number of idle cycles
drivesys.cpu.num_busy_cycles 3679.679775 # Number of busy cycles
drivesys.cpu.not_idle_fraction 0.000942 # Percentage of non-idle cycles
drivesys.cpu.idle_fraction 0.999058 # Percentage of idle cycles
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.inst.arm 0 # number of arm instructions executed
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.kern.inst.quiesce 1 # number of quiesce instructions executed
drivesys.cpu.kern.inst.hwrei 15 # number of hwrei instructions executed
drivesys.cpu.kern.ipl_count::0 3 21.43% 21.43% # number of times we switched to this ipl
drivesys.cpu.kern.ipl_count::22 1 7.14% 28.57% # number of times we switched to this ipl
drivesys.cpu.kern.ipl_count::31 10 71.43% 100.00% # number of times we switched to this ipl
drivesys.cpu.kern.ipl_count::total 14 # number of times we switched to this ipl
drivesys.cpu.kern.ipl_good::0 3 42.86% 42.86% # number of times we switched to this ipl from a different ipl
drivesys.cpu.kern.ipl_good::22 1 14.29% 57.14% # number of times we switched to this ipl from a different ipl
drivesys.cpu.kern.ipl_good::31 3 42.86% 100.00% # number of times we switched to this ipl from a different ipl
drivesys.cpu.kern.ipl_good::total 7 # number of times we switched to this ipl from a different ipl
drivesys.cpu.kern.ipl_ticks::0 976231500 99.97% 99.97% # number of cycles we spent at this ipl
drivesys.cpu.kern.ipl_ticks::22 21500 0.00% 99.97% # number of cycles we spent at this ipl
drivesys.cpu.kern.ipl_ticks::31 309250 0.03% 100.00% # number of cycles we spent at this ipl
drivesys.cpu.kern.ipl_ticks::total 976562250 # number of cycles we spent at this ipl
drivesys.cpu.kern.ipl_used::0 1 # fraction of swpipl calls that actually changed the ipl
drivesys.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
drivesys.cpu.kern.ipl_used::31 0.300000 # fraction of swpipl calls that actually changed the ipl
drivesys.cpu.kern.ipl_used::total 0.500000 # fraction of swpipl calls that actually changed the ipl
drivesys.cpu.kern.callpal::swpipl 12 85.71% 85.71% # number of callpals executed
drivesys.cpu.kern.callpal::rdps 1 7.14% 92.86% # number of callpals executed
drivesys.cpu.kern.callpal::rti 1 7.14% 100.00% # number of callpals executed
drivesys.cpu.kern.callpal::total 14 # number of callpals executed
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.mode_switch::kernel 0 # number of protection mode switches
drivesys.cpu.kern.mode_switch::user 0 # number of protection mode switches
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.kern.mode_switch::idle 1 # number of protection mode switches
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.mode_good::kernel 0
drivesys.cpu.kern.mode_good::user 0
drivesys.cpu.kern.mode_good::idle 0
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
drivesys.cpu.kern.mode_switch_good::kernel nan # fraction of useful protection mode switches
drivesys.cpu.kern.mode_switch_good::user nan # fraction of useful protection mode switches
Stats: Update stats for twosys-tsunami after setting CPU clock This patch updates the stats to reflect the addition of a clock period other than the default 1 Tick.
2012-09-25 00:03:43 +02:00
drivesys.cpu.kern.mode_switch_good::idle 0 # fraction of useful protection mode switches
drivesys.cpu.kern.mode_switch_good::total 0 # fraction of useful protection mode switches
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.cpu.kern.mode_ticks::kernel 0 # number of ticks spent at the given mode
drivesys.cpu.kern.mode_ticks::user 0 # number of ticks spent at the given mode
drivesys.cpu.kern.mode_ticks::idle 0 # number of ticks spent at the given mode
drivesys.cpu.kern.swap_context 0 # number of times the context was actually changed
drivesys.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
drivesys.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
drivesys.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
drivesys.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
drivesys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
drivesys.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
drivesys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
drivesys.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
drivesys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
drivesys.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
drivesys.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
drivesys.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR
drivesys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
drivesys.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
drivesys.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
drivesys.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR
drivesys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
drivesys.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
drivesys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
drivesys.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
stats: update stats for no_value -> nan Lots of accumulated older changes too.
2012-05-09 20:52:14 +02:00
drivesys.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
stats: Update stats for final tick and memory bandwidth patches
2012-01-25 18:19:50 +01:00
drivesys.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
drivesys.tsunami.ethernet.droppedPackets 0 # number of packets dropped
add a simple netperf-stream test to the long tests. tests/SConscript: add a new configuration for two-system tests (atomic simple only) --HG-- extra : convert_revision : 16c260ab16f38779fe17b1cab18f36d5c7a70846
2006-12-01 07:24:01 +01:00
---------- End Simulation Statistics ----------
Reference in a new issue Copy permalink